JPH0557964U - Fax machine - Google Patents

Abstract

(57) [Abstract] [Purpose] An object of the present invention is to provide a facsimile apparatus that can perform smoothing processing without breaking dither patterns and the like. [Structure] Regarding the image data stored in the RAM 2, the number of black and white change points is counted by the CPU 1a, and for the portion having a small number of change points, the switch section 51 is set to the smoothing processing section 50 side by a command from the CPU 1a. While the image data passed through 50 is adopted, the switch unit 51 is set to the RAM 2 for the portion having a large number of black and white change points.
On the side, the smoothing process is not performed.

Description

[Detailed description of the device]

[0001]

[Industrial application]

 The present invention relates to a facsimile device having a so-called smoothing function.

[0002]

[Prior Art]

 Some facsimile machines have a mode called fine mode (8 dot / mm x 7.7 lines / mm) with excellent image quality, but if the partner machine has only normal mode, or even if fine mode If you want to reduce the communication time even if you have the function, you may want to perform communication in normal mode.

When the receiving side has the printing capability for the fine mode, the line (pixel) density of the image data transmitted in the normal mode is half the printing capability of the receiving side, so the receiving side has a so-called double The image is reproduced by printing after printing. That is, when the transmission data of one line is, for example, "00011010 ..." (0 indicates white and 1 indicates black), the receiving side prints two lines of "00011010 ..." Consecutively. I have to.

Between the G3 facsimile apparatus and the G4 facsimile apparatus, if the transmission data of one line is, for example, "00011010 ..." The dot may be written twice, and the same line may be printed on the next line. By the way, if the writing is performed twice in this way, when reproducing an original in which diagonal lines and the like are reproduced, a step difference of at least 2 pixels is generated and the appearance is deteriorated. For this reason, taking advantage of the printing ability for fine mode, the receiving side performs so-called smoothing by compensating for black pixels in the stepped portion by digital processing.

[0005]

[Problems to be solved by the device]

 However, if the smoothing process is uniformly performed on all the image data of one document, for example, the dither pattern generated in the photo mode will collapse and the image quality will deteriorate. In addition, there is a drawback that the edges of small characters are blurred.

In view of the above circumstances, an object of the present invention is to provide a facsimile apparatus that can perform a smoothing process without breaking a dither pattern or the like.

[0007]

[Means for Solving the Problems]

 In order to solve the above-mentioned problems, the facsimile apparatus according to the present invention performs smoothing processing on a portion having a small number of black and white change points in image data, while performing smoothing processing on a portion having a large number of white and black change points by the smoothing processing. Is also characterized by a partial smoothing processing means that reduces the degree of smoothing or does not perform smoothing processing.

[0008]

[Action]

 According to the above configuration, a portion having a large number of black and white change points, for example, a dither pattern portion generated in the photo mode, or a portion such as a fine character, is more preferable than the smoothing processing performed for the portion having a small black and white change point. Since the degree of smoothing is lowered or smoothing processing is not performed, it is possible to prevent the dither pattern from being distorted and the fine character portion from being blurred.

[0009]

【Example】

 [Embodiment 1] An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. FIG. 1 is a block diagram showing a schematic circuit configuration of a facsimile machine. The facsimile machine controls a facsimile as a whole, a control unit 1 that performs necessary control during smoothing processing, and transmission data. RAM 2 for holding received data, received data, etc., auto dialer 3 for dialing, NCU 4 for controlling line 5, reading unit 6 for optically reading the contents of the original, and modem for performing modulation / demodulation processing. 7, a recording unit 8 that applies heat in dot units to the recording paper by a thermal head to perform recording, a ROM 9 that stores a program necessary for the operation of the control unit 1, a ten-key pad, a one-touch key, etc. It is configured to include an operation panel 10 and a display unit 11 including an LCD.

FIG. 2 is a diagram showing a circuit configuration relating to the smoothing process. This circuit inputs a RAM 2 for storing received image data and a binary image data stored in the RAM 2 and outputs the binary image data. The smoothing processing unit 50 that digitally performs the smoothing processing on the image data, the binary image data output from the smoothing processing unit 50 and the binary image data from the RAM 2 are input, and one of the images is instructed by the CPU 1a. When the number of black and white change points of the binary image data stored in the RAM2 is counted and the number of change points exceeds a certain value, the switch section 51 is switched to the RAM2. On the other hand, when the number of change points does not exceed a certain value, the switch unit 51 is switched to the smoothing processing unit 50 side. It is configured by the CPU 1a that executes the process.

According to the above configuration, smoothing processing is not performed on a portion having a large number of black and white change points, for example, a dither pattern portion generated in the photo mode, or a portion such as a fine character. It is possible to prevent the collapse of the pattern and the blurring of fine character parts. In the above example, the number of black and white change points is determined for all the pixels in the main scanning direction in one line, and it is determined whether or not smoothing processing is performed for each line. Pixels are divided into some (for example, 8), the number of change points is judged for the divided pixels in each area, and it is determined whether or not smoothing processing is performed for each area. Good.

Second Embodiment Another embodiment of the present invention will be described below with reference to FIGS. 3 to 7. FIG. 3 is a circuit for performing smoothing by converting multi-valued digital image data into a sine wave signal and sampling the image data made into the sine wave signal again at a predetermined frequency to obtain digital image data. FIG. 2 is a diagram showing the configuration of the circuit, which includes two line memories 15 and 16 connected to a RAM 2 and a D / A converter 18 which is connected to each line memory and converts multi-valued digital image data into analog image data. . 19, the adder circuit 21 connected to the D / A converters 18 and 19, the band elimination filter 22 connected to the adder circuit 21, and the analog image data passed through the band elimination filter 22 again. In addition to controlling the A / D converter 23 for converting the digital image data into the digital image data and the addition circuit 21, the D / A converters 18 and 19 are operated at a predetermined frequency f1. And a sampling pulse having a frequency f2 (f2 = 2 × f1: G3-G4 is assumed) according to the printing ability is supplied to the A / D converter 23 and read address to the RAM 2 and each line. It is provided with a CPU 1a for supplying write / read addresses to the memories 15 and 16. The band elimination filter 22 has a characteristic of passing a low frequency component and a high frequency component while attenuating the intermediate frequency component.

Line writing to the line memories 15 and 16 is performed as follows. That is, the image data of the odd line is written in the line memory 15, and the image data of the even line is written in the line memory 16. Specifically, for example, in the line memory 15, the image data of the first line is written. When the write command is issued while the image data is stored and the image data of the second line is stored in the line memory 16 (state 1), the image data of the third line is stored in the line memory 15. In this state (state 2), the line memory 15 stores the image data of the third line and the line memory 16 stores the image data of the second line. Then, when the next write command is issued, the image data of the fourth line is stored in the line memory 16. In this state (state 3), the image data of the fourth line is stored in the line memory 16. However, the line memory 15 stores the image data of the third line.

On the other hand, reading is performed as follows. For example, in the above state 1, the pixel data of the first line and the pixel data of the second line are sequentially read by the read command at that time (state 1-a), and when the next read command is issued, Again, the pixel data of the first line and the second line are sequentially read (state 1-b), and when the next read command is issued, the state 2 is set, and the second line and the second line are read. Each pixel data of the three lines is sequentially read (state 2-a), and when the next read command is issued, each pixel data of the second line and the third line is sequentially read again (state. 2-b), and when the next read command is issued, it is in the state 3, and pixel data of the third line and the fourth line are sequentially read (state 3-a).

Further, the adder circuit 21 is configured to perform the following arithmetic processing under the control of the CPU 1a. That is, in the state 1-b, the target line exists in the second line, so that each pixel data D2 of the second line is doubled and each pixel data D1 of the first line is doubled (2 × D2 + D1) / 3 is output. Also in the state 2-a, the target line is also present in the second line, but in this case, each pixel data D2 of the second line is doubled and each pixel data of the third line is doubled. That is, D2 is multiplied by 1 and (2 × D2 + D3) / 3 is output.

Next, the operation of the smoothing process with the above configuration will be described. For example, assume that a black circle (indicated by diagonal lines) is drawn on a document read by the transmitting side as shown in FIG. 4 (a), and that a photograph portion (indicated by dotted diagonal lines) is included. It is assumed that the read pixel data is as shown in FIG. Then, on the receiving side, it is assumed that the pixel data shown in FIG.

Here, the doubling process and the smoothing process are performed on the image data of each line. As shown in FIG. 7C, two doublings of the second line pixel data are obtained. When the line 2-A of the lines 2-A and 2-B is the line of interest, it corresponds to the state 1-b, and the pixel data D1 and D2 are read from the line memories 15 and 16. Then, the addition circuit 21 outputs (2 × D2 + D1) / 3. Next, the line 2-B is set as the line of interest. When the line 2-B is set as the line of interest, it corresponds to the above state 2-a, and the line memories 15 and 16 to the pixel data D3 and D2. Is read out, and (2 × D2 + D3) / 3 is output from the adding circuit 21. Further, next, of the two lines 3-A and 3-B obtained by doubling the pixel data of the third line, 3-A is the line of interest, which is the state 2-b. The pixel data D3 and D2 are read from the line memories 15 and 16, and the addition circuit 21 outputs (2 × D3 + D2) / 3. Next, 3-B is set as the line of interest, and when 3-B is set as the line of interest, this corresponds to state 3-a, and the pixel data D3 and D4 are read from the line memories 15 and 16. Then, (2 × D3 + D4) / 3 is output from the adder circuit 21.

Then, for example, when the line 3-B is the line of interest, (2 × D3 + D4) / 3 is output from the adder circuit 21 as described above. As shown in (a). Here, if this output is passed through a low-pass filter, it becomes a sinusoidal signal as shown in FIG. 6B, and if the slice level is SL in the figure, the X pixel portion in the figure is black. Although the pixels are treated as pixels and smoothing is performed by complementing the black pixels with X, the dither pattern of the pixels corresponding to the photograph portion is destroyed. However, since the output of the adder circuit 21 passes through the band elimination filter 22 that allows high-frequency components as well as low-frequency components to pass, the high-pass signal of FIG. 6 (c) is added to the low-pass signal of FIG. As a result, a sinusoidal signal as shown in FIG. As a result, by setting the slice level in SL in the figure and sampling at f2, smoothing processing is performed for the portion (low frequency portion) in the image data where the number of black and white change points is small, while the number of white and black change points is changed. Smoothing processing is not performed on a large portion (high frequency portion), and smoothing is performed without destroying the dither pattern, as shown in FIG.

By performing the same processing for each line of interest, a smoothed image can be obtained while maintaining the dither pattern, as shown in FIG. Further, as described above, in the present embodiment, smoothing by digital processing is not performed, and the processing of counting the number of black-and-white conversion points is not performed, so that the scale of hardware is prevented from increasing and the load of software is reduced. Can be planned.

Note that, instead of the band elimination filter 22, a low-pass filter having variable filter coefficients or a plurality of low-pass filters having different coefficients are provided, and the binary image data stored in the RAM 2 is monochrome as in the first embodiment. When the number of change points exceeds a certain value, change the variable low-pass filter to a filter coefficient that allows a somewhat higher frequency component to pass, or The degree of smoothing may be lowered by switching to a low-pass filter that allows even a slightly higher frequency component to pass.

Further, as shown in FIG. 7, the circuit configuration relating to the smoothing processing may be configured to include only a D / A converter 30, a low pass filter 31, and an A / D converter 32. According to this, although the smoothing performance is lower than that of the present embodiment, some smoothing can be performed. In addition, in the present embodiment, the circuit configuration is adapted for real-time processing, but if the configuration is such that one page of digital image data is stored in the memory, not only in the horizontal direction (main scanning direction) but also in the vertical direction (sub scanning direction). Smoothing in the scanning direction) can be easily performed with the same circuit configuration. In addition, smoothing by analog processing may be performed in one of the vertical and horizontal directions, and smoothing by digital processing may be performed in the other directions.

Further, when not receiving multi-valued digital image data but black-and-white binary image data, a D / A converter is not particularly necessary and a low-pass filter generates a sinusoidal signal. , A / D converter may be used instead of the A / D converter to obtain black-and-white binary image data again at a predetermined slice level according to the printing capability.

[0023]

[Effect of the device]

 As described above, according to the present invention, there is an effect that smoothing processing can be performed while preventing collapse of a dither pattern and blurring of a fine character portion.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a facsimile apparatus as an embodiment of the present invention.

FIG. 2 is a diagram showing a circuit configuration related to smoothing processing in a control unit.

FIG. 3 is a diagram showing a circuit configuration related to smoothing processing in another embodiment.

FIG. 4A is an explanatory view showing a document in which a black circle is drawn and has a photograph portion, FIG. 4B is an explanatory view conceptually showing the read image data, and FIG. ) Is an explanatory view showing a line of interest.

FIG. 5 is an explanatory diagram showing the progress of smoothing processing when a target line is a 3-B line.

FIG. 6 is an explanatory diagram showing image data that has been subjected to smoothing processing.

FIG. 7 is a diagram showing another circuit configuration related to smoothing processing.

[Explanation of symbols]

 1 Control Unit 1a CPU 2 RAM 15 Line Memory 16 Line Memory 18 D / A Converter 19 D / A Converter 21 Adder Circuit 22 Low Pass Filter 23 A / D Converter 50 Smoothing Processing Unit 51 Switch Unit

Claims (1)

[Scope of utility model registration request] 1. A smoothing process is performed on a portion having a small number of black-and-white change points in image data, while a smoothing process is performed on a portion having a large number of black-and-white change points with a degree of smoothing lower than that of the smoothing process. A facsimile apparatus comprising a partial smoothing processing means.