JPH06132290A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To provide a very reliable semiconductor device and to provide a method for manufacturing thereof by lightening a mechanical stress to be applied when a bump formed on an electrode pad and a lead terminal of a tape carrier are bonded. CONSTITUTION:On an electrode pad 2 on an element-formed semiconductor substrate 1, a bump base metal film 5 and a bump 8 are formed. Around the bump 8, an organic resin film 9 is so formed that the head of the bump 8 projects. By this method, the stress to be applied to the semiconductor substrate 1 is lightened without decreasing an adhesion strength between the bump 8 and the lead terminal 9 and consequently, a very reliable semiconductor device can be obtained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an assembly technique for packaging a semiconductor element, and more particularly to a bump electrode portion structure and a manufacturing method.

[0002]

2. Description of the Related Art TAB (Ta) is one of the methods for packaging semiconductor devices manufactured through various processes.
There is a pe Automated Bonding technology. This is a technique in which a semiconductor element is connected to a tape processed into a photographic film and handled. A lead pattern is formed on the film-shaped tape carrier, and protruding electrodes called bumps are formed on the electrode pads of the semiconductor element.

Bonding in the TAB technique is performed by joining the lead terminals of the tape carrier and the bumps of the semiconductor element. FIG. 8 is a cross-sectional view of a conventional bump and lead terminal during bonding. In the figure, 1 is a semiconductor substrate on which semiconductor elements are formed, 2 is an electrode pad formed on the semiconductor substrate 1, 3 is a surface protective film made of a silicon nitride film, 5 is a bump base metal film made of a barrier metal, Reference numeral 8 is a bump, and 19 is a lead terminal provided on the tape carrier.

Further, the conventional bump electrode is formed by the method shown in FIG. 9, and the steps will be sequentially described with reference to FIGS. First, an electrode pad 2 is formed on a semiconductor substrate 1 on which elements are formed, and then a silicon nitride film is deposited as a surface protection film 3 by a plasma CVD method or the like to perform patterning to open a hole on the electrode pad 2 (see FIG. 9
(A)). Next, a barrier metal layer is formed on the entire surface by a sputtering method or the like to form the bump base metal film 5. At this time, the barrier metal layer usually has a multilayer structure (FIG. 9B). Next, after applying a resist on the entire surface, a photolithography process is performed to form a resist pattern 6 and a resist opening portion 7 (FIG. 9C). Next, gold that will become the bumps 8 is deposited in the resist openings 7 by electroplating (FIG. 9).
(D)). Next, the resist pattern 6 is removed to remove the bumps 8.
Are formed (FIG. 9E). Finally, the bump underlying metal film 5 is etched using the bumps 8 as a mask (FIG. 9).
(F)).

The bumps 8 formed as described above are joined to the lead terminals 19 of the tape carrier as shown in FIG.

[0006]

Since the conventional structure and forming method of the bump 8 are as described above, as shown in FIG. 10, when the bump 8 and the lead terminal 19 of the tape carrier are pressure-bonded, the lead is applied by an external pressure. The terminal 19 is deformed,
The lead terminals 19 and the surface protection film 3 come into contact with each other directly with the surface protection film 3 or on the surface protection film 3 with the silicon scrap 21 when the semiconductor substrate 1 is diced to cut out the element. There was a problem such as. In either case, mechanical stress causes cracks 23 in the surface protective film 3 to reduce the moisture resistance and the like.

As a method for solving this problem, if the external pressure at the time of crimping the lead terminals 19 and the bumps 8 is reduced, the bonding strength between the lead terminals 19 and the bumps 8 is reduced,
There was a problem that good contact could not be obtained.

The present invention has been made in order to solve the above problems, and when the bumps 8 and the lead terminals 19 are pressure-bonded to each other, the bonding strength between the bumps 8 and the lead terminals 19 is not reduced and the surface thereof is reduced. It is an object of the present invention to obtain a structure of the bump 8 electrode portion that relieves mechanical stress on the protective film 3, and an object thereof is to provide a manufacturing method suitable for this device.

[0009]

In a semiconductor device according to a first aspect of the present invention, an organic resin film is formed around the bumps so that the bump heads protrude.

In the semiconductor device according to the second aspect of the present invention, the organic resin film is a silicone ladder resin, and its chemical formula is as follows.

[Chemical 2]

However, in the formula, R ₁ is a phenyl group or a lower alkyl group, and R ₁ may be the same or different. R ₂ is a hydrogen atom or a lower alkyl group, and R ₂ may be the same or different. n shows the integer of 2-1000.

Further, in the method of manufacturing a semiconductor device according to the third aspect of the present invention, the first step of forming the electrode pad on the semiconductor substrate on which the integrated circuit is formed, and the surface protection film over the entire surface of the electrode pad are provided. After the formation, the second step of opening the surface protection film on the electrode pad, the third step of forming the organic resin film on the entire surface thereof, and the isotropic etching of the organic resin film A fourth step of forming an opening on the electrode pad, a fifth step of forming a bump underlying metal film on the organic resin film opening, and a resist coating on the bump underlying metal film, A sixth step of opening a resist on the electrode pad, a seventh step of embedding a metal in the resist opening and then removing the resist to form a bump, and the bump using the bump as a mask Etching the underlying metal film Those having an eighth step of grayed.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: a first step of forming an electrode pad on a semiconductor substrate having an integrated circuit formed thereon; and a surface protective film on the entire surface of the electrode pad. Forming a surface protection film on the electrode pad, a third step of forming a bump base metal film on the entire surface, and a surface protection film opening on the bump base metal film. A fourth step of forming a resist pattern so as to cover the hole portion, a fifth step of etching the bump underlying metal film using the resist pattern as a mask and then removing the resist pattern, and an organic resin film over the entire surface. And a sixth step of forming a bump forming resist pattern on the organic resin film, and then using the bump forming resist pattern as a mask to change the organic resin film. To 7 which is etched openings
And an eighth step of removing the bump forming resist pattern after embedding a metal in the organic resin film opening and a part of the opening of the bump forming resist pattern. .

Further, in the method of manufacturing a semiconductor device according to a fifth aspect of the present invention, after the fifth step, a sixth step of forming a sufficiently thick organic resin film on the entire surface thereof, and on the organic resin film After forming a resist pattern for bump formation on
A seventh step of anisotropically etching the organic resin film using the bump forming resist pattern as a mask to open the holes, and removing the bump forming resist pattern, and then removing a metal in the organic resin film opening. And a ninth step of etching back the organic resin film.

According to a sixth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: a first step of forming an electrode pad on a semiconductor substrate having an integrated circuit formed thereon; and a surface protection on the entire surface of the electrode pad. A second step of forming a film, a third step of forming an organic resin film on the surface protection film, a fourth step of forming a resist pattern on the organic resin film, and a mask of the resist pattern As a fifth step of anisotropically etching the organic resin film and the surface protective film to open holes, and after removing the resist pattern,
A sixth step of forming a bump underlying metal film over the entire surface including the inside of the opening, and a seventh step of forming a bump forming resist pattern having an opening larger than the opening on the bump underlying metal film. An eighth step of forming a bump by embedding a metal in the opening and a part of the resist pattern opening for forming a bump, and after removing the resist pattern for forming a bump, using the bump as a mask And a ninth step of etching the bump underlying metal film.

[0016]

In the semiconductor device according to the present invention, since the organic resin film is formed around the bumps so that the heads of the bumps project, the bonding strength of the bumps and the lead terminals can be reduced when the bumps and lead terminals are pressure-bonded. The mechanical stress on the surface protective film can be relaxed.

[0017]

EXAMPLES Example 1. FIG. 1 is a sectional view showing the structure of a bump electrode portion according to an embodiment of the present invention. In the figure,
Since 3, 5, and 8 are the same as the conventional example, detailed description will be omitted. Reference numeral 9 denotes an organic resin film formed on the surface protective film 3, and for example, polyphenylsilsesquioxane, polyphenylvinylsilsesquioxane, polyphenylmethylsilsesquioxane, polymethylvinylsilsesquioxane, poly Methyl silsesquioxane, polyvinyl silsesquioxane and polyaryl silsesquioxane. These chemical formulas are shown below.

[0018]

[Chemical 3]

However, in the formula, R ₁ is a phenyl group or a lower alkyl group, and R ₁ may be the same or different.
R ₂ is a hydrogen atom or a lower alkyl group, and R ₂ may be the same or different. n shows the integer of 20-1000. And these organic resin films have suitable elasticity.

2A to 2D are process sectional views showing a method of forming the bump electrode portion shown in FIG. 2A to 2E will be sequentially described. First, an electrode pad 2, on a semiconductor substrate 1 on which elements are formed in the same manner as in the conventional example shown in FIG.
A silicon nitride film pattern which is the surface protection film 3 is formed.
After that, an organic resin film 9 such as polyphenylsilsesquioxane (hereinafter referred to as PPSQ) is applied on the entire surface for several μm to 20 μm
m (FIG. 2A).

Next, a resist is applied on the entire surface, and a resist pattern 10 having a resist opening portion 11 having a size equal to or larger than the opening size of the surface protective film 3 is formed by photolithography ( FIG. 2B).

Next, the PPSQ film 9 is isotropically etched using an anisole / xylene-based etching solution. At this time, the opening 12 formed in the PPSQ film 9 is formed larger than the opening formed in the surface protection film 3 (FIG. 2C).

Next, after removing the resist pattern 10, a bump underlying metal film 5 is formed by sputtering or the like so as to cover the opening 12 of the PPSQ film 9. At this time, the bump base metal film 5 may be a single layer or a multilayer (FIG. 2D).

Next, after applying a resist on the entire surface, a photolithography process is performed to form a resist pattern 13 having openings for forming the bumps 8. At this time, the opening for forming the bump 8 is formed larger than the opening for the surface protective film 3. After that, metal is embedded in the openings of the resist pattern 13 by electroplating. At this time, the height of the bump 8 is PPS.
It is formed higher than the Q film 9 (FIG. 2E).

Finally, after removing the resist pattern 13, the bump underlying metal film 5 is etched using the bumps 8 as a mask to complete the bump electrode portions (FIG. 1).

With the bump electrode structure as described above, the lead terminal 19 is attached when the bump 8 and the lead terminal 19 are pressure-bonded.
Even if the surface is deformed, as shown in FIG.
Since it is covered with the Q film 9, the lead terminals 19 do not directly contact the surface protective film 3. Further, even if the lead terminal 19 contacts the PPSQ film 9, the PPSQ film 9 absorbs the external force from the lead terminal 19 due to its cushioning property. Therefore, the surface protective film 3 is not cracked and the quality is improved.

Example 2. In the first embodiment, the PPS
Although the case where the bump underlying metal film 5 is formed after the Q film is isotropically etched is shown, the PPSQ film 9 is formed after the bump underlying metal film 5 is formed as shown in FIG. 4, and then the PPSQ film is formed. The film 9 may be anisotropically etched. 4A to 4I show a method of forming the bump electrode portion according to the second embodiment.

First, similarly to FIG. 2A, the electrode pad 2 and the surface protective film 3 are formed on the semiconductor substrate 1 on which the elements are formed (FIG. 4A). Next, the bump base metal film 5 is formed on the entire surface.
Are formed by using a sputtering method (FIG. 4B). next,
After applying a resist on the entire surface, a resist pattern 14 is formed by photoengraving so as to completely cover the openings of the surface protective film 3 (FIG. 4C). Next, the bump underlying metal film 5 is etched using the resist pattern 14 as a mask, and then the resist pattern 14 is removed (FIG. 4).
(D)).

Next, the PPSQ film 9 is applied on the entire surface and heat-treated (FIG. 4E). Next, after applying a resist on the entire surface, a photolithography process is performed to form a resist pattern 15 having openings equal to or smaller than the openings of the surface protective film 3 (FIG. 4 (f)). . Next, using the resist pattern 15 as a mask and using CF ₄ + O ₂ -based gas, P
The PSQ film 9 is anisotropically etched. At this time, the sidewall of the opening of the PPSQ film 9 is perpendicular to the semiconductor substrate 1 due to the nature of etching (FIG. 4 (g)).

Next, the buried bumps 8 are formed of metal by electroplating in the openings of the PPSQ film 9 and the resist pattern 15. At this time, the height of the bump 8 is PPSQ.
Since it is necessary to form it higher than the film 9, the upper surface of the bump 8 extends beyond the opening of the PPSQ film 9 and reaches the opening of the resist pattern 15 (FIG. 4 (h)). Finally, the resist pattern 15 is removed. As a result, the PPSQ film 9 is formed in close contact with the sidewall of the bump 8, and the upper surface of the bump 8 can be formed at a position higher than the upper surface of the PPSQ film 9 (FIG. 4 (i)).

As described above, the PPSQ film 9 and the bumps 8 are formed.
Is formed, the side wall of the bump 8 is perpendicular to the semiconductor substrate 1, and the side wall of the bump 8 and the PPSQ film 9 are in close contact with each other, so that there is no room for silicon chips and the like to form the lead terminal 19 and the bump 8. Crimping can be performed even better.

Example 3. In the second embodiment, as shown in FIG.
As shown in (h), the bump 8 is formed over two layers of the PPSQ film 9 and the resist pattern 15. However, as shown in FIG. 5, by coating the PPSQ film 9 sufficiently thickly, the PPSQ film 1 layer is formed. You may form. FIG. 5 (a)-
FIG. 4D is a bump electrode forming method of Example 3, and FIG.
This is performed after the step (d). First, the steps of FIGS. 4A to 4D are performed in the same manner as in the second embodiment. Next, the PPSQ film 9 is applied on the entire surface. At this time PPSQ
The thickness of the film 9 is sufficiently thicker than the height of the bump 8 (FIG. 5).
(A)). Next, after forming a resist pattern 15 in the same manner as in FIG. 4F, anisotropic etching is performed using CF ₄ + O ₂ based gas using the resist pattern 15 as a mask to open the PPSQ film 9. After that, resist pattern 1
5 is removed (FIG. 5 (b)).

Next, the bumps 8 are formed in the openings by electroplating.
A metal is embedded up to the height required for (FIG. 5C). After that, the PPSQ film 9 is etched back to a predetermined film thickness by using CF ₄ + O ₂ based gas. As a result, the upper surface of the bump 8 is formed at a position higher than the upper surface of the PPSQ film (FIG. 5).
(D)).

When the PPSQ film 9 is formed sufficiently thick as described above, the resist on the PPSQ film 9 can be formed thin and a fine resist pattern 15 can be formed. Also,
Since the PPSQ film 9 pattern is formed by etching back, the pattern accuracy after etching is also good. That is, it becomes easier to form fine bump electrodes.

Example 4. In the above-mentioned Examples 1, 2 and 3, the case where the surface protective film 3 on the electrode pad 2 had already been opened when the PPSQ film 9 was applied was shown, but as shown in FIG. The PPSQ film 9 may be applied without forming the holes. 6A to 6H show a bump electrode forming method according to the fourth embodiment.

First, the electrode pad 2 is formed on the semiconductor substrate 1 on which the element is formed, and the surface protective film 3 is formed on the entire surface (FIG. 6A). Next, the PPSQ film 9 is applied on the entire surface.
(FIG.6 (b)). Next, a resist is applied to the entire surface, and a resist pattern 10 having a resist opening 11 having the same size as the opening of the surface protective film 3 is formed by photolithography (FIG. 6C). Next, the PPSQ film 9 is anisotropically etched using CF ₄ + O ₂ based gas with the resist pattern 10 as a mask. Then, the surface protection film 3 is anisotropically etched using the same type of gas to form the opening 12. At this time, due to the property of anisotropic etching, the side wall of the opening 12 has a side wall of the opening 12.
It is almost perpendicular to the bottom surface (Fig. 6 (d)). Next, after removing the resist pattern 10, the bump underlying metal film 5 is formed by sputtering or the like so as to cover the opening 12 (FIG. 6).
(E)).

Next, after applying a resist, a photoengraving process is performed to form a resist pattern 13 having openings for forming the bumps 8. At this time, the opening of the resist pattern 13 is formed larger than the opening 12 of the surface protective film 3 (FIG. 6 (f)). Next, the resist pattern 13 and PP
The bumps 8 are formed by embedding a metal in the openings of the SQ film 9 by electroplating (FIG. 6G). Finally, after removing the resist pattern 13, the bump underlying metal film 5 is etched using the bump 8 as a mask to complete the bump electrode portion (FIG. 6 (h)).

When the electrode portion of the bump 8 is formed as described above, the PPSQ film 9 and the surface protection film 3 are opened by the same mask, so that one photolithography process can be reduced.

Example 5. Although the bump electrode forming method in the case where the electrode wiring in the semiconductor device has one layer is shown in the above Examples 1 to 4, the electrode wiring may be a multilayer wiring having two or more layers as shown in FIG. 7A to 7G show a bump electrode forming method for a semiconductor device having two layers of electrode wiring. First, the electrode pad 2 of the first layer is formed on the semiconductor substrate 1 on which the element is formed, the surface protective film 3 is formed on the entire surface, and then the surface protective film 3 on the electrode pad 2 of the first layer is opened. Then, the connection hole 4 with the second wiring layer is formed (FIG. 7A). Next, the underlying metal film 2 is formed by a sputtering method or the like so as to cover the connection hole 4.
Form 2. This base metal film 22 becomes a barrier layer,
It may be a single layer or a multilayer. Further, the base metal film 22 is covered to form the second wiring layer 16 made of gold having high corrosion resistance (FIG. 7B). Next, the second wiring layer 16 is formed by using a resist pattern (not shown) formed by photolithography as a mask.
Then, the underlying metal film 22 is etched to form the second wiring layer pattern 16 (FIG. 7C).

Next, the PPSQ film 9 is applied on the entire surface and heat-treated (FIG. 7D). Next, a resist is applied to the entire surface, and then photolithography is performed to form a resist pattern 17 for forming bump electrodes (FIG. 7E). Next, the PPSQ film 9 is etched using CF ₄ + O ₂ based gas with the resist pattern 17 as a mask. After that, the bumps 8 are formed by embedding metal in the openings of the PPSQ film 9 and the resist pattern 17 by electroplating (FIG. 7).
(F)). Finally, the resist pattern 17 is removed to form bump electrode portions (FIG. 7G).

Also in a semiconductor device having two or more multi-layered wiring layers, the base metal film 22 and the gold 16 are used for the wiring layers, and the PPSQ film 9 is used for the insulating film so that the bump electrode portions are similarly laminated. Can be formed. Therefore, the relaxation of the mechanical stress on the surface protective film 3 is further improved.

Example 6. In addition, in Examples 1 to 5 described above, PPSQ which is a silicone ladder resin is used as the organic resin film.
Although an example using is shown, even if a polyimide resin is used, the same effect as that of the above-described embodiment can be obtained.

[0043]

As described above, according to the present invention, the organic resin film is provided around the bumps so that the bump heads project, so that when the bumps and the external terminals are pressure bonded, the semiconductor The pressure that the device receives from the outside can be relaxed by the cushioning property of the organic resin film, and cracks can be prevented from entering the protective film of the semiconductor device. Therefore, the stress on the semiconductor substrate is relieved without lowering the bonding strength between the bump and the lead terminal, and a highly reliable semiconductor device can be obtained.

[Brief description of drawings]

FIG. 1 is a sectional view showing a bump electrode structure according to a first embodiment of the present invention.

2A to 2D are process cross-sectional views showing a bump electrode forming method according to a first embodiment of the present invention.

FIG. 3 is a cross-sectional view at the time of bonding the bump electrode and the external terminal according to the first embodiment of the present invention.

FIG. 4 is a process sectional view showing a bump electrode forming method according to a second embodiment of the present invention.

FIG. 5 is a process sectional view showing a bump electrode forming method according to a third embodiment of the present invention.

FIG. 6 is a process sectional view showing a bump electrode forming method according to a fourth embodiment of the present invention.

FIG. 7 is a process sectional view showing a bump electrode forming method according to a fifth embodiment of the present invention.

FIG. 8 is a cross-sectional view at the time of bonding a conventional bump electrode and an external terminal.

FIG. 9 is a process sectional view showing a conventional bump electrode forming method.

FIG. 10 is a cross-sectional view at the time of bonding a conventional bump electrode and an external terminal.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Electrode pad 3 Surface protection film 5 Bump underlying metal film 8 Bump 9 Organic resin film 10, 13, 14, 15 Resist pattern 11, 12 Opening portion 19 Lead terminal

Claims (6)

[Claims] 1. A semiconductor device in which an electrode pad, which serves as an input / output terminal of an integrated circuit formed on a semiconductor substrate, and an external terminal are bonded via a bump, wherein the bump head is projected around the bump. A semiconductor device characterized in that an organic resin film is formed on. 2. The semiconductor device according to claim 1, wherein the organic resin film is a silicone ladder resin and the chemical formula thereof is the following formula. [Chemical 1] However, in the formula, R ₁ is a phenyl group or a lower alkyl group, and R ₁ may be the same or different. R ₂ is a hydrogen atom or a lower alkyl group, and R ₂ may be the same or different. n shows the integer of 20-1000. 3. A first step of forming an electrode pad on a semiconductor substrate on which an integrated circuit is formed, a surface protective film is formed on the entire surface of the electrode pad, and then the surface protective film on the electrode pad is opened. The second step of forming a hole, the third step of forming an organic resin film on the entire surface thereof, and the fourth step of isotropically etching the organic resin film to form an opening on the electrode pad. And a fifth step of forming a bump underlying metal film in the organic resin film opening, and a sixth step of applying a resist on the bump underlying metal film and then opening the resist on the electrode pad. And a seventh step of embedding a metal in the resist opening and then removing the resist to form a bump, and an eighth step of etching the bump base metal film using the bump as a mask. Claim 1 characterized by the above. A method for manufacturing a semiconductor device as described above. 4. A first step of forming an electrode pad on a semiconductor substrate on which an integrated circuit is formed, a surface protection film is formed on the entire surface of the electrode pad, and then a surface protection film on the electrode pad is opened. And a third step of forming a bump underlying metal film on the entire surface thereof, and a fourth step of forming a resist pattern on the bump underlying metal film so as to cover the surface protection film opening portion. A fifth step of etching the bump underlying metal film using the resist pattern as a mask, and then removing the resist pattern, a sixth step of forming an organic resin film on the entire surface thereof, and a step of forming an organic resin film on the organic resin film. After forming a resist pattern for bump formation on the above, a hole is formed by anisotropically etching the organic resin film using the resist pattern for bump formation as a mask.
And an eighth step of removing the bump forming resist pattern after burying metal in the organic resin film opening and a part of the opening of the bump forming resist pattern. The method for manufacturing a semiconductor device according to claim 1. 5. After the fifth step according to claim 4, a sixth step of forming a sufficiently thick organic resin film on the entire surface, and after forming a bump forming resist pattern on the organic resin film, A seventh step of anisotropically etching and opening the organic resin film by using the bump forming resist pattern as a mask, and removing the bump forming resist pattern, and then removing metal in the organic resin film opening. 2. The method for manufacturing a semiconductor device according to claim 1, further comprising: an eighth step of embedding a bump to form a bump, and a ninth step of etching back the organic resin film. 6. A first step of forming an electrode pad on a semiconductor substrate on which an integrated circuit is formed, a second step of forming a surface protective film on the entire surface of the electrode pad, and a surface of the surface protective film. A third step of forming an organic resin film on the organic resin film, and a fourth step of forming a resist pattern on the organic resin film,
A fifth step of anisotropically etching the organic resin film and the surface protective film using the resist pattern as a mask to form holes
And the step of removing the resist pattern, and thereafter forming a bump underlying metal film on the entire surface including the inside of the opening.
And a seventh step of forming a bump forming resist pattern having an opening portion larger than the opening portion on the bump underlying metal film, and in the opening portion and the bump forming resist pattern opening portion. An eighth step of forming a bump by embedding a metal in a part of the above, and a ninth step of removing the bump forming resist pattern and then etching the bump base metal film using the bump as a mask. The method of manufacturing a semiconductor device according to claim 1, wherein