JP2003273147A - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof

Info

Publication number
JP2003273147A
JP2003273147A JP2002075636A JP2002075636A JP2003273147A JP 2003273147 A JP2003273147 A JP 2003273147A JP 2002075636 A JP2002075636 A JP 2002075636A JP 2002075636 A JP2002075636 A JP 2002075636A JP 2003273147 A JP2003273147 A JP 2003273147A
Authority
JP
Japan
Prior art keywords
metal
film
metal film
pad electrode
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002075636A
Other languages
Japanese (ja)
Other versions
JP3733077B2 (en
Inventor
Tsutomu Ohara
務 大原
Kazuhiko Terajima
寺嶋  一彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP2002075636A priority Critical patent/JP3733077B2/en
Publication of JP2003273147A publication Critical patent/JP2003273147A/en
Application granted granted Critical
Publication of JP3733077B2 publication Critical patent/JP3733077B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector

Abstract

<P>PROBLEM TO BE SOLVED: To resolve the problem that the strength of a bump base, employing a resin material as a nucleus and covering the whole of the surface of the same by a conductive film, is short whereby breakage occurs in an interface between a projected part 21 composed of resin and a metal film 17 upon connecting the bump base to a circuit board or the like. <P>SOLUTION: A metal film 17 formed on a pad electrode 13 composed of a base metal and on the surface of which a noble metal is arranged is formed with an opening 25 to stably connect the projected part 21 composed of the resin to the pad electrode 13 and ensure the electrical connection between the conductive film 23, formed on the upper layer of the metal film 17 and the pad electrode 13. According to this constitution, the breakage occurring in the interface between the bump base and the metal film is prevented. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は半導体装置の構造お
よび製造方法に関し、さらに詳しくは半導体基板に形成
した複数のパッド電極と、前記パッド電極を露出して前
記半導体基板上を覆った絶縁膜と、前記各パッド電極に
接続して前記絶縁膜上に形成したバンプ下地となる金属
膜と、その金属膜上に形成した樹脂からなる突起部と、
その突起部を覆うとともに前記金属膜と接続する導電性
被膜を有する半導体装置の構造およびその半導体装置の
製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a semiconductor device and a method of manufacturing the same, and more particularly, to a plurality of pad electrodes formed on a semiconductor substrate and an insulating film exposing the pad electrodes and covering the semiconductor substrate. A metal film which is connected to each pad electrode and serves as a bump underlayer formed on the insulating film, and a protrusion formed of a resin formed on the metal film,
The present invention relates to a structure of a semiconductor device having a conductive film that covers the protrusion and is connected to the metal film, and a method of manufacturing the semiconductor device.

【0002】[0002]

【従来の技術】電子機器の小型化が望まれる中で、機能
をそのままで半導体基板自身の大きさが小型化され、複
数のパッド電極ピッチを狭くした半導体装置の需要が高
まってきている。そのパッド電極ピッチを狭小化するた
めに、半導体基板のパッド電極上もしくは回路基板の電
極上に狭い間隔でバンプを形成し、半導体基板の能動素
子面を回路基板側に向けて半導体基板を回路基板へ接続
するフリップチップ方式(以下、FC方式と称す。)
と、半導体基板のパッド電極に対応したリードに一括で
接続するテープ・オートメイテッド・ボンディング方式
(以下、TAB方式と称す。)により電極ピッチを狭小
化した実装体を形成している。
2. Description of the Related Art With the demand for miniaturization of electronic equipment, the size of the semiconductor substrate itself has been miniaturized while maintaining its function, and the demand for semiconductor devices having a plurality of pad electrode pitches narrowed has been increasing. In order to narrow the pad electrode pitch, bumps are formed on the pad electrodes of the semiconductor substrate or the electrodes of the circuit board at narrow intervals, and the active substrate surface of the semiconductor substrate faces the circuit board side. Flip-chip method (hereinafter referred to as FC method)
Then, a mounting body having a narrowed electrode pitch is formed by a tape automated bonding method (hereinafter referred to as a TAB method) in which the leads corresponding to the pad electrodes of the semiconductor substrate are collectively connected.

【0003】狭小化した電極ピッチへの対応できる技術
の一つに、樹脂材料を核にして、その表面全体を導電性
の膜で覆ったタイプの樹脂バンプが考案されている。
As one of the techniques capable of coping with the narrowed electrode pitch, a resin bump in which a resin material is used as a core and the entire surface thereof is covered with a conductive film has been devised.

【0004】この樹脂バンプはバンプ材料自体に弾性が
あるため、熱応力などに強い。半導体装置を回路基板へ
接続する際に熱圧着法などを用いた場合、回路基板へ半
導体基板を接続するときの半導体装置を加熱した温度と
常温との温度差により、半導体装置使用中のバンプに
は、半導体基板と回路基板との線膨張係数の差に起因す
る熱応力が掛かることとなる。金属からなるバンプに比
べて、樹脂からなるバンプは弾性があるためにこの熱応
力にも耐えることができ、半導体装置としての長期信頼
性に優れている。また、回路基板側の電極に高さばらつ
きがあったとしても、そのばらつきを柔らかいバンプが
補完することができるので、安定して回路基板と半導体
基板を接続できるという長所がある。
Since the resin bump itself has elasticity, the resin bump is resistant to thermal stress. When a thermocompression bonding method is used to connect the semiconductor device to the circuit board, the bumps during use of the semiconductor device may be affected by the temperature difference between the temperature at which the semiconductor device is heated and the room temperature when connecting the semiconductor substrate to the circuit board. Causes thermal stress due to the difference in linear expansion coefficient between the semiconductor substrate and the circuit board. Compared to metal bumps, resin bumps have elasticity and therefore can withstand this thermal stress, and are excellent in long-term reliability as a semiconductor device. Further, even if there is a height variation in the electrodes on the circuit board side, the variation can be complemented by the soft bumps, so that there is an advantage that the circuit board and the semiconductor substrate can be stably connected.

【0005】以下、図3の断面図を参照しながら、従来
のバンプの構造およびバンプの製造方法について説明す
る。以下の説明では、FC方式によって半導体基板を回
路基板へ接続する場合を例にしている。
A conventional bump structure and bump manufacturing method will be described below with reference to the sectional view of FIG. In the following description, the case where the semiconductor substrate is connected to the circuit board by the FC method is taken as an example.

【0006】図3(d)に示すように、従来の半導体装
置の構造は、半導体基板11上にパッド電極13を有
し、半導体基板11の表面全面を覆いパッド電極13上
に開口部を持つ絶縁膜15と、その絶縁膜15の開口部
を覆うように設けるパッド下地となる金属膜30と、そ
の金属膜30上に設ける樹脂からなる突起部21と、そ
の突起部21の表面および露出している金属膜30を覆
うように設ける導電性被覆23により構成される樹脂バ
ンプ27とからなっている。
As shown in FIG. 3D, the structure of the conventional semiconductor device has a pad electrode 13 on the semiconductor substrate 11, covers the entire surface of the semiconductor substrate 11, and has an opening on the pad electrode 13. The insulating film 15, the metal film 30 that serves as a pad underlayer provided so as to cover the opening of the insulating film 15, the protrusion 21 made of resin provided on the metal film 30, and the surface and the exposed portion of the protrusion 21. And a resin bump 27 formed of a conductive coating 23 provided so as to cover the metal film 30.

【0007】つづいて、以上に説明した従来構造のバン
プの製造方法を、図3の(a)〜(d)を用いて説明す
る。まず図3(a)に示すように、半導体基板11上に
設けられたパッド電極13が露出するように、パッド電
極13上を開口させて半導体基板11の表面全面に絶縁
膜15を形成する。この絶縁膜15はリンを含有する酸
化シリコン膜や、窒化シリコン膜などの無機質膜や、ポ
リイミド樹脂などの有機高分子膜や、これら無機質膜と
有機高分子膜との積層構造を使用用途に応じて選択して
形成する。
Next, a method of manufacturing the bump having the above-described conventional structure will be described with reference to FIGS. First, as shown in FIG. 3A, the insulating film 15 is formed on the entire surface of the semiconductor substrate 11 by opening the pad electrode 13 so that the pad electrode 13 provided on the semiconductor substrate 11 is exposed. As the insulating film 15, a silicon oxide film containing phosphorus, an inorganic film such as a silicon nitride film, an organic polymer film such as a polyimide resin, or a laminated structure of these inorganic film and organic polymer film is used depending on the intended use. Select and form.

【0008】つぎに図3(b)に示すように、パッド電
極13を含む絶縁膜15表面にバンプ下地となる金属膜
30を形成する。この金属膜30の形成方法は、スパッ
タリング法や真空蒸着法などによってパッド電極13上
の開口部を含む絶縁膜15表面に形成した後に、フォト
リソグラフィ法およびエッチング法によって不要な箇所
の金属膜を除去して、少なくともパッド電極13を覆う
ように形成する。一般的に、バンプ下地となる金属膜3
0は、パッド電極13と密着が良く、しかも電気的な導
通を良好とする図には明示しないが第1の金属層を、更
にその上層には、その第1の金属層と十分密着するとと
もに、樹脂からなる突起部21との接合強度が良好な第
2の金属層を設け、パッド電極13と突起部21とを安
定した状態で接合した半導体装置とすることができる。
Next, as shown in FIG. 3B, a metal film 30 serving as a bump underlayer is formed on the surface of the insulating film 15 including the pad electrode 13. This metal film 30 is formed by forming a metal film on an unnecessary portion by a photolithography method and an etching method after forming the metal film 30 on the surface of the insulating film 15 including the opening on the pad electrode 13 by a sputtering method or a vacuum deposition method. Then, it is formed so as to cover at least the pad electrode 13. Generally, a metal film 3 that serves as a bump base
0 indicates good adhesion to the pad electrode 13 and good electrical conduction, although not clearly shown in the figure, and the first metal layer is further closely adhered to the first metal layer as well as the first metal layer. It is possible to provide a semiconductor device in which the pad electrode 13 and the protruding portion 21 are stably joined by providing the second metal layer having good bonding strength with the protruding portion 21 made of resin.

【0009】つづいて図3(c)に示すように、前記金
属膜30上に樹脂からなる突起部を形成する。その樹脂
からなる突起部には感光性の樹脂を用いる。まず、樹脂
の加熱硬化後の膜減りを考慮して、突起部21が最終的
に所望の高さとなるように感光性の樹脂をスピンコート
法によって半導体基板11上の全面に形成する。つぎに
フォトリソグラフィ法によって所望のパターンを形成
し、熱処理をおこなって目的の形状の突起部21を得
る。
Subsequently, as shown in FIG. 3C, a protrusion made of resin is formed on the metal film 30. A photosensitive resin is used for the protrusion made of the resin. First, in consideration of the film loss after heat curing of the resin, a photosensitive resin is formed on the entire surface of the semiconductor substrate 11 by a spin coating method so that the projection 21 finally has a desired height. Next, a desired pattern is formed by the photolithography method, and heat treatment is performed to obtain the projection 21 having the desired shape.

【0010】つぎに図3(d)に示すように、前記樹脂
からなる突起部21の露出した面全面および金属膜30
の露出した面上に、クロムと金の二層構造からなる導電
性被膜23をスパッタリング法によって形成した後、フ
ォトリソグラフィ法およびエッチング法によって前記突
起部21上および前記金属膜30上のみに選択的に形成
し、樹脂バンプ27が搭載された従来構成の半導体装置
が完成する。
Next, as shown in FIG. 3D, the entire exposed surface of the protrusion 21 made of the resin and the metal film 30.
A conductive coating film 23 having a double-layered structure of chromium and gold is formed on the exposed surface of the substrate by a sputtering method, and then is selectively formed only on the protrusions 21 and the metal film 30 by a photolithography method and an etching method. Then, the semiconductor device having the conventional structure in which the resin bumps 27 are mounted is completed.

【0011】[0011]

【発明が解決しようとする課題】しかしながら、前記第
2の金属層に単に密着性および導電性だけを満足する層
を設けると、以下の不具合が生ずる。
However, if the second metal layer is provided with a layer satisfying only adhesion and conductivity, the following problems will occur.

【0012】ここで、前記第2の金属層に例えばCu
を、樹脂からなる突起部21にポリイミド樹脂を用いた
場合を想定して説明する。バンプ下地となる前記第2の
金属層パターンを形成後、熱処理後の膜減りを考慮して
半導体基板11全面にポリイミドを所望の厚みに塗布
し、所望の形状の突起部21パターンをフォトリソグラ
フィ法により形成するのであるが、このフォトリソグラ
フィ法の後に施す熱処理によりCu−C−Oの結合を有
する反応性生物が形成されることが知られている。この
結合により、前記突起部21と前記第2の金属層は確実
に接合されることとなるが、その突起部21のパターン
形成で除去された第2の金属層上にもこの反応性生物が
形成される。その反応生成物は、化学的または物理的な
エッチン法において除去することは困難である。また、
この反応生成物が第2の金属層上に残ったまま導電性被
膜23を配すると、パッド電極13と導電性被膜23と
の電気的導通が阻害されてしまい、その結果、樹脂バン
プ27と回路基板との電極とで形成される実装体の電気
的な導通が不安定となる。
Here, for example, Cu is added to the second metal layer.
Will be described on the assumption that a polyimide resin is used for the protrusion 21 made of resin. After forming the second metal layer pattern serving as the bump base, polyimide is applied to the entire surface of the semiconductor substrate 11 in a desired thickness in consideration of the film loss after the heat treatment, and the projection 21 pattern having a desired shape is formed by the photolithography method. It is known that a heat treatment performed after this photolithography method forms a reactive organism having a Cu—C—O bond. By this bonding, the protrusion 21 and the second metal layer are surely joined, but this reactive organism is also present on the second metal layer removed by the pattern formation of the protrusion 21. It is formed. The reaction products are difficult to remove by chemical or physical etch methods. Also,
If the conductive coating film 23 is disposed while the reaction product remains on the second metal layer, the electrical conduction between the pad electrode 13 and the conductive coating film 23 will be hindered, and as a result, the resin bump 27 and the circuit. The electrical continuity of the mounting body formed by the substrate and the electrode becomes unstable.

【0013】それに対し、酸化物を形成し難い、つまり
イオン化傾向が小さい金属として例えばAu等を前記第
2の金属層に配置した場合について以下に説明する。前
記第2の金属層にAuを配すると、この第2の金属層と
樹脂からなる突起部21とがその突起部21周辺で反応
生成物を形成するのを防ぐことができる。
On the other hand, a case in which Au or the like is placed in the second metal layer as a metal which hardly forms an oxide, that is, has a small ionization tendency will be described below. By disposing Au in the second metal layer, it is possible to prevent the second metal layer and the protrusion 21 made of resin from forming a reaction product around the protrusion 21.

【0014】しかし、第2の金属層であるAuは、イオ
ン化傾向が低い。つまり酸化され難いAuであるので、
樹脂からなる突起部21と密着性の高い接合ができず、
実装体形成中、または実装体形成後に外部からその接合
箇所に応力が掛かると金属膜30と突起部21との界面
でバンプが破断してしまうことがあり、この構成も装置
信頼性の面で問題がある。
However, Au, which is the second metal layer, has a low ionization tendency. In other words, since it is Au that is difficult to oxidize,
It is not possible to join the protrusion 21 made of resin with high adhesion,
If stress is applied to the joint portion from the outside during or after the mounting body is formed, the bump may be broken at the interface between the metal film 30 and the protruding portion 21, and this configuration also has a device reliability aspect. There's a problem.

【0015】本発明の目的は、上記課題を解決して、従
来の樹脂バンプの機能を備えたままで、複数の樹脂バン
プを狭い間隔で配してもバンプの基部の密着力が強い樹
脂バンプの構造およびそのバンプの製造方法を提供する
ことである。
It is an object of the present invention to solve the above problems and to provide a resin bump having a strong adhesive force at the base of the bump even if a plurality of resin bumps are arranged at a narrow interval while maintaining the function of the conventional resin bump. It is to provide a structure and a method of manufacturing the bump thereof.

【0016】[0016]

【課題を解決するための手段】上記目的を達成するため
に、本発明のバンプの構造およびバンプの製造方法は、
下記記載の方法を採用する。
In order to achieve the above object, the bump structure and bump manufacturing method of the present invention are
Use the method described below.

【0017】本発明の半導体装置は、半導体基板に形成
した複数のパッド電極と、前記パッド電極を露出して前
記半導体基板上を覆った絶縁膜と、前記各パッド電極に
接続して前記絶縁膜上に形成したバンプ下地となる金属
膜と、その金属膜上に形成した樹脂からなる突起部と、
その突起部を覆うとともに前記金属膜と接続する導電性
被膜を有する半導体装置において、前記パッド電極の表
面材料が卑金属であり、前記金属膜には前記突起部と前
記パッド電極が当接できるように、かつ前記金属膜と前
記パッド電極の接続箇所を残して開口部が形成されてお
り、その金属膜の表面材料に貴金属を配したことを特徴
とする。
The semiconductor device of the present invention comprises a plurality of pad electrodes formed on a semiconductor substrate, an insulating film that exposes the pad electrodes and covers the semiconductor substrate, and the insulating film that is connected to each pad electrode. A metal film serving as a bump base formed above, and a protrusion made of resin formed on the metal film,
In a semiconductor device having a conductive film that covers the protrusion and is connected to the metal film, the surface material of the pad electrode is a base metal, and the protrusion and the pad electrode can contact the metal film. Moreover, an opening is formed leaving a connection portion between the metal film and the pad electrode, and a noble metal is arranged as a surface material of the metal film.

【0018】本発明の半導体装置は、前記貴金属が、
金、銀、白金族のいずれかを主成分とした金属であるこ
とを特徴とする。
In the semiconductor device of the present invention, the noble metal is
It is characterized by being a metal whose main component is any one of gold, silver and platinum group.

【0019】本発明の半導体装置の製造方法は、半導体
基板上に形成された卑金属からなる複数のパッド電極
と、少なくともパッド電極の一部を露出させた絶縁膜
と、突起部と前記パッド電極が直に接合できるように、
かつ金属膜と前記パッド電極の接続箇所を残した前記パ
ッド電極のサイズ以下の開口部を有する金属膜を形成す
る工程と、その開口部を介して前記パッド電極に当接す
るように樹脂からなる突起部を形成する工程と、前記突
起部を覆うとともに前記金属膜と接続する導電性被膜を
形成する工程とを有することを特徴とする。
According to the method of manufacturing a semiconductor device of the present invention, a plurality of pad electrodes made of a base metal formed on a semiconductor substrate, an insulating film exposing at least a part of the pad electrodes, a protrusion and the pad electrodes are provided. So that they can be joined directly
And a step of forming a metal film having an opening not larger than the size of the pad electrode, which leaves a connection portion between the metal film and the pad electrode, and a protrusion made of resin so as to come into contact with the pad electrode through the opening. A step of forming a portion and a step of forming a conductive film that covers the protrusion and is connected to the metal film.

【0020】[0020]

【発明の実施の形態】本発明の半導体装置の構造および
製造方法について詳細に図面に基づいて説明する。図1
は、本発明の半導体装置の構造を説明するための構造断
面図である。なお、本発明の半導体装置の説明で、従来
技術で用いた部材と同じ構成のものは同一符号を付けて
説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure and manufacturing method of a semiconductor device of the present invention will be described in detail with reference to the drawings. Figure 1
FIG. 3 is a structural cross-sectional view for explaining the structure of a semiconductor device of the present invention. In the description of the semiconductor device of the present invention, the same components as those used in the prior art will be designated by the same reference numerals.

【0021】本発明の半導体装置は、卑金属を表面に配
したパッド電極13を有する半導体基板11上に、前記
パッド電極13を露出させるように開口部を有する絶縁
膜15と、前記パッド電極13が露出するように開口部
25を設けて形成されるバンプ下地となる金属膜17
と、その開口部を介して前記パッド電極13と直接接合
するとともに、前記金属膜17上に形成される樹脂から
なる突起部21と、その突起部21の表面および露出し
た前記金属膜17とを被覆する導電性被膜23とが形成
された樹脂バンプ27が配置された構造である。
In the semiconductor device of the present invention, the insulating film 15 having an opening for exposing the pad electrode 13 and the pad electrode 13 are formed on the semiconductor substrate 11 having the pad electrode 13 on the surface of which a base metal is arranged. A metal film 17 serving as a bump base formed by providing the opening 25 so as to be exposed
And a protrusion 21 made of resin formed on the metal film 17 and the metal film 17 exposed on the surface of the protrusion 21 while being directly bonded to the pad electrode 13 through the opening. This is a structure in which the resin bumps 27 on which the conductive film 23 to be covered are formed are arranged.

【0022】この構成を採用することで、樹脂からなる
突起部21の加熱処理後でも、前記金属膜17表面に貴
金属を用いているために、前記突起電極周辺ではこの貴
金属と突起部を形成する樹脂材料とで反応生成物は形成
されない。よって、前記導電性被膜23とパッド電極1
3との電気的な接続は良好となる。また、前記貴金属を
表面に配した金属膜17は、樹脂からなる突起部21と
接している箇所の密着性が良くないが、前記金属膜17
に開口部25を設けて前記突起部21が卑金属からなる
パッド電極13と直接接触する構造を採用している。そ
のため、卑金属からなるパッド電極13の表面材料がバ
ンプ製造工程の熱処理により酸化し、突起部21の樹脂
材料と強い結合を形成し、樹脂バンプの基部を強固した
半導体装置とすることができる。よって、複数の樹脂バ
ンプを狭い間隔で配しても、バンプ基部の密着力が強い
樹脂バンプを得ることができる。
By adopting this configuration, since the noble metal is used for the surface of the metal film 17 even after the heat treatment of the protrusion 21 made of resin, the noble metal and the protrusion are formed around the protrusion electrode. No reaction product is formed with the resin material. Therefore, the conductive film 23 and the pad electrode 1
The electrical connection with 3 is good. Further, the metal film 17 having the noble metal on the surface does not have good adhesion at a portion in contact with the protrusion 21 made of resin.
A structure is employed in which an opening 25 is provided in the base plate and the projection 21 directly contacts the pad electrode 13 made of a base metal. Therefore, the surface material of the pad electrode 13 made of a base metal is oxidized by the heat treatment in the bump manufacturing process to form a strong bond with the resin material of the protrusion 21, and the base of the resin bump can be made a strong semiconductor device. Therefore, even if a plurality of resin bumps are arranged at narrow intervals, it is possible to obtain a resin bump having a strong adhesion to the bump base.

【0023】(実施例)以下、図面にもとづいて本発明
の半導体装置の製造方法について説明する。図2は、そ
の半導体装置の製造方法を説明するための工程断面図で
ある。
(Embodiment) A method for manufacturing a semiconductor device of the present invention will be described below with reference to the drawings. 2A to 2D are process cross-sectional views for explaining the method for manufacturing the semiconductor device.

【0024】図2(a)に示す様に、まずシリコンウェ
ハーの半導体基板11の能動素子面に卑金属であるアル
ミニウムを主成分とする材料でパッド電極13を形成
し、前記パッド電極13の少なくとも一部が露出す様に
開口を設けた半導体基板11上に絶縁膜15を形成し
た。前記絶縁膜15の材質は窒化シリコン膜で、窒化シ
リコン膜の厚みは1ミクロンである。窒化シリコン膜は
化学気相成長法によって形成し、フォトリソグラフィ法
およびエッチング法によって前記パッド電極13上に開
口部を設けた。続いて、その上層に金属膜17を形成し
て図2(a)の構造体を得た。その金属膜17にはCr
とAuの二層積層構造とした。CrおよびAuは放電ガ
スにArを用いたスパッタリング法によって形成し、C
rの膜厚は0.05ミクロン、Auの膜厚は0.3ミク
ロンとした。
As shown in FIG. 2A, first, a pad electrode 13 is formed on the active element surface of a semiconductor substrate 11 of a silicon wafer by using a material containing aluminum as a base metal as a main component, and at least one of the pad electrodes 13 is formed. An insulating film 15 was formed on the semiconductor substrate 11 having an opening so that the portion was exposed. The material of the insulating film 15 is a silicon nitride film, and the thickness of the silicon nitride film is 1 micron. The silicon nitride film was formed by chemical vapor deposition, and an opening was formed on the pad electrode 13 by photolithography and etching. Then, a metal film 17 was formed on the upper layer to obtain the structure of FIG. The metal film 17 has Cr
And Au have a two-layer laminated structure. Cr and Au are formed by a sputtering method using Ar as a discharge gas, and C
The film thickness of r was 0.05 μm and the film thickness of Au was 0.3 μm.

【0025】続いて、図2(b)に示すように、前記金
属膜17上にレジストパターン19を形成する。レジス
トパターン19の形成にはスピンコート法を用い、レジ
ストパターン19の形成にはフォトリソグラフィ法を用
いた。前記レジストパターン19は、前記パッド電極1
3上に開口部25を設け、かつこの後の工程で形成する
樹脂バンプ21の下側から前記金属膜17が露出するよ
うな形状および寸法とした。
Then, as shown in FIG. 2B, a resist pattern 19 is formed on the metal film 17. The resist pattern 19 was formed by spin coating, and the resist pattern 19 was formed by photolithography. The resist pattern 19 is the pad electrode 1
The opening 25 is provided on the upper surface of the metal film 3, and the metal film 17 is exposed from the lower side of the resin bump 21 formed in the subsequent step.

【0026】つぎに図2(c)に示すように、前記パッ
ド電極13が開口部25から露出するように、かつ前記
金属膜17がパッド電極13に接触して残るように、不
要な部分の金属膜をエッチング法によって除去した。そ
のエッチング法は寸法精度や再現性などの点で望ましい
ドライエッチングを用いることが好ましい。
Next, as shown in FIG. 2C, unnecessary portions of the pad electrode 13 are exposed from the opening 25 and the metal film 17 is left in contact with the pad electrode 13. The metal film was removed by the etching method. As the etching method, it is preferable to use dry etching which is desirable in terms of dimensional accuracy and reproducibility.

【0027】さらに図2(d)に示すように、前記パッ
ド電極13上に樹脂からなる突起部21を形成する。こ
こで突起部21には感光性ポリイミドを用いて形成し
た。まず、スピンコート法を用いて、基板全面に感光性
ポリイミドを塗布し、所定のマスクを用いたフォトリソ
グラフィによって前記パッド電極13に接触するように
感光性ポリイミドによる突起部21のパターンを形成す
る。このときに、樹脂バンプ21は完全に前記金属膜1
7を覆い隠さないような形状および寸法とする必要があ
る。
Further, as shown in FIG. 2D, a protrusion 21 made of resin is formed on the pad electrode 13. Here, the protrusions 21 were formed using photosensitive polyimide. First, a photosensitive polyimide is applied to the entire surface of the substrate by using a spin coat method, and a pattern of the protrusions 21 made of the photosensitive polyimide is formed so as to contact the pad electrode 13 by photolithography using a predetermined mask. At this time, the resin bump 21 is completely covered with the metal film 1.
It is necessary to have a shape and a size that do not cover 7 up.

【0028】最後に図1に示すように、前記突起部21
の表面および前記金属膜17の露出部分に導電性被膜2
3を配する。まず、スパッタリング法によって図2
(d)の構造体の上層に前記樹脂バンプ21の表面およ
び前記金属膜17の露出部分表面にCr、つづいてAu
を成膜した後、フォトリソグラフィ法およびエッチング
法によって所望のパターン形成して導電性被膜23を形
成した。
Finally, as shown in FIG.
The conductive film 2 is formed on the surface of the metal film and the exposed portion of the metal film 17.
Place 3 First, as shown in FIG.
In the upper layer of the structure of (d), the surface of the resin bump 21 and the exposed surface of the metal film 17 are Cr, followed by Au.
After the film was formed, a desired pattern was formed by the photolithography method and the etching method to form the conductive film 23.

【0029】この構造とすることで、金属膜17を介し
て導電性被膜23とパッド電極13を確実に接続できる
とともに、樹脂バンプ27を半導体基板11上に確実に
固着させることができた。
With this structure, the conductive film 23 and the pad electrode 13 can be reliably connected through the metal film 17, and the resin bump 27 can be reliably fixed on the semiconductor substrate 11.

【0030】[0030]

【発明の効果】以上の説明で明らかなように、本発明の
半導体装置の構造を用いることで、金属膜17を介して
導電性被膜23と卑金属からなるパッド電極13を確実
に接続できるとともに、半導体装置の樹脂バンプ基部の
密着強度を向上させることができた。
As is apparent from the above description, by using the structure of the semiconductor device of the present invention, the conductive film 23 and the pad electrode 13 made of base metal can be surely connected through the metal film 17, and It was possible to improve the adhesion strength of the resin bump base of the semiconductor device.

【0031】また、本発明の半導体装置を用いて実装体
を形成すれば、例え実装体を構成する半導体装置と回路
基板とに外部応力が掛かっても、この半導体装置のバン
プ基部は強固に接続されているので、半導体装置と回路
基板間の電気的な導通が阻害されず、信頼性に優れた実
装体とすることができる。
Further, if the mounting body is formed using the semiconductor device of the present invention, the bump bases of the semiconductor device are firmly connected even if external stress is applied to the semiconductor device and the circuit board which form the mounting body. Therefore, electrical continuity between the semiconductor device and the circuit board is not hindered, and a highly reliable mounting body can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施の形態における半導体装置を示す
構造断面図である。
FIG. 1 is a structural cross-sectional view showing a semiconductor device according to an embodiment of the present invention.

【図2】本発明の実施の形態における半導体装置の製造
方法を示す工程断面図である。
FIG. 2 is a process sectional view showing the manufacturing method of the semiconductor device in the embodiment of the present invention.

【図3】従来技術における半導体装置の構造および製造
方法を示す工程断面図である。
3A to 3D are process cross-sectional views showing a structure and a manufacturing method of a semiconductor device in a conventional technique.

【符号の説明】[Explanation of symbols]

11 半導体基板 13 パッド電極 15 絶縁膜 17 金属膜 19 レジストパターン 21 突起部 23 導電性被膜 25 開口部 27 樹脂バンプ 11 Semiconductor substrate 13 Pad electrode 15 Insulating film 17 Metal film 19 resist pattern 21 Projection 23 Conductive film 25 openings 27 resin bumps

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板に形成した複数のパッド電極
と、前記パッド電極を露出して前記半導体基板上を覆っ
た絶縁膜と、前記各パッド電極に接続して前記絶縁膜上
に形成したバンプ下地となる金属膜と、その金属膜上に
形成した樹脂からなる突起部と、その突起部を覆うとと
もに前記金属膜と接続する導電性被膜を有する半導体装
置において、前記パッド電極の表面材料が卑金属であ
り、前記金属膜には前記突起部と前記パッド電極が当接
できるように、かつ前記金属膜と前記パッド電極の接続
箇所を残して開口部が形成されており、その金属膜の表
面材料に貴金属を配したことを特徴とする半導体装置。
1. A plurality of pad electrodes formed on a semiconductor substrate, an insulating film that exposes the pad electrodes to cover the semiconductor substrate, and bumps that are connected to the pad electrodes and are formed on the insulating film. In a semiconductor device having a metal film as a base, a protrusion formed of a resin formed on the metal film, and a conductive film that covers the protrusion and is connected to the metal film, the surface material of the pad electrode is a base metal. An opening is formed in the metal film so that the projection and the pad electrode can contact each other, and a connection portion between the metal film and the pad electrode is left, and a surface material of the metal film. A semiconductor device characterized by arranging a noble metal in the.
【請求項2】 前記貴金属が、金、銀、白金族のいずれ
かを主成分とした金属からなることを特徴とした請求項
1に記載の半導体装置。
2. The semiconductor device according to claim 1, wherein the noble metal is made of a metal containing any one of gold, silver and platinum group as a main component.
【請求項3】 半導体基板上に形成された卑金属からな
る複数のパッド電極と、少なくともパッド電極の一部を
露出させた絶縁膜と、突起部と前記パッド電極が直に接
合できるように、かつ金属膜と前記パッド電極の接続箇
所を残した前記パッド電極のサイズ以下の開口部を有す
る金属膜を形成する工程と、その開口部を介して前記パ
ッド電極に当接するように樹脂からなる突起部を形成す
る工程と、前記突起部を覆うとともに前記金属膜と接続
する導電性被膜を形成する工程とを有することを特徴と
する半導体装置の製造方法。
3. A plurality of pad electrodes made of a base metal formed on a semiconductor substrate, an insulating film exposing at least a part of the pad electrodes, a protrusion and the pad electrodes can be directly joined, and A step of forming a metal film having an opening size equal to or smaller than the size of the pad electrode, which leaves a connection portion between the metal film and the pad electrode, and a protrusion made of resin so as to come into contact with the pad electrode through the opening part. And a step of forming a conductive film that covers the protrusion and is connected to the metal film.
JP2002075636A 2002-03-19 2002-03-19 Semiconductor device and manufacturing method thereof Expired - Lifetime JP3733077B2 (en)

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JP2002075636A JP3733077B2 (en) 2002-03-19 2002-03-19 Semiconductor device and manufacturing method thereof

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JP2003273147A true JP2003273147A (en) 2003-09-26
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Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010093674A (en) * 2008-10-10 2010-04-22 Epson Toyocom Corp Piezoelectric device, and method for manufacturing piezoelectric substrate
JP2015216344A (en) * 2014-04-21 2015-12-03 新光電気工業株式会社 Wiring board and method of manufacturing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010093674A (en) * 2008-10-10 2010-04-22 Epson Toyocom Corp Piezoelectric device, and method for manufacturing piezoelectric substrate
JP2015216344A (en) * 2014-04-21 2015-12-03 新光電気工業株式会社 Wiring board and method of manufacturing the same

Also Published As

Publication number Publication date
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