JPH06131889A - Semiconductor filing device - Google Patents

Abstract

PURPOSE:To provide a semiconductor file device which can reduce the erasing time of plural erasing blocks and also can reduce the power consumed for the erasion of these blocks. CONSTITUTION:The range designating circuit 122 of an erasing circuit 12 designates an erasing range based on the erasing commands which are set at a register 121 by a controller 2 to plural erasing blocks. Then the erasing range is given to a voltage application circuit 123. The circuit 123 applies the voltage at one time to the erasing range of a flush type EEPROM 11. Thus plural erasing blocks are erased at one time in the erasing range.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to a flash type EEPRO.
The present invention relates to a semiconductor file device for reading and writing data from and to M, and particularly to erasing data in the EEPROM.

[0002]

2. Description of the Related Art Conventionally, a flash type EEPROM can erase a specific memory area at a time, and the specific memory area is called an erase block. A semiconductor file device using such a flash type EEPROM has a structure as shown in FIG. 2, for example. Controller 2
Before writing data to the flash type EEPROM 11 in the memory chip 1, the flash type EEPROM 11
For example, an operation of erasing erase blocks (1) to (3) of the ROM 11 is performed. That is, the controller 2 issues a command to erase the erase block (1) in the flash type EEPROM 11 in the memory chip 1. As a result, the erase circuit 1
In No. 2, the erase block (1) is erased by applying an erase voltage.
Next, the controller 2 issues a command to erase the erase block (2) in the flash type EEPROM 11. As a result, the erase circuit 12 applies an erase voltage to the erase block (2) to erase. Further, the controller 2 is a flash type EE
A command to erase the erase block (3) in the PROM 11 is issued. As a result, the erase circuit 12 becomes the erase block (3).
Erase by applying an erase voltage to. Therefore, when a plurality of erase blocks are erased as described above, the erase blocks (1), (2), and (3) are sequentially erased in this order.
Alternatively, when the controller 2 instructs the erase circuit 12 to erase all erase blocks, the erase circuit 12 erases all the erase blocks (1) to (4) at once.

Therefore, in the conventional semiconductor file device described above, the blocks are sequentially erased before rewriting the data in a plurality of erase blocks, so that the erase time becomes long and the power consumption for the erase becomes extra. There was a drawback of this. The erase voltage required when the erase circuit 12 erases the erase block is a booster circuit (not shown).
Although the voltage is boosted at, the power is required for this boosting, so power is consumed each time the block is erased. Moreover, erasing the erase block itself requires only an erasing voltage and does not require much power. Therefore, when erasing a region of the same area at once and erasing multiple times,
If you erase multiple times, it will consume more power.

[0004]

Flash type EEPR
In the conventional semiconductor file device using the OM, the erase block of the flash EEPROM in which the data is written must be erased in advance before writing the data in the flash EEPROM, but this erase is performed sequentially. However, there is a drawback that erasing takes time and power consumption required for erasing becomes large.

Therefore, the present invention eliminates the above-mentioned drawbacks and provides a semiconductor file device capable of erasing a plurality of erase blocks in a short time and reducing the power consumption required for the erase. Has an aim.

[0006]

The present invention is a flash type E
A semiconductor file device for reading / writing data from / to an EPROM includes erase means for applying an erase voltage to a plurality of arbitrarily designated erase blocks allocated in the flash type EEPROM at a time to erase the plurality of erase blocks at a time. Have a configuration.

[0007]

In the flash type EEPROM of the present invention,
The erasing means erases the plurality of erase blocks at a time by applying an erase voltage to a plurality of arbitrarily designated erase blocks allocated in the flash EEPROM.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a semiconductor file device of the present invention. Reference numeral 1 is a memory chip, which together with the controller 2 constitutes a semiconductor file device. The memory chip 1 has a flash type EEPROM 11
And an erasing circuit 12 are incorporated. The erasing circuit 12 is a register 121 that holds erasing block information and the like.
Range designation circuit 122 designated for 3, flash type EEP
The ROM 11 includes a voltage application circuit 123 that applies an erase voltage to the erase range of the ROM 11 to erase data, and a check circuit 124 that checks whether the erase is normally performed. Erase blocks (1) to (4) are assigned to the flash type EEPROM 11. The erase voltage is supplied to the voltage application circuit 123 from a booster circuit (not shown).

Next, the operation of this embodiment will be described. The controller 2 may, for example, erase blocks (1), (2),
Before writing data in (3), an operation of erasing these erase blocks is performed. That is, the controller 2 causes the register 121 of the erasing circuit 12 to erase blocks (1), (2),
A command for erasing (3) is set and these commands are held. The range designating circuit 122 obtains the erase range of the flash type EEPROM 11 to be erased once at this time based on the erase block to be erased set in the register 121, and the erase range (here, erase block (1) to
(3)) is applied to the voltage application circuit 123 and the check circuit 124.
Give to. The voltage application circuit 123 applies an erase voltage to a given range, that is, the range of the erase blocks (1) to (3) in this example, at a time, and erase blocks (1) to (3).
Erase the data in (3) at once. Check circuit 12
4 check the erased block that has been erased now,
When it is confirmed that the erasure is complete, the controller 2 is notified of this. When the controller 2 knows that the erase has been completed, the erase blocks (1) to (3) are erased.
The operation moves to write data to. If the check circuit 124 finds a portion that has not been erased, the controller 2 reissues an erase command for the erase block including the portion to the erase circuit 12, and erases the erase block in the same manner as above. .

In the case where the controller 2 controls the plurality of memory chips 1, a plurality of erase blocks over the plurality of memory chips 1 may have to be erased at one time. In such a case, The operation of is as described below. That is, the controller 2 controls each erase circuit 12 of the memory chip 1 having an erase block to be erased.
In the register 121, the erase command of the corresponding erase block is set. After that, the erase circuit 12 of each memory chip 1
If the voltage applying circuit 123 therein synchronizes the erase voltage to the erase range of the flash type EEPROM 11 obtained by the range designating circuit 122 based on the information in the register 121, the plurality of memory chips 1 can be synchronized. Multiple erase blocks are erased at once.

According to the present embodiment, the erasing circuit 12 of the memory chip 1 applies the erasing voltage to the erasing blocks in the plurality of flash type EEPROM 11 designated by the controller 2 at a time, thereby erasing the plurality of erasing blocks once. Can be erased. Therefore, it is not necessary to sequentially erase a plurality of erase blocks as in the prior art, the erase time of a plurality of erase blocks can be shortened, and the power consumed by the erase can be reduced.
Further, since the erasing time can be shortened, the data writing can be speeded up. Furthermore, a plurality of memory chips 1
A plurality of erase blocks can be erased at once by a similar method, and the same effect can be obtained.

[0012]

As described above, according to the semiconductor file device of the present invention, it is possible to erase a plurality of erase blocks in a short time and reduce the power consumption required for the erase.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a semiconductor file device of the present invention.

FIG. 2 is a block diagram showing an example of a conventional semiconductor file device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Memory chip 2 ... Controller 11 ... Flash type EEPROM 12 ... Erase circuit 121 ... Register 122 ... Range designation circuit 123 ... Voltage application circuit 124 ... Check circuit

Claims (2)

[Claims] 1. A semiconductor file device for reading / writing data from / into a flash type EEPROM, wherein an erase voltage is applied to a plurality of arbitrarily designated erase blocks allocated in the flash type EEPROM at a time so that the plurality of erase blocks are erased at a time. A semiconductor file device comprising an erasing means for erasing. 2. The semiconductor file device according to claim 1, wherein the plurality of arbitrarily specified erase blocks are spread over a plurality of memory chips.