JPH0612970A - Semiconductor device - Google Patents

Abstract

PURPOSE:To take out signals after passing through a fuse circuit in a reverse direction to each other without enlarging a pattern area. CONSTITUTION:A semiconductor device has the first wiring layer 21 used as a fuse in a fuse region and the second wiring layer 22 for the same signal to pass through to the wiring formed by the first wiring layer 21. The first/ second wiring layers 21, 22 connected by a contact 20 are insulated by an insulating layer 23. In the case of providing a defect in a memory cell connected to a word wire, a fuse (first wiring layer 21) connected to this word wire is laser-cut by irradiation of a laser beam, to make this word wire not selectable, and a word wire of a spare line is selected. In the semiconductor device of this constitution, signals after passing through a fuse circuit can be taken out in two directions reverse to each other without enlarging a pattern area.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fuse circuit of a semiconductor device, and more particularly, to a fuse circuit in a fuse region.

[0002]

2. Description of the Related Art A conventional fuse circuit will be described below with reference to FIGS. FIG. 5 shows an example of a conventional fuse circuit. In this circuit, the fuse 5a formed in the fuse region 52 is disconnected, so that the inverter 5
It controls whether or not the output of No. 4 is supplied to the inverter 53.

Generally, the fuses are concentrated in the fuse region 52, and no wiring other than the fuse is arranged in the fuse region 52. This is to ensure that the fuse 51a is laser-cut.

More specifically, the reason why wirings other than the fuse 51a are not arranged in the fuse region is that wirings made of aluminum Al other than the fuse wiring, for example,
This is because, if a wiring used to output signals after passing through the fuse circuit is formed in the fuse region, the wiring is formed in a bare state due to the structure and is easily damaged.

FIG. 6 shows a circuit configured to take out a signal after passing through the fuse circuit in two directions opposite to each other. Figure 6
The circuit of is constructed by the main word line dividing method and the isolation fuse method. The main word line bisection method is a method in which the main word line is divided into two parts on the left and right sides, and the main word lines are driven by separate left and right may word line drivers.

The isolation fuse system is a fuse 51 connected to the main word line of the defective row.
This is a method in which a defective row cannot be selected by laser cutting a and a spare row is selected.

As shown in FIG. 6, one end of the disable fuse 51a is connected to the output end of the inverter 54. The other end of the disable fuse 51a is the inverter 5
3 to the main word line 62. The other end of the disable fuse 51a and the input end of the inverter 65 are connected by a signal line 64. Since it is not desirable to arrange the wiring other than the fuse in the fuse region 61 surrounded by the one-dot chain line, the signal line 64 is detoured so as to avoid the fuse region 61.

FIG. 7 shows another example of a circuit constructed by a similar method. One end of the fuse circuit 51a in FIG. 7 is connected to the output end of the inverter 54, and the fuse circuit 51a
The other end of is connected to the main word line 53 via an inverter 53. Further, one end of the fuse circuit 51b is connected to the output end of the inverter 54 by the signal line 74. The other end of the fuse circuit 51b is connected to the main word line 63 via an inverter 65.

In the case of the circuit of FIG. 7, since the signal line 74 is connected to the output end of the inverter 54, the fuse region 7
No need to bypass 6, but two fuses 51a, 5
It is necessary to provide 1b.

[0010]

Wiring other than the fuse cannot be arranged in the fuse region. Therefore, when the signal after passing through the fuse circuit is to be extracted in the opposite direction as shown in FIG. 6, the signal line 64 that bypasses the fuse region is provided.
However, there is a problem that the pattern area becomes large.

In the circuit having the configuration shown in FIG. 7, since a plurality of fuses are connected to the main word lines 62 and 63, there is a problem that the pattern area becomes large. Further, the circuit having the configuration shown in FIG. 7 has a problem that the number of laser cuts is doubled and the yield of laser cut is reduced as compared with the circuit of FIG. The present invention has been made in view of the above circumstances, and an object thereof is to extract signals after passing through a fuse circuit in mutually opposite directions without increasing the pattern area.

[0012]

A semiconductor device according to the present invention includes a first wiring layer used as a fuse in a fuse region, an insulating layer formed under the first wiring layer, and the insulating layer. A second wiring layer which is formed under the first wiring layer and through which the same signal as that of the first wiring layer passes, and the fuse passage is provided through the first wiring layer and the second wiring layer. The latter signal is extracted in two directions which are opposite to each other.

[0013]

With the above structure, since the second wiring is arranged under the insulating layer, it can be passed through the fuse region. As a result, the signals after passing through the fuse can be extracted in the opposite directions without increasing the pattern area.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A fuse circuit according to an embodiment of the present invention will be described below with reference to the drawings. The fuse circuit formed in the fuse area 10 in FIG. 1 includes a first wiring 11 used as a fuse and a second wiring arranged below the fuse.
Of wiring 12. A signal line 14a is connected to the input end of the inverter 14 of FIG. 1, and an input signal from the outside is supplied via the signal line 14a. One end of the fuse 11 is connected to the output end of the inverter 14, and the other end of the fuse 11 is connected to the input end of the inverter 13. The second wiring 12 is connected to the other end of the fuse 11 and the midpoint of the input end of the inverter 13.

FIG. 2 shows a cross section of the fuse peripheral circuit shown in FIG. The substrate and the second wiring layer 22 are insulated by the insulating layer 24. In addition, the second wiring layer 2
The first wiring layer 21 and the second wiring layer 21 are insulated by the insulating layer 23. The first wiring layer 21 and the second wiring layer 22 are insulating layers 2
They are connected by the contacts 20 formed in 3. The insulating layers 23 and 24 are, for example, silicon oxide films (Si
O ₂ ) and the like. The first wiring layer 21 forms the fuse 11 of FIG. 1, and the second wiring layer 22 forms the second wiring 12.

FIG. 3 shows a plane pattern of a circuit around the fuse shown in FIG. The first wiring layer 21 is formed on the second wiring layer 22.
The wiring patterns of the wiring layer 22 may or may not overlap as viewed from above.

FIG. 4 shows a state in which the fuse circuit shown in FIG. 1 is applied to a memory selection circuit constructed by a main word line halving system and an isolation fuse system.

The circuit of FIG. 4 is obtained by adding resistors 44a and 44b and an inverter 15 to the fuse peripheral circuit of FIG. 1. One end of the resistor 44a is a midpoint between the input end of the inverter 13 and one end of the fuse 11. And the other end of the resistor 44a is grounded. The input end of the inverter 15 is connected to the second wiring 12, and the output end thereof is connected to the word line 43. One end of the resistor 44b is connected to the input end of the inverter 15 and the second wiring 12,
The other end is grounded. The fuse 11 and the second wiring 12 in FIG. 4 are formed in the structure as shown in FIGS. 2 and 3 similarly to the fuse circuit in FIG. Next, FIG.
The operation of the circuit around the fuse will be described with reference to FIG. (When reading normal data)

A low level word line selection signal is supplied from a row decoder (not shown) to the input terminal of the inverter 14 of the row to be selected, inverted by the inverter 14, and a high level signal is supplied to the inverter 13 via the fuse 11. It The high-level signal from the inverter 14 is also supplied to the input terminal of the inverter 15 via the fuse 11 and the second wiring 12.

The inverters 13 and 15 invert the high level signal and output a low level signal.
As a result, the potentials of the word lines 13a and 43 become low level, and the memory cells connected to the word lines 13a and 43 are selected. (When replacing defective row with spare row)

When a memory cell becomes defective, the fuse used to select this memory cell is blown. That is, the fuse 11 is irradiated with a laser beam, and the fuse 11 is laser-cut. Then pull-down resistor 4
The input terminals of the inverters 13 and 15 are fixed to the low level by 4a and 44b, the word lines 13a and 43 are maintained in the high level non-selected state, and the defective memory cell is not selected.

When the disabled fuse 11 is laser-cut, if the irradiation amount of the laser beam is larger than the necessary amount, the first wiring layer 21 and the second wiring layer 22 shown in FIG. It may be cut. However, the circuit shown in FIG. 4 has pull-down resistors 44a and 44b.
Therefore, even if the second wiring layer 22 (FIG. 2) is disconnected, the potentials at the input ends of the inverters 13 and 15 are kept at the low level, and the potential at the word line becomes the high level
It is kept in the non-selected state. Therefore, a defective memory cell is not selected, and even if the second wiring layer 22 (FIG. 2) is cut, there is no problem in circuit operation.

Further, in the above embodiment, when the signal after passing through the fuse circuit is taken out in two directions opposite to each other across the fuse circuit, the second wiring is passed under the fuse circuit via the insulating layer. Therefore, it is not necessary to bypass the signal line, and the pattern area can be reduced as compared with the conventional circuit shown in FIG. The pattern area can be made smaller than that of the conventional circuit shown in FIG. 7, and the number of times of cutting with a laser beam is halved, so that the yield of laser cutting is increased.

[0024]

With the above structure, the semiconductor device of the present invention can take out the signals after passing through the fuse circuit in mutually opposite directions without increasing the pattern area.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a circuit around a fuse according to an embodiment of the present invention.

FIG. 2 is a pattern cross-sectional view of the fuse circuit shown in FIG.

3 is a pattern cross-sectional view of the fuse circuit shown in FIG.

FIG. 4 is a diagram showing an application example of the fuse circuit shown in FIG.

FIG. 5 is a diagram showing a conventional fuse circuit.

FIG. 6 is a diagram showing an application example of a conventional fuse circuit.

FIG. 7 is a diagram showing another application example of a conventional fuse circuit.

[Explanation of symbols]

10 ... Fuse region, 11 ... Fuse (first wiring),
12 ... 2nd wiring, 13, 14 ... Inverter, 13a,
14a ... Signal line, 20 ... Contact, 21 ... First wiring layer, 22 ... Second wiring layer, 23, 24 ... Insulating layer.

Claims (2)

[Claims] 1. A first wiring used as a fuse, an insulating layer formed under the first wiring, and an insulating layer formed under the insulating layer to insulate the first wiring from the first wiring. A semiconductor device comprising: a first wiring and a second wiring having the same potential. 2. A first wiring layer used as a fuse in a fuse region, an insulating layer formed under the first wiring layer, and a first wiring layer formed under the insulating layer. And a second wiring layer through which the same signal is passed, and the signal after passing through the fuse is in two directions that are opposite to each other via the first wiring layer and the second wiring layer. A semiconductor device characterized by being taken out.