JPH06125280A - Electronic frequency selection receiver - Google Patents

Abstract

PURPOSE:To perform the switching of the tuning capacitor of an antenna and that of a frequency selection means simultaneously by switching one frequency selection switch. CONSTITUTION:A tuning frequency can be adjusted by changing a capacitance value by switching the number of parallel connection of the tuning capacitor by turning on/off the frequency selection switch 12c. and also, the frequency of an oscillator circuit 5 is selected setting potential on one terminal of the antenna 1 at the same potential as that when the frequency selection switch 12c is turned on. and setting the control terminal (c) of an electronic frequency selection means 6 at the potential when the frequency selection switch 12c is turned on. Thereby, since the tuning capacitor can be freely selected without using a variable capacity diode, the optimum design including the antenna 1 can be performed.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION This invention relates to electronic frequency selective receivers.

[0002]

2. Description of the Related Art In recent years, with the remarkable development of semiconductor technology and microcomputer circuit technology and the increase in frequency band used, the superheterodyne of the receiving circuit has been advanced. Most of the receivers are digital tuning, superheterodyne electronic frequency selective receivers, except for mobile phones such as car phones, TVs, car radios, portable radios, etc. Has become. As an example of the electronic frequency selective receiver, a Sony PL
L SYNTHESIZED RECEIVERICF
-SW1 can be mentioned, and the ICF-SW1 can be used very conveniently because frequency data can be numerically input by a tuning switch.

A conventional electronic frequency selective receiver will be described with reference to FIG. FIG. 2 is a block diagram of a conventional electronic frequency selective receiver. Reference numeral 1 denotes an antenna, one end of which is connected to VDD, which is a power source plus potential, to capture a radio signal and generate a reception signal Ss. Reference numeral 2 denotes a tuning circuit, which is composed of a variable capacitance diode 2a whose capacitance value can be controlled by the voltage level between the anode and the cathode, and a tuning capacitance 2b. The variable capacitance diode 2a and the tuning capacitance 2b are connected in series. It is connected in parallel with the antenna 1. The inductance value of the antenna 1 and the capacitance value of the tuning circuit 2 are tuned to the tuning frequency f1 which is the reception frequency. Reference numeral 3 is a frequency conversion circuit that receives the received signal Ss as an input, mixes it with another input signal, a local oscillation signal LO, and performs frequency conversion, and outputs an intermediate frequency signal IF that is a signal of an intermediate frequency f3. Intermediate frequency signal I from the frequency conversion circuit 3
It is a demodulation circuit that inputs F, detects it, and outputs a demodulation signal DM. Reference numeral 5 denotes a local oscillation circuit, which is composed of a coil 5a, a variable capacitance diode 5b whose capacitance value can be controlled by the voltage level between the anode and the cathode, a capacitor 5c, the coil 5a, a variable capacitance diode 5b and a capacitor 5c. And an oscillating portion 5d that oscillates according to the tank constant of the tank circuit. The coil 5a has one end connected to VDD and one end connected to the oscillator 5d,
The variable capacitance diode 5b and the capacitor 5c are connected in parallel with the coil 5a in a state of being connected in series. The oscillator 5d outputs a local oscillation signal LO oscillated according to the tank constant of the tank circuit. The frequency conversion circuit 3, the demodulation circuit 4, and the local oscillation circuit 5 constitute a super heterodyne type reception circuit 10. Reference numeral 6 denotes an electronic frequency selection means, which inputs VSS as the frequency selection signal S1 as the reference voltage VDD, selects frequency data according to its logic level, outputs a control signal VC corresponding to the frequency data, and outputs the control signal VC from the station. By inputting the outgoing signal LO, the control signal VC is stabilized according to the frequency data. Reference numeral 7 is a frequency selection means, which is a frequency selection switch 7a having one end connected to VDD and one end connected to the control terminal C of the electronic frequency selection means 6, and one end connected to VSS, which is a negative potential of the power supply, and one end selected the frequency. It is composed of a pull-down resistor 7b connected to the switch 7a. A speaker 8 converts the demodulated signal DM into an audible signal.

Next, the operation of the conventional electronic frequency selective receiver will be described with reference to FIG. For example, when the frequency selection switch 7a of the frequency selection means 7 is ON, the frequency selection signal S1 becomes VDD level via the frequency selection switch 7a. At this time, the electronic frequency selection means 6 selects the frequency data D1 from the logic level of the frequency selection signal S1 and generates the control signal VC according to the frequency data D1. The control signal VC is supplied to the anode of the variable capacitance diode 5b of the local oscillation circuit 5, and the variable capacitance diode 5b determines the capacitance value by the potential difference between VDD supplied to the cathode and the control signal VC supplied to the anode. . Then, from the tank constants of the variable capacitance diode 5b, the capacitor 5c and the coil 5a, the local oscillation circuit 5
Oscillation frequency is determined and is output as a local oscillation signal LO.
Here, the electronic frequency selection means 6 causes the local oscillator signal LO to
The frequency of the local oscillation signal LO is compared with the frequency data D1 by inputting
If 2 is lower than the frequency of the frequency data D1, the potential of the control signal VC is lowered to control the potential difference between the cathode and the anode of the variable capacitance diode 5b to be increased, and the capacitance value is reduced to make the local oscillation circuit. The oscillation frequency of No. 5 is controlled to be high. If the frequency f2 of the local oscillation signal LO is higher than the frequency of the frequency data D1, the potential of the control signal VC is increased to control the potential difference between the cathode and the anode of the variable capacitance diode 5b so as to reduce the capacitance value. Is controlled so that the oscillation frequency of the local oscillation circuit 5 is lowered. In this way, the local oscillation frequency f2 of the local oscillation signal LO of the local oscillation circuit 5 is controlled so as to be consistent with the frequency data D1 of the electronic frequency selection means 6 and stabilized, so that the local oscillation circuit 5 with extremely high accuracy can be obtained. Can be supplied. The control signal VC is also supplied to the anode of the variable capacitance diode 2a of the tuning circuit 2, and the variable capacitance diode 2a has a potential difference between the cathode at the potential level of VDD and the anode at the potential level of the control signal VC. The tuning frequency f1 is determined by the capacitance value of the tuning capacitor 2b and the inductance of the antenna 1 which are adjusted in advance.
Here, the local oscillation frequency f2 of the local oscillation signal LO and the tuning frequency f1 are always related to the intermediate frequency f3 by the following equation. f
3 = f2-f1. Therefore, the tuning frequency f1 depends on the frequency data D1.

The radio wave signal of the tuning frequency f1 efficiently received by the antenna 1 and the tuning circuit 2 is input to the frequency conversion circuit 3 as a reception signal Ss. In the frequency conversion circuit 3, the received signal Ss is frequency-converted at the frequency f2 of the local oscillation signal LO and output as the intermediate frequency signal IF of the intermediate frequency f3, and the demodulation circuit 4 designed exclusively for detection of the intermediate frequency f3. Is detected and output as a demodulation signal DM. This is a feature of the super-heterodyne receiver circuit 10 having excellent demodulation performance. The demodulated signal DM is sounded as an audible signal by the speaker 8.

As described above, in the conventional electronic frequency selection receiver, the reception frequency can be automatically tuned by switching the frequency selection switch 7a, which is easy to operate, and the local oscillation circuit 5 having very high accuracy and stability can be provided. By preparing,
Superheterodyne receiver circuit 10 with excellent demodulation performance
Has been realized.

[0007]

As described above, in the conventional electronic frequency selective receiver, the tuning circuit 2 is composed of the variable capacitance diode 2a. However, since the variable-capacitance diode 2a is a semiconductor capacitor, the Q at resonance becomes low and the efficiency of the antenna 1 decreases. Further, since the variable capacitance diode 2a has a small capacitance value and its variable capacitance range is also determined, there is a problem that the determination of the inductance of the antenna 1 is greatly limited by the reception frequency range. .

For example, in an electronic frequency selective receiver capable of receiving long-wave standard radio waves in Japan and the United Kingdom, Japanese JG2
AS has a transmission frequency of 40 kHz and British MSF has a transmission frequency of 60 kHz. Therefore, the frequency of the radio wave is low, and the inductance value of the antenna 1 and the capacitance value of the tuning circuit 2 are large. At this time, since the transmission frequency ratio between Japan and the UK is 1.5 times, the value of the inductance of the antenna 1 becomes large unless the variable capacitance range of the variable capacitance diode 2a can be made large. For this reason, the antenna 1 naturally becomes large, which imposes a great limitation on miniaturization of the receiver.

An object of the present invention is to solve the problem that it is difficult to miniaturize the antenna 1 in the conventional electronic frequency selective receiver and the tuning circuit 2 having a high Q cannot be obtained.

[0010]

DISCLOSURE OF THE INVENTION The present invention for solving the above-mentioned problems includes an antenna, a tuning means for the antenna, a super-heterodyne receiving circuit having a local oscillation circuit, a frequency conversion circuit and a demodulation circuit, and An electronic frequency selection means for a local oscillator circuit of a superheterodyne receiver circuit,
In an electronic frequency selective receiver including a frequency selective switch, the frequency selective switch is configured to be selectively connected to the tuning means by connecting the frequency selective switch between a reference potential and a tuning capacitor, and the frequency. The electronic frequency selecting means is controlled by the frequency selecting switch by connecting the connection point of the selecting switch and the tuning capacitor to the control terminal of the electronic frequency selecting means.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a block diagram of a radio-controlled timepiece showing an embodiment of an electronic frequency selective receiver of the present invention. The same elements as those of the conventional example shown in FIG. A tuning circuit 12 is composed of a fixed tuning capacitor 12a, a tuning capacitor 12b for selective connection, and a frequency selection switch 12c. The tuning capacitor 12a is connected to the antenna 1 in parallel,
Further, the tuning capacitor 12b and the frequency selection switch 12c are connected in parallel to the antenna 1 while being connected in series. The connection point between the tuning capacitor 12b and the frequency selection switch 12c is connected to the control terminal C of the electronic frequency selection means 6 and to the reference potential VSS via the pull-down resistor 13a.

As in the above configuration, the frequency selection switch 1
2c is connected between VDD, which is a reference potential, and the tuning capacitor 12b, and the connection point is connected to the control terminal C of the electronic frequency selection means 6, so that the frequency selection switch 12c and the pull-down resistor 13a are connected to each other. The selecting means 13 is configured. That is, when the frequency selection switch 12c is in the OFF state, the pull-down resistor 13
The frequency selection signal S1 is at the VSS level via a, and when the frequency selection switch 12c is turned on, the frequency selection signal S1 is switched to the VDD level via the frequency selection switch 12c. The electronic frequency selection means 6 can be selected according to the levels of the two reference potentials. That is, when the frequency selection signal S1 is VSS, the British MSF can be received, and the frequency selection signal S1 is V
It can be selected so that Japanese JG2AS can be received when switching to DD. Further, the pull-down resistor 13
By increasing the value of a, it is necessary to minimize the decrease of the received signal Ss leaking through the tuning capacitor 12b when the frequency selective switch 12c is OFF.

Reference numeral 14 is a detection signal D output from the demodulation circuit 4.
A decoding circuit that inputs M and decodes the time code outputs the time code signal TM. 15 is the decoding circuit 14
The time display means for displaying the output time code signal TM as time data.

Next, the operation of the radio-controlled timepiece of the embodiment will be described. First, the reception operation of JG2AS in Japan will be described. When the frequency selection switch 12c of the frequency selection means 13 is turned on, the frequency selection signal S1 becomes VDD level. At this time, the electronic frequency selection means 6 selects the frequency data D140 of Japan from the logic level of the frequency selection signal S1. Then, a control signal VC is generated according to the frequency data D140, the control signal VC is supplied to the anode of the variable capacitance diode 5b of the local oscillation circuit 5, and the variable capacitance diode 5b has a capacitance value according to the potential difference between the cathode and the anode which is VDD. Is determined, the oscillation frequency of the local oscillation circuit 5 is determined from the tank constants of the capacitor 5c and the coil 5a, and the local oscillation signal LO having a frequency of 140 kHz is output. Here, the electronic frequency selection means 6 inputs the local oscillator signal LO, and the frequency of the local oscillator signal LO is compared with the frequency data D140.
If the local oscillation frequency is lower than the frequency of the frequency data D140, the potential of the control signal VC is lowered, the potential difference between the cathode and the anode of the variable capacitance diode 5b is increased, and the capacitance value is reduced to oscillate the local oscillation circuit 5. Control to increase the frequency. Further, if the local oscillation frequency of the local oscillation signal LO is higher than the frequency of the frequency data D140, the potential of the control signal VC is raised, and the variable capacitance diode 5b.
The potential difference between the cathode and the anode is reduced and the capacitance value is increased to control the oscillation frequency of the local oscillation circuit 5 to be low. Thus, the local oscillation frequency of the local oscillation signal LO of the local oscillation circuit 5 is the frequency data D of the electronic frequency selection means 6.
The signal is controlled so that it matches 140 and is stable, and a signal with a very high frequency accuracy of 140 kHz is obtained. At this time, since the frequency selection switch 12c of the frequency selection means 13 is ON, the tuning capacitor 12a and the tuning capacitor 12b are connected in parallel, and the total capacitance value of the tuning capacitor 12a and the tuning capacitor 12b and the antenna 1 are connected. The inductance determines the tuning frequency of 40 kHz.

A radio wave signal with a tuning frequency of 40 kHz, which is efficiently received by the antenna 1 and the tuning means 12, is
The received signal Ss is input to the frequency conversion circuit 3. In the frequency conversion circuit 3, the received signal Ss is frequency-converted at a local oscillation frequency of the local oscillation signal LO of 140 kHz, output as the intermediate frequency signal IF of an intermediate frequency of 100 kHz, and the demodulation designed for detection of the intermediate frequency of 100 kHz. The signal is detected by the circuit 4 and output as the demodulation signal DM. The demodulated signal DM is decoded into the time code signal TM by the decoding circuit 14, and the time code signal TM is displayed by the time display means 15 as time data.

Next, the reception operation of the British MSF will be described. Frequency selection switch 12 of the frequency selection means 13
When c is turned off, the frequency selection signal S1 becomes VSS level via the pull-down resistor 13a. At this time, the electronic frequency selection means 6 selects the British frequency data D160 from the logic level of the frequency selection signal S1. Then, a control signal VC is generated according to the frequency data D160, the control signal VC is supplied to the anode of the variable capacitance diode 5b of the local oscillation circuit 5, and the variable capacitance diode 5b has a capacitance value according to the potential difference between the cathode and the anode which is VDD. The capacitor 5c and the coil 5
The oscillation frequency of the local oscillation circuit 5 is determined from the tank constant of a and is output as a local oscillation signal LO having a frequency of 160 kHz. Here, the electronic frequency selection means 6 inputs the local oscillator signal LO, the frequency of the local oscillator signal LO is compared with the frequency data D160, and if the local oscillator frequency of the local oscillator signal LO is the frequency of the frequency data D160. If it is lower than that, the potential of the control signal VC is lowered, the potential difference between the cathode and the anode of the variable capacitance diode 5b is increased, and the capacitance value is reduced to control the oscillation frequency of the local oscillation circuit 5 to increase. If the local oscillation frequency of the local oscillation signal LO is higher than the frequency of the frequency data D160, the potential of the control signal VC is increased, the potential difference between the cathode and the anode of the variable capacitance diode 5b is reduced, and the capacitance value is increased to increase the local portion. The oscillation frequency of the oscillation circuit 5 is controlled to be low. Thus, the local oscillation frequency of the local oscillation signal LO of the local oscillation circuit 5 is the frequency data D160 of the electronic frequency selection means 6.
The signal is controlled so as to be stable in accordance with, and becomes a signal with a very high frequency accuracy of 160 kHz. At this time, since the frequency selection switch 12c of the frequency selection means 13 is OFF, the tuning capacitor 12b is separated from the VDD side, and the tuning capacitor 1
The tuning frequency of 60 kHz is determined by the capacitance value of 2a and the inductance of the antenna 1.

The radio wave signal having a tuning frequency of 60 kHz which is efficiently received by the tuning means 12 at the antenna 1 is
The received signal Ss is input to the frequency conversion circuit 3. In the frequency conversion circuit 3, the received signal Ss is frequency-converted at the local oscillation frequency of the local oscillation signal LO of 160 kHz and output as the intermediate frequency signal IF of the intermediate frequency of 100 kHz, and the demodulation designed exclusively for detection of the intermediate frequency of 100 kHz. The signal is detected by the circuit 4 and output as the demodulation signal DM. The demodulated signal DM is decoded into the time code signal TM by the decoding circuit 14, and the time code signal TM is displayed by the time display means 15 as time data.

Therefore, in the radio-controlled timepiece of the above-mentioned embodiment, the tuning capacitance 12a of the tuning means 12 and the tuning capacitance 12 are adjusted.
For b, a fixed capacitance that can obtain a high Q resonance without being restricted by a semiconductor capacitance can be used, and since the variable capacitance value is also determined by the tuning capacitance 12b, the degree of freedom in design is wide. The degree of freedom in designing the value of inductance also increases.

FIG. 3 is a block diagram of the tuning circuit 22, the antenna 1 and the frequency selecting means 13 showing an embodiment in which the positions of the tuning capacitor and the frequency selection switch are changed from those of FIG. 1, and the tuning circuit 22 is fixed. Tuning capacitor 22a, tuning capacitor 22b for selective connection, and frequency selection switch 22c
It is composed of. The tuning capacitor 22a is connected in parallel to the antenna 1, and the tuning capacitor 22b and the frequency selection switch 22c are connected in parallel to the antenna 1 while being connected in series. That is, in FIG.
2b is connected to the reference potential VDD, and the connection point between the tuning capacitor 22b and the frequency selection switch 22c is connected to the control terminal C of the electronic frequency selection means 6 and to the reference potential VSS via the pull-down resistor 13a. It is connected. The tuning capacitor 22b is set to the reference potential VD
The frequency selection switch 22c is connected between the D and the frequency selection switch 22c, and the connection point is connected to the control terminal C of the electronic frequency selection means 6.
The pull-down resistor 13a and the pull-down resistor 13a constitute the frequency selecting means 13. That is, the frequency selection switch 22c is turned off.
In this state, the frequency selection signal S1 is at the VSS level through the pull-down resistor 13a, and when the frequency selection switch 22c is in the ON state, the frequency selection signal S1 is received through the antenna 1 and the frequency selection switch 22c. Since the level is switched to the VDD level, it is possible to select the electronic frequency selection means 6 in accordance with the levels of the two selected reference potentials.
It has a function equivalent to that of the tuning circuit 12 shown in FIG.

[0020]

As described above, in the electronic frequency selection receiver of the present invention, the frequency selection signal S1 is determined by turning on and off the frequency selection switch of the frequency selection means. The frequency data can be selected and the presence or absence of the connection of the tuning capacitor can be determined. At this time, since the fixed tuning capacitance and the tuning capacitance for selection in the tuning means are not limited by the capacitance value as in the case of using the variable capacitance diode, the inductance value of the antenna can be freely designed, and the Q value at the time of resonance can be designed. Since it does not deteriorate, it is possible to achieve efficient tuning means. In addition, since the value of the inductance of the antenna can be freely designed, miniaturization of the antenna can be expected. Further, since the frequency selection signal and the tuning means can be switched by one frequency selection frequency selection switch, the number of switches is small.

[Brief description of drawings]

FIG. 1 is a block diagram showing an electronic frequency selective receiver of the present invention.

FIG. 2 is a block diagram showing a conventional electronic frequency selective receiver.

FIG. 3 is a block diagram showing a component circuit of the electronic frequency selective receiver of the present invention.

[Explanation of symbols]

 1 Antenna 2 12 Tuning circuit 3 Frequency conversion circuit 4 Demodulation circuit 5 Local oscillation circuit 6 Electronic frequency selection means 7a, 12c, 22c Frequency selection switch 15 Time display means

Claims (1)

[Claims] 1. An antenna and tuning means for the antenna,
A super-heterodyne receiving circuit having a local oscillating circuit, a frequency converting circuit, and a demodulating circuit, an electronic frequency selecting means for the local oscillating circuit of the super-heterodyne receiving circuit, and an electronic frequency selecting receiver having a frequency selecting switch. In, the frequency selective switch is configured to selectively connect the tuning capacitor to the tuning means by being connected between a reference potential and the tuning capacitor, and a connection point between the frequency selective switch and the tuning capacitor is connected to the electronic component. An electronic frequency selection receiver, characterized in that the electronic frequency selection receiver is connected to a control terminal of the frequency selection means.