JPH0612267B2 - Pulse encoder pulse reading circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention is intended to reliably prevent erroneous output of an origin reset signal in a pulse encoder used for position detection in a fixed position stop control device for a spindle of a machine tool or the like. The present invention relates to a pulse reading circuit capable of performing.

[Conventional technology]

Fourth example of conventional pulse reading circuit of pulse encoder
It will be described based on the drawings. In this figure, the pulse edge detecting means 1 and 2 detect the rising edge and falling edge of the A-phase pulse and the B-phase pulse shown in FIG. Then, the rotation direction is determined based on the phase relationship between the A phase and the B phase, and the rotation direction signal 6 is output. On the other hand, the C pulse output once per one rotation of the encoder is detected at the rising edge and the falling edge by the rising edge detecting means 7 and the falling edge detecting means 8 respectively, and the output signal thereof and the rotation direction signal 6 cause normal rotation. The reset signal 10 is output by the valid edge detecting means 9 which determines the rising edge and the falling edge as the valid edge when reversing, and the reset signal 10 is used as the origin signal for resetting the counter.

[Problems to be Solved by the Invention]

Since the C pulse has a width as shown in FIG. 6, in order to make the origin position accurate, in the normal rotation, the effective edge and the rising edge shown in FIG. Reset signal 1 at the falling edge as shown in (b)
It is necessary to output 0, and this operation is generally performed at the rising edge when the rotation direction signal 6 is at the H level and at the falling edge when the rotation direction signal 6 is at the L level.
However, in the above-mentioned circuit, as shown in the time chart of FIG. 7, when the rotation direction is moved to the x position and then reversed, the rotation direction is determined until either the A-phase pulse or the B-phase pulse is input to the rotation direction determination means 5. However, since the rotation direction signal 6 is output later than the actual rotation direction, the reset signal 10 may be output at the y position of the rising edge (ineffective edge) of the C pulse that should not be output. There was a drawback.

In order to eliminate the above-mentioned drawbacks, the present invention provides a pulse reading circuit of a pulse encoder capable of surely preventing an erroneous output of a reset signal even if it is reversed in the reverse direction in the vicinity of an invalid edge of a C pulse. The purpose is to

[Means for Solving the Problems]

In order to achieve the above-mentioned object, the present invention is provided with an invalid edge detecting means 11 in parallel with the effective edge detecting means 9 for the C pulse, and an effective edge prohibiting detecting means 12 is provided at the next stage of the effective edge detecting means 9. If there is a C-pulse invalid edge signal 13 in the logical sum of the output signals of the above, the inhibition signal memory 1 for outputting the reset signal output inhibition signal 15 to the valid edge inhibition detection means 12 and the AND element 14
6 and the reset signal output prohibition signal 15 is released after the output of the new edge signal 3 or 4 of at least one of the A-phase pulse and the B-phase pulse, and in this state, the effective edge signal 17 of the C pulse is output. Reset means 18 for outputting the reset signal 10 via the AND element 14
It is equipped with and.

[Action]

Since the reset signal output inhibition signal 15 is released after confirming that the rotation direction signal 6 matches the actual rotation direction, the effective edge signal 17 of the first C pulse thereafter is output as the reset signal 10. Invalid edge signal 1
It is possible to surely prevent the erroneous output of the reset signal 10 due to the erroneous determination 3 described above.

〔Example〕

1 and 2 show an embodiment of the present invention,
Items designated by the same reference numerals as those in FIGS. 4 to 7 are the same parts. In these figures, the effective edge detection means 9 and the invalid edge detection means 9 which determine whether the edge of the C pulse is effective or ineffective based on the output signal and the rotation direction signal 6 at the next stage of the rising edge detecting means 7 and the falling edge detecting means 8. The detecting means 11 is provided in parallel, and the effective edge signal 17 which is the output of the effective edge detecting means 9 and the reset signal output inhibiting signal 15 output from the inhibiting signal memory 16 are input to the next stage of the effective edge detecting means 9. Reset signal 17
The effective edge prohibition detection means 12 is provided for detecting that the output has not been performed. The prohibition signal memory 16
Is a valid edge inhibition detection means 12 and an invalid edge detection means 1
C of the logical sum of the output signal of 1 by the logical sum element 19
When there is a pulse invalid edge signal 13, the reset signal output inhibition signal 15 is output to the valid edge inhibition detection means 12 and the logical product element 14, and this inhibition signal memory 16 is provided.
The logical sum and the edge signals 3 and 4 of the A-phase pulse and the B-phase pulse are input to the reset means 18.

After the reset signal output prohibiting signal 15 is output, a new edge signal 3 or 4 of at least one of the A-phase pulse and the B-phase pulse is input to the reset means 18, or when the logical sum is updated in the middle thereof It is released by invalidating the edge signals 3 and 4 up to and waiting for the input of new edge signals 3 and 4, that is, confirming that the rotation direction signal 6 matches the actual rotation direction and resetting the inhibition signal memory 16. In this state, if the effective edge signal 17 of the first C pulse after that is output as the reset signal 10 via the AND element 14 as shown in FIG. 3, the reset signal 10 due to the erroneous determination of the invalid edge signal 13 is generated.
Erroneous output of can be prevented.

〔The invention's effect〕

According to the present invention, in the pulse reading circuit of the pulse encoder, it is confirmed that the rotation direction signal coincides with the actual rotation direction by the reset signal output prohibition signal for prohibiting the output of the reset signal when there is an invalid edge signal of the C pulse. Since the first valid edge signal after that is output as the origin reset signal, erroneous output of the reset signal is surely prevented even if the reverse pulse is inverted in the vicinity of the invalid edge of the C pulse, and the counter etc. The effect that the origin can be maintained normally is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a first diagram.
FIG. 3 is a block diagram of the main part of the figure, FIG. 3 is a time chart showing the operation of FIGS. 1 and 2, FIG. 4 is a block diagram of a conventional example, and FIG. 5 is a time chart showing the pulse waveform of FIG. FIG. 6 is a diagram for explaining the operation of the reset signal shown in FIG.
The figure is a time chart showing the operation of FIG. 3, 4 ... Edge signal, 6 ... Rotation direction signal, 7 ... Rise detection means, 8 ... Fall detection means, 9 ...
Effective edge detection means, 10 ... Reset signal, 11 ...
Invalid edge detection means, 12 ... Effective edge inhibition detection means, 13 ... Invalid edge signal, 14 ... AND element, 1
5 ... Reset signal output prohibition signal, 16 ... Prohibition signal memory, 17 ... Effective edge signal, 18 ... Reset means.

Claims (1)

[Claims] 1. A rotation direction signal obtained from a phase relationship between an A-phase pulse and a B-phase pulse of a pulse encoder and an output signal of a rising edge detecting means and a falling edge detecting means of a C pulse output once per one rotation of the encoder. In the pulse reading circuit for outputting the origin reset signal by the C-pulse effective edge detecting means, the C-pulse invalid edge detecting means is provided in parallel with the effective edge detecting means, and the effective edge prohibiting detection is provided at the stage subsequent to the effective edge detecting means. Means for outputting a reset signal output inhibition signal to the valid edge inhibition detection means and the AND element when there is an invalid edge signal of the C pulse in the logical sum of these output signals, and the reset signal. After outputting the output prohibition signal, a new edge of at least one of the A-phase pulse and the B-phase pulse is output. Pulse reading circuit of a pulse encoder, characterized by comprising a reset means for outputting an effective edge signal C pulse as a reset signal through the AND gate in this state to release waiting for input of items.