JPH06117942A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH06117942A
JPH06117942A JP26639092A JP26639092A JPH06117942A JP H06117942 A JPH06117942 A JP H06117942A JP 26639092 A JP26639092 A JP 26639092A JP 26639092 A JP26639092 A JP 26639092A JP H06117942 A JPH06117942 A JP H06117942A
Authority
JP
Japan
Prior art keywords
layer
semiconductor device
temperature
region
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26639092A
Other languages
Japanese (ja)
Inventor
Yuichi Harada
祐一 原田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP26639092A priority Critical patent/JPH06117942A/en
Publication of JPH06117942A publication Critical patent/JPH06117942A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395Vertical transistors, e.g. vertical IGBT

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Measuring Temperature Or Quantity Of Heat (AREA)

Abstract

PURPOSE:To obtain a semiconductor device incorporating a temperature detecting element exhibiting such characteristics as reflecting the element temperature accurately by forming the temperature detecting element on the surface of a semiconductor element through a dielectric film. CONSTITUTION:A dielectric film of 0.6-1.0mum thick is deposited on a gate oxide 7 and a poly-Si layer of about 1mum thick is then deposited thereon and subjected to ion implantation to form a p<+> layer 14 and an n<+> layer 15 constituting a temperature detecting diode. An anode electrode 11 to be connected with terminal A and a cathode electrode 12 to be connected with terminal C are provided on the surfaces of the layers 14, 15. A signal dependent on forward or reverse characteristics of diode is obtained from the electrode 11 or 12 and inputted through terminal A or C to a gate voltage control circuit thus protecting a gate isolation bipolar transistor against overheat. Since temperature of semiconductor element can be detected accurately without forming any parasitic element, safety operation region is widened in this semiconductor device.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電力のスイッチングに
用いられる過熱保護機能を内蔵した半導体装置に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a built-in overheat protection function used for power switching.

【0002】[0002]

【従来の技術】電力のスイッチングに用いられる半導体
装置は、過電流により熱的破壊が起こるおそれがある。
そのために過熱保護機能を内蔵していることが望まれ
る。このような過熱保護機能には、ダイオードの順特性
あるいは逆特性の温度による変化が利用される。図2は
従来の過熱保護機能付きの絶縁ゲート型バイポーラトラ
ンジスタ(以下IGBTと記す)を示す。IGBTは、
+ 基板3の上にn+ バッファ層を介して積層されたn
- 層1の表面層に選択的にpベース層領域4を、さらに
そのpベース層領域4の表面層に選択的にn+ ソース領
域5をそれぞれ形成し、pベース領域4およびn+ ソー
ス領域5の表面をソース端子Sに接続されるソース電極
6により電気的に短絡し、pベース領域4のn+ ソース
領域5とn-層1の露出部とにはさまれた領域の上にゲ
ート酸化膜7を介してソース電極6と絶縁膜9で絶縁さ
れるゲート電極8を設け、さらにp+ 基板3の裏面にド
レイン端子Dに接続されるドレイン電極10を接触させ
ることによりできあがる。過熱検出用ダイオードは、n
+ 層1の表面層にpベース領域4を距離をとって形成さ
れたp+ 領域21と、その表面層に選択的に形成された
+ 領域22とからなる。そしてp+ 領域21にアノー
ド端子Aに接続されるアノード電極11、n+ 領域23
にカソード端子Cに接続されるカソード電極12が接続
している。通常のスイッチング動作では、ゲート電極8
にしきい値以上の電圧を印加すると、n+ソース領域5
から電子がn- 層1、n+ バッファ層2に注入される。
+ 基板10には正の電圧がかかつており、このp+
域3から正孔の注入がおこり、内蔵されているp+ 基板
3、n+ バッファ層2およびn- 層1、pベース領域4
からなるPNPトランジスタが動作し、IGBTがオン
する。このIGBTは、ゲート電極8にしきい値以下の
電圧を印加すると、n+ ソース領域4からの電子注入が
止まるのでオフすることができる。IGBTを一定の周
波数で動作させた場合、素子のスイッチング損失や定常
損失によって熱が発生し、n- 層1全体の温度が上昇す
る。
2. Description of the Related Art A semiconductor device used for power switching may be thermally destroyed due to overcurrent.
Therefore, it is desirable to have a built-in overheat protection function. For such an overheat protection function, a change in the forward characteristic or the reverse characteristic of the diode due to temperature is used. FIG. 2 shows a conventional insulated gate bipolar transistor having an overheat protection function (hereinafter referred to as an IGBT). The IGBT is
n stacked on the p + substrate 3 via the n + buffer layer
A p base layer region 4 is selectively formed on the surface layer of the layer 1, and an n + source region 5 is selectively formed on the surface layer of the p base layer region 4, and the p base region 4 and the n + source region are formed. The surface of 5 is electrically short-circuited by the source electrode 6 connected to the source terminal S, and the gate is formed on the region sandwiched between the n + source region 5 of the p base region 4 and the exposed portion of the n layer 1. The gate electrode 8 insulated from the source electrode 6 and the insulating film 9 is provided via the oxide film 7, and the drain electrode 10 connected to the drain terminal D is brought into contact with the back surface of the p + substrate 3 to complete the process. The overheat detection diode is n
The + layer 1 includes a p + region 21 formed on the surface layer of the p layer 1 with a distance from the p base region 4, and an n + region 22 selectively formed on the surface layer. The p + region 21 is connected to the anode terminal A, the anode electrode 11, and the n + region 23.
The cathode electrode 12 connected to the cathode terminal C is connected to. In normal switching operation, the gate electrode 8
Is applied to the n + source region 5
Electrons are injected into the n layer 1 and the n + buffer layer 2 from.
A positive voltage is applied to the p + substrate 10, holes are injected from the p + region 3, and the built-in p + substrate 3, n + buffer layer 2 and n layer 1, p base region are formed. Four
The PNP transistor consisting of 1 operates to turn on the IGBT. When a voltage below the threshold value is applied to the gate electrode 8, the IGBT can be turned off because electron injection from the n + source region 4 is stopped. When the IGBT is operated at a constant frequency, heat is generated due to switching loss and steady loss of the element, and the temperature of the entire n layer 1 rises.

【0003】図3はp+ 領域21とn+ 領域22とから
なる過熱検出ダイオードの順方向I−V特性を示し、線
31は室温時、線32は高温時である。従ってn- 層1
の温度上昇を飽和電圧の低下から検知できるので電極1
1、12から取出す電気信号によって、例えばゲート電
極8への印加電圧を下げることにより電流を制限する動
作を行わせれば、IGBTを過熱から保護することがで
きる。図4は過熱検出ダイオードの逆方向もれ電流特性
を示し、点41は室温時、点42高温時の一定電圧に対
するもれ電流である。従ってもれ電流の増加から温度上
昇を検知して電流を制限する動作を行わせることもでき
る。
FIG. 3 shows the forward IV characteristic of the overheat detecting diode composed of the p + region 21 and the n + region 22, where the line 31 is at room temperature and the line 32 is at high temperature. Therefore n - layer 1
Since the temperature rise of the electrode can be detected from the decrease of the saturation voltage, the electrode 1
If the operation of limiting the current is performed by reducing the voltage applied to the gate electrode 8 by the electric signals taken out from 1 and 12, the IGBT can be protected from overheating. FIG. 4 shows the reverse leakage current characteristic of the overheat detection diode, where point 41 is the leakage current with respect to a constant voltage at room temperature and at high temperature at point 42. Therefore, it is possible to detect the temperature rise from the increase of the leakage current and perform the operation of limiting the current.

【0004】[0004]

【発明が解決しようとする課題】しかし、図2に示した
半導体装置のIGBTをターンオフする際、n- 層1か
ら少数キャリアである正孔がp+ 領域21に注入され、
+ 基板3、n+ バッファ層2およびn- 層1、ダイオ
ードp+ 領域21、n+ 領域22からなる寄生サイリス
タが誤動作し、ゲート電極8による制御ができなくな
り、ラッチアップ破壊に至る。このような寄生サイリス
タの形成を避けるために、温度検出用素子を保護対象素
子と別個にして外付けすれば、保護対象素子の半導体素
体の正確な温度検出ができない。
However, when the IGBT of the semiconductor device shown in FIG. 2 is turned off, holes which are minority carriers are injected from the n layer 1 into the p + region 21,
The parasitic thyristor including the p + substrate 3, the n + buffer layer 2 and the n layer 1, the diode p + region 21, and the n + region 22 malfunctions, and the control by the gate electrode 8 becomes impossible, leading to latch-up breakdown. In order to avoid the formation of such a parasitic thyristor, if the temperature detecting element is externally attached separately from the protection target element, the temperature of the semiconductor element body of the protection target element cannot be accurately detected.

【0005】本発明の目的は、この問題を解決し、寄生
素子を形成することなく、しかも保護対象素子の半導体
素体の温度を正確に反映する特性を示す温度検出用素子
を内蔵する半導体装置を提供することにある。
An object of the present invention is to solve this problem, to form a semiconductor device having a temperature detecting element having a characteristic that accurately reflects the temperature of the semiconductor element body of the element to be protected without forming a parasitic element. To provide.

【0006】[0006]

【課題を解決するための手段】上記の目的を達成するた
めに、本発明は、主半導体素子のほかにその素子の過熱
保護のための温度検出用素子とを備えた半導体装置にお
いて、温度検出用素子が主半導体素子の半導体素体の表
面上に絶縁膜を介して形成された半導体層を基体とする
ものとする。そして、温度検出用素子が主半導体素子の
表面上に絶縁膜を介して形成された半導体層の第一導電
形の領域とその領域に隣接する第二導電形の領域よりな
るダイオードであること、そのダイオードの半導体層が
多結晶シリコン層であること、さらにそのダイオードの
領域の少なくとも一方が5×10 14Cm-2以下のドーズ量
の不純物導入によって形成されたことが有効である。
[Means for Solving the Problems]
In addition to the main semiconductor device, the present invention
In a semiconductor device equipped with a temperature detection element for protection.
The temperature detection element is the main semiconductor element
The base is a semiconductor layer formed on the surface through an insulating film
I shall. The temperature detection element is the main semiconductor element.
First conductivity of the semiconductor layer formed on the surface through an insulating film
Region of the second conductivity type adjacent to the region of
Is a diode that has a semiconductor layer of
Being a polycrystalline silicon layer,
At least one of the areas is 5 × 10 14Cm-2Dose below
It is effective that it is formed by introducing impurities.

【0007】[0007]

【作用】温度検出素子が保護対称である主素子の半導体
素体に接して形成されるため、半導体素体の温度を正確
に検出できるが、半導体素体とは電気的に絶縁されてい
るために他の素子の寄生効果による破壊の起きることが
ない。
Since the temperature detecting element is formed in contact with the semiconductor element body of the main element, which is protection symmetrical, the temperature of the semiconductor element body can be accurately detected, but it is electrically insulated from the semiconductor element body. In addition, the destruction due to the parasitic effect of other elements does not occur.

【0008】[0008]

【実施例】図1は、図2の半導体装置と同一の機能をも
つ本発明の一実施例の半導体装置を示し、図2と共通の
部分には同一の符号が付されている。図2と異なる点
は、過熱検出用ダイオードがn- 層1の表面層に形成さ
れないで、表面上のゲート酸化膜7につづく0.6〜
1.0μmの厚さの絶縁膜13の上に堆積した約1μm
の厚さの多結晶シリコン層にイオン注入して形成したp
+ 層14とn+ 層15とからなることである。そして、
このp+ 多結晶シリコン層14、n+ 多結晶シリコン層
15の表面上に、端子Aに接続されるアノード電極1
1、端子Cに接続されるカソード電極12がそれぞれ設
けられている。
1 shows a semiconductor device according to an embodiment of the present invention having the same function as that of the semiconductor device of FIG. 2, and the same parts as those of FIG. 2 are designated by the same reference numerals. 2 is different from FIG. 2 in that the overheat detecting diode is not formed on the surface layer of the n layer 1 and the gate oxide film 7 on the surface has a thickness of 0.6-
About 1 μm deposited on the insulating film 13 having a thickness of 1.0 μm
P formed by ion implantation into a polycrystalline silicon layer having a thickness of
It is composed of the + layer 14 and the n + layer 15. And
The anode electrode 1 connected to the terminal A is formed on the surfaces of the p + polycrystalline silicon layer 14 and the n + polycrystalline silicon layer 15.
1, cathode electrodes 12 connected to the terminal C are provided respectively.

【0009】このアノード電極11およびカソード電極
12から得られるダイオードの順方向特性あるいは逆方
向特性に依存する信号を、端子AおよびCからゲート電
圧の制御回路に入力してIGBTを過熱より保護する。
この半導体装置では、温度検出用のダイオードがn-
と絶縁膜13を介して形成されているので、ターンオフ
時のdv/dtによるキャリアによって寄生サイリスタ
が動作するのを阻止することができる。なお、逆方向の
降服電圧を温度上昇の検知に用いる場合、図5に示すよ
うに室温での逆方向I−V特性43と高温での逆方向I
−V特性44とがソフトであると、電圧検知の分解能が
低下し、これが温度検出の誤差につながる。しかし、p
+ 多結晶シリコン層14、n+ 多結晶シリコン層15の
いずれか一方が5×1014Cm-2以下のドーズ量のイオン
注入によって形成された場合には、逆方向I−V特性は
図6に示すようにアバランシエ特性となり、温度上昇と
共にアバランシエ電圧が上昇し、温度検出の分解能が向
上した。
A signal depending on the forward characteristic or the reverse characteristic of the diode obtained from the anode electrode 11 and the cathode electrode 12 is input from the terminals A and C to the gate voltage control circuit to protect the IGBT from overheating.
In this semiconductor device, since the temperature detecting diode is formed via the n layer and the insulating film 13, it is possible to prevent the parasitic thyristor from operating due to the carrier due to dv / dt at the time of turn-off. When the reverse breakdown voltage is used to detect the temperature rise, the reverse IV characteristic 43 at room temperature and the reverse I at high temperature I as shown in FIG.
If the −V characteristic 44 is soft, the resolution of voltage detection is lowered, which leads to an error in temperature detection. But p
When one of the + polycrystalline silicon layer 14 and the n + polycrystalline silicon layer 15 is formed by ion implantation with a dose amount of 5 × 10 14 Cm −2 or less, the reverse IV characteristic is shown in FIG. As shown in, the avalanche characteristics are obtained, and the avalanche voltage rises as the temperature rises, improving the resolution of temperature detection.

【0010】[0010]

【発明の効果】本発明によれば、温度検出素子を主素子
の半導体素体上に絶縁膜を介して設けることにより、寄
生素子が形成されることがなくなり、しかも半導体素体
の温度を正確に検出できるため、安全動作領域の拡大し
た過熱保護機能内蔵の半導体装置が得られた。
According to the present invention, since the temperature detecting element is provided on the semiconductor element body of the main element via the insulating film, the parasitic element is not formed and the temperature of the semiconductor element body is accurately measured. Therefore, a semiconductor device with a built-in overheat protection function with an expanded safe operation area was obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例のIGBTを主素子とする過
熱保護機能内蔵の半導体装置の断面図
FIG. 1 is a cross-sectional view of a semiconductor device having an IGBT as a main element and a built-in overheat protection function according to an embodiment of the present invention.

【図2】従来のIGBTを主素子とする過熱保護機能内
蔵の半導体装置の断面図
FIG. 2 is a cross-sectional view of a conventional semiconductor device having an IGBT as a main element and a built-in overheat protection function.

【図3】温度検出用ダイオードの順方向電流電圧温度特
性線図
FIG. 3 is a forward current-voltage temperature characteristic diagram of a temperature detection diode.

【図4】温度検出用ダイオードの逆方向もれ電流温度特
性図
FIG. 4 is a reverse leakage current temperature characteristic diagram of the temperature detecting diode.

【図5】温度検出用ダイオードの逆方向電流電圧温度特
性線図
FIG. 5 is a reverse current voltage temperature characteristic diagram of a temperature detecting diode.

【図6】本発明の一実施例の半導体装置の温度検出用ダ
イオートの逆方向電流電圧温度特性線図
FIG. 6 is a reverse current-voltage temperature characteristic diagram of a temperature detecting die auto of a semiconductor device according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 n- 層 2 n+ バッファ層 3 p+ 基板 4 pベース領域 5 n+ ソース領域 6 ソース電極 7 ゲート酸化膜 8 ゲート電極 10 ドレイン電極 11 アノード電極 12 カソード電極 13 絶縁膜 14 p+ 多結晶シリコン層 15 n+ 多結晶シリコン層DESCRIPTION OF SYMBOLS 1 n - layer 2 n + buffer layer 3 p + substrate 4 p base region 5 n + source region 6 source electrode 7 gate oxide film 8 gate electrode 10 drain electrode 11 anode electrode 12 cathode electrode 13 insulating film 14 p + polycrystalline silicon Layer 15 n + polycrystalline silicon layer

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】主半導体素子のほかにその素子の過熱保護
のための温度検出用素子を備えたものにおいて、温度検
出用素子が主半導体素子の半導体素体の表面上に絶縁膜
を介して形成された半導体層を基体とすることを特徴と
する半導体装置。
1. A main semiconductor device further comprising a temperature detecting device for overheat protection of the device, wherein the temperature detecting device is provided on the surface of the semiconductor body of the main semiconductor device via an insulating film. A semiconductor device comprising the formed semiconductor layer as a base.
【請求項2】温度検出用素子が主半導体素子の表面上に
絶縁膜を介して形成された半導体層の第一導電形の領域
とその領域に隣接する第二導電形の領域とよりなるダイ
オードである請求項1記載の半導体装置。
2. A diode in which a temperature detecting element is composed of a region of a first conductivity type of a semiconductor layer formed on the surface of a main semiconductor device with an insulating film interposed therebetween and a region of a second conductivity type adjacent to the region. The semiconductor device according to claim 1, wherein
【請求項3】半導体層が多結晶シリコン層である請求項
2記載の半導体装置。
3. The semiconductor device according to claim 2, wherein the semiconductor layer is a polycrystalline silicon layer.
【請求項4】ダイオードの領域の少なくとも一方が5×
1014Cm-2以下のドーズ量の不純物導入によって形成さ
れた請求項3記載の半導体装置。
4. At least one of the diode regions is 5 ×
4. The semiconductor device according to claim 3, which is formed by introducing impurities in a dose amount of 10 14 Cm −2 or less.
JP26639092A 1992-10-06 1992-10-06 Semiconductor device Pending JPH06117942A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26639092A JPH06117942A (en) 1992-10-06 1992-10-06 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26639092A JPH06117942A (en) 1992-10-06 1992-10-06 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH06117942A true JPH06117942A (en) 1994-04-28

Family

ID=17430274

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26639092A Pending JPH06117942A (en) 1992-10-06 1992-10-06 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH06117942A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004017507A1 (en) * 2002-08-13 2004-02-26 Sanken Electric Co., Ltd. Overheat protection device
US7566845B2 (en) 2005-12-20 2009-07-28 Sanken Electric Co., Ltd. Overheat protection circuit for power supply devices and direct-current power supply device
JP2009283717A (en) * 2008-05-22 2009-12-03 Fuji Electric Device Technology Co Ltd Method of manufacturing semiconductor device
US8089134B2 (en) 2008-02-06 2012-01-03 Fuji Electric Sytems Co., Ltd. Semiconductor device
WO2013015014A1 (en) 2011-07-22 2013-01-31 富士電機株式会社 Super junction semiconductor device
CN105308754A (en) * 2013-12-12 2016-02-03 富士电机株式会社 Semiconductor device, and method for producing same
CN109728081A (en) * 2017-10-31 2019-05-07 比亚迪股份有限公司 A kind of igbt chip and preparation method thereof

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WO2004017507A1 (en) * 2002-08-13 2004-02-26 Sanken Electric Co., Ltd. Overheat protection device
US7215525B2 (en) 2002-08-13 2007-05-08 Sanken Electric Co., Ltd. Overheat protector for a dc-to-dc converter or the like
US7566845B2 (en) 2005-12-20 2009-07-28 Sanken Electric Co., Ltd. Overheat protection circuit for power supply devices and direct-current power supply device
US8089134B2 (en) 2008-02-06 2012-01-03 Fuji Electric Sytems Co., Ltd. Semiconductor device
JP2009283717A (en) * 2008-05-22 2009-12-03 Fuji Electric Device Technology Co Ltd Method of manufacturing semiconductor device
US7943439B2 (en) 2008-05-22 2011-05-17 Fuji Electric Systems Co., Ltd. Method for manufacturing semiconductor apparatus
WO2013015014A1 (en) 2011-07-22 2013-01-31 富士電機株式会社 Super junction semiconductor device
CN105308754A (en) * 2013-12-12 2016-02-03 富士电机株式会社 Semiconductor device, and method for producing same
US9780012B2 (en) 2013-12-12 2017-10-03 Fuji Electric Co., Ltd. Semiconductor device and method for manufacturing the same
DE112014005661B4 (en) 2013-12-12 2023-01-12 Fuji Electric Co., Ltd. Semiconductor device and method for its manufacture
CN109728081A (en) * 2017-10-31 2019-05-07 比亚迪股份有限公司 A kind of igbt chip and preparation method thereof

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