JPH06112981A - Digital modulation circuit - Google Patents

Digital modulation circuit

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Publication number
JPH06112981A
JPH06112981A JP25614792A JP25614792A JPH06112981A JP H06112981 A JPH06112981 A JP H06112981A JP 25614792 A JP25614792 A JP 25614792A JP 25614792 A JP25614792 A JP 25614792A JP H06112981 A JPH06112981 A JP H06112981A
Authority
JP
Japan
Prior art keywords
modulation
signal
waveform shaping
waveform
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25614792A
Other languages
Japanese (ja)
Inventor
Makoto Onishi
誠 大西
Naoto Matsuzawa
直人 松沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP25614792A priority Critical patent/JPH06112981A/en
Publication of JPH06112981A publication Critical patent/JPH06112981A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To reduce the quantity of hardware by shifting a phase of a modulation waveform signal at odd number order modulation and summing the result onto a modulation waveform signal at an even order modulation time so as to minimize number of storage capacity of a ROM and number of adders. CONSTITUTION:Input digital signals I, Q are converted to + or -1 levels by a signal point arrangement circuit 51. Then a demultiplexer 52 demultiplexes the signals into signals Ie, Qe, Io, Qo at even order and odd number order modulation. The demultiplexed modulation signal is inputted to waveform shaping filters 53-56, in which the signal is converted into a modulation wave signal. Then an output signal from the waveform shaping filters 55, 56 with respect to the signal at odd number modulation time is rotated for its phase by 45 deg.(pi/4) with a 45 deg. phase correction device 57. Thus, the modulation signal waveform at an odd number modulation time for the pi/4 shift QPSK modulator is obtained. The resulting waveform is added to a modulation signal waveform at an even order modulation time, then the waveform shaping function of the pi/4 shift QPSK modulation is attained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はディジタル変調回路に係
り、特に、ディジタル移動無線で用いられるπ/4シフ
ト四相位相偏移(QPSK:Quadrature Phase Shift Ke
ying)変調方式に適用する変調回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital modulation circuit, and more particularly to a π / 4 shift quadrature phase shift key (QPSK) used in digital mobile radio.
The present invention relates to a modulation circuit applied to a modulation system.

【0002】[0002]

【従来の技術】近年、移動通信の信頼性を高めるため、
無線にディジタル変調方式を導入する事が検討されてい
る。ディジタル変調方式はディジタルデータにより搬送
波信号を変調して、電波に載せる方式であり、従来のア
ナログ方式に較べ、伝送効率が良い、雑音に強く通信品
質が良い、妨害,盗聴などに対して防御が容易で信頼性
が高いなどの長所を持っている。
2. Description of the Related Art In recent years, in order to improve the reliability of mobile communication,
The introduction of digital modulation schemes for radio is being considered. The digital modulation method is a method in which a carrier signal is modulated by digital data and placed on a radio wave. Compared with the conventional analog method, the transmission efficiency is better, the resistance to noise is better, the communication quality is better, and the protection against interference, eavesdropping, etc. is provided. It has advantages such as easy and reliable.

【0003】データを搬送波に載せる変調器は、データ
から変調波形を生成する波形整形フィルタと、搬送波信
号と変調波形を掛算して、変調波信号を得る混合器とか
らなる。前者の波形整形フィルタを構成する方法として
は、LSI化し易く、小型化,省電力化などに適するデ
ィジタル信号処理による方法がある。中でも回路の簡単
化が容易な読み出し専用メモリ(ROM:Read Only Me
mory)を用いたディジタルフィルタ方式は、よく用いら
れている。この方式に関する公知例は、例えば、特開昭
61−234153号“ディジタル変調器”に述べられているも
のがある。本発明の説明の準備として、ROMを用いて
ディジタル変調器の波形整形フィルタを構成する方法に
ついて説明する。
A modulator for placing data on a carrier wave comprises a waveform shaping filter for generating a modulated wave form from the data and a mixer for multiplying the carrier wave signal by the modulated wave form to obtain a modulated wave signal. As a method of forming the former waveform shaping filter, there is a method by digital signal processing which is easy to be an LSI and is suitable for downsizing and power saving. Above all, read-only memory (ROM: Read Only Me
The digital filter method using mory) is often used. Known examples of this method are disclosed in, for example, JP-A
61-234153, "Digital Modulator". As a preparation for the description of the present invention, a method of forming a waveform shaping filter of a digital modulator using a ROM will be described.

【0004】図1はROMを用いた波形整形フィルタの
一例である。図において、11,12,〜,1Nは遅延素
子、20,21,22,〜,2N-1,2Nは係数掛算器、
1,32,〜,3N-1,3Nは加算器、4はROMであ
る。入力データxnを遅延素子11,12,〜,1Nに入力
して、データ系列xn,xn-1,xn-2,〜,xN-1,xN
を得る。係数掛算器20,21,22,〜,2N-1,2N
よって各々のデータにフィルタ係数a0,a1,a2
〜,aN-1,aNを掛け、加算器31,32,〜,3N-1
Nで積算すると出力データynを得る。すなわち、出力
nは、
FIG. 1 shows an example of a waveform shaping filter using a ROM. In the figure, 1 1 , 12 2 , ~, 1 N are delay elements, 2 0 , 2 1 , 2 2 , ~, 2 N-1 , 2 N are coefficient multipliers,
3 1 , 3 2 , ~, 3 N-1 , 3 N are adders, and 4 is a ROM. Input data x n is input to the delay elements 1 1 , 12 2 , ..., 1 N , and the data series x n , x n-1 , x n-2 , ..., x N-1 , x N.
To get The coefficient multipliers 2 0 , 2 1 , 2 2 , ~, 2 N-1 , 2 N apply filter coefficients a 0 , a 1 , a 2 ,
~, A N-1 , a N , and adders 3 1 , 3 2 , ~, 3 N-1 ,
When integrated with 3 N , output data y n is obtained. That is, the output y n is

【0005】[0005]

【数1】 yn=a0n+a1n-1+a2n-2+…+aN-1n-N+1+aNn-N …(1) となる。数1はディジタルフィルタの動作を表す差分方
程式で、フィルタの特性は係数a0,a1,a2,〜,a
N-1,aNによって決定される。
Y n = a 0 x n + a 1 x n-1 + a 2 x n-2 + ... + a N-1 x n-N + 1 + a N x nN (1) Equation 1 is a difference equation expressing the operation of the digital filter, and the characteristics of the filter are coefficients a 0 , a 1 , a 2 , ..., a
It is determined by N-1 , a N.

【0006】図1の係数掛算器および加算器は、入力デ
ータxn のビット数が少なく、フィルタのタップ数(フ
ィルタ係数の個数)が小さければ、ROMで実現するこ
とが出来る。
The coefficient multiplier and adder shown in FIG. 1 can be realized by a ROM if the number of bits of the input data x n is small and the number of filter taps (the number of filter coefficients) is small.

【0007】図1に示した波形整形フィルタをQPSK
変調方式に応用したディジタル変調器の構成例を図2に
示す。図において、21は信号点配置回路、22,23
は波形整形フィルタ、24,25は混合器、26は信号
加算器である。図2(a)はQPSK変調の位相配置図
で、2個のディジタルデータ(I,Q)=((0,0),
(1,0),(1,1),(0,1))に対して搬送波
信号の位相を4通り(π/4,3π/4,5π/4,7
π/4)に切り換えて変調する。実際には図2(b)の
ように直交変調の回路形式が用いられる。すなわち、デ
ィジタル値(0,1)をとる2ビットのディジタルデー
タI,Qを、信号点配置回路21で(1,−1)の信号
振幅値に変換してから波形整形フィルタ22,23を通
し、混合器24,25で、直交する位相を持つ二つの搬
送波信号cosωt,sinωtと掛け合わせ、信号加算器2
6で加算合成する。
The waveform shaping filter shown in FIG.
FIG. 2 shows a configuration example of a digital modulator applied to the modulation method. In the figure, 21 is a signal point arrangement circuit, and 22 and 23.
Is a waveform shaping filter, 24 and 25 are mixers, and 26 is a signal adder. FIG. 2A is a phase arrangement diagram of QPSK modulation, in which two pieces of digital data (I, Q) = ((0,0),
Four phases (π / 4, 3π / 4, 5π / 4, 7) of the carrier signal phase with respect to (1, 0), (1, 1), (0, 1))
Modulate by switching to π / 4). In practice, a quadrature modulation circuit format is used as shown in FIG. That is, the 2-bit digital data I, Q having a digital value (0, 1) is converted into a signal amplitude value of (1, -1) by the signal point arrangement circuit 21 and then passed through the waveform shaping filters 22, 23. , The mixers 24 and 25 multiply the two carrier signals cos ωt and sin ωt having orthogonal phases to obtain a signal adder 2
Add and combine in 6.

【0008】以上は、QPSK変調方式を例に説明した
が、移動通信用に使われるディジタル変調方式は、π/
4シフトQPSK変調方式がある。この変調方式は、図
3に示すように、図3(b)の通常のQPSK変調の信
号点(白丸)と、π/4位相シフトした信号点(図3
(c)の黒丸)を、1シンボル周期毎に切り換えて伝送
する変調方式である。この変調器をROMを用いて実現
した例として、1992年電子情報通信学会春季大会で
発表された、講演番号B−338“シンボルタップRO
M分割法を用いたπ/4シフトQPSKベースバンド信
号発生器”がある。
Although the QPSK modulation method has been described above as an example, the digital modulation method used for mobile communication is π /
There is a 4-shift QPSK modulation method. This modulation method, as shown in FIG. 3, includes the signal points (white circles) of the normal QPSK modulation of FIG.
This is a modulation method in which (c) the black circles) are switched and transmitted every symbol period. As an example of implementing this modulator using a ROM, the presentation number B-338 “symbol tap RO” presented at the 1992 IEICE Spring Conference.
There is a π / 4 shift QPSK baseband signal generator using the M division method.

【0009】[0009]

【発明が解決しようとする課題】上記従来技術で述べた
ROMを用いたディジタル変調器で、移動通信用のπ/
4シフトQPSK変調方式を実現しようとすると、図3
(a)から分かるように、I,Q各々5個の振幅レベル
(−√2,−1,0,1,√2)が必要となる。これを
ROMを用いるディジタルフィルタで実現すると、図4
に示すようになる。図で、41はπ/4シフトQPSK
変調の信号点配置回路、42,43は波形整形フィルタ
である。信号点配置回路41の出力は5レベルとなるの
で、1変調信号あたり3ビットの情報が必要となり、波
形整形フィルタ42,43の、ROMのアドレスビット数
が増加してROM記憶容量が増え、ハードウェア規模の
増大を招く。逆に言えば、タップ数の少ない波形整形フ
ィルタしか構成できない。
DISCLOSURE OF THE INVENTION A digital modulator using a ROM as described in the above-mentioned prior art, which has a π /
When trying to realize the 4-shift QPSK modulation method, the
As can be seen from (a), five I and Q amplitude levels (−√2, −1, 0, 1, √2) are required. If this is realized by a digital filter using a ROM, the result shown in FIG.
As shown in. In the figure, 41 is π / 4 shift QPSK
Signal point arrangement circuits for modulation, and 42 and 43 are waveform shaping filters. Since the output of the signal point arrangement circuit 41 has 5 levels, information of 3 bits per modulation signal is required, and the number of ROM address bits of the waveform shaping filters 42 and 43 is increased to increase the ROM storage capacity. This leads to an increase in wear scale. Conversely speaking, only a waveform shaping filter with a small number of taps can be constructed.

【0010】この問題点を避けるため、従来技術の項で
述べたπ/4シフトQPSK変調では、ROMを複数個
に分割し、各ROM出力を加算器で総和して、実現して
いる。この方法ではROMの記憶容量は実現容易な規模
に抑えられるが、ROMの個数が多くなり、加算器もR
OMの個数に等しい数だけ必要となって、全体のハード
ウェア量は、やはり大きくなってしまう。
In order to avoid this problem, in the π / 4 shift QPSK modulation described in the section of the prior art, the ROM is divided into a plurality of pieces, and the outputs of the respective ROMs are summed by an adder to realize this. With this method, the storage capacity of the ROM can be suppressed to a scale that is easy to realize, but the number of ROMs increases and the adder also has R
As many as the number of OMs are required, and the total amount of hardware also becomes large.

【0011】本発明の目的は、従来のROMを用いたπ
/4シフトQPSKディジタル変調器において、ROM
記憶容量および加算器の総数が最小となる、波形整形フ
ィルタの構成法を提供し、ディジタル変調器のハードウ
ェア量の逓減を図ることにある。
An object of the present invention is to use a conventional ROM for .pi.
/ 4 shift QPSK digital modulator, ROM
(EN) A method of constructing a waveform shaping filter that minimizes the storage capacity and the total number of adders is provided, and the hardware amount of a digital modulator is gradually reduced.

【0012】[0012]

【課題を解決するための手段】上記目的を達成するため
に、π/4シフトQPSK変調の特徴に着目し、信号点
配置が2個の振幅レベル(1ビット)で表現出来る様に
工夫する。すなわち、図3から、π/4シフトQPSK
変調の変調信号点配置は、1変調時点毎にQPSK変調信号
点をπ/4(45度)ずつ回転しながら変調している事
が分かる。あるいは、偶数番目の変調時点ではQPSK
変調と同一の変調点配置を用い、奇数番目の変調時点で
はQPSK変調の変調点配置をπ/4シフトしたものに
なっている。そこで、奇数番目の変調時点では図3
(c)に示すようにI′,Q′の様な45度傾けた軸で
入力信号を考え、波形整形フィルタの出力を合成する時
に、奇数番目の変調時点のデータを45度傾け、偶数番
目の波形整形出力と加算合成する。すなわち、変調デー
タを奇数番目と偶数番目のデータに分割するデマルチプ
レクサと、4個のROM波形整形フィルタと、奇数番目
の波形整形フィルタ出力を45度回転する位相補正器
と、奇数番目と偶数番目のROMフィルタ出力を加算す
る加算器によってπ/4シフトQPSKディジタル変調
器が構成できる。
In order to achieve the above object, attention is paid to the characteristics of π / 4 shift QPSK modulation, and devised so that the signal point arrangement can be expressed by two amplitude levels (1 bit). That is, from FIG. 3, π / 4 shift QPSK
It can be seen that the modulation signal point arrangement for modulation is such that the QPSK modulation signal point is modulated while rotating by π / 4 (45 degrees) at each modulation time point. Alternatively, QPSK at the even-numbered modulation points
The same modulation point arrangement as that used for modulation is used, and the modulation point arrangement for QPSK modulation is shifted by π / 4 at the time of odd-numbered modulation. Therefore, at the time of odd-numbered modulation,
As shown in (c), when an input signal is considered with an axis inclined by 45 degrees such as I ′ and Q ′, and when the output of the waveform shaping filter is synthesized, the data at the odd-numbered modulation time point is inclined by 45 degrees and the even-numbered modulation time point is inclined. Add and synthesize with the waveform shaping output of. That is, a demultiplexer that divides the modulated data into odd-numbered and even-numbered data, four ROM waveform shaping filters, a phase corrector that rotates the output of the odd-numbered waveform shaping filter by 45 degrees, an odd-numbered and even-numbered data A π / 4 shift QPSK digital modulator can be configured by an adder that adds the ROM filter outputs of

【0013】この様にすると、入力信号を奇数番目と偶
数番目に分ける必要があるが、各々はQPSK変調波と
同じ信号点配置と同じ配置で済み、ROM波形整形フィ
ルタの入力信号のレベル数は5(3ビット)から2(1
ビット)に減少する。Nタップの波形整形フィルタの信
号ビット数が減少するので、アドレスビット数は、2N
ビット減少する。例えば、5タップのフィルタでは10
ビット減少し、ROM容量は1/1024に激減する。こ
れに伴い、ROMを分割する個数も減るので、ROM出
力を加算する加算器の個数も減少する。こうしてπ/4
シフトQPSKディジタル変調器において、ROM容量およ
び加算器の個数を縮減し、ハードウェア量の逓減が可能
な構成が実現できる。
In this way, it is necessary to divide the input signal into odd-numbered and even-numbered ones, but it is sufficient that each of them has the same signal point arrangement and the same arrangement as the QPSK modulated wave, and the number of input signal levels of the ROM waveform shaping filter is 5 (3 bits) to 2 (1
A bit). Since the number of signal bits of the N tap waveform shaping filter decreases, the number of address bits is 2N.
Bit reduced. For example, with a 5-tap filter, 10
Bits are reduced and ROM capacity is drastically reduced to 1/1024. Along with this, the number of divided ROMs also decreases, and the number of adders for adding ROM outputs also decreases. Thus π / 4
In the shift QPSK digital modulator, it is possible to realize a configuration in which the ROM capacity and the number of adders can be reduced and the hardware amount can be gradually reduced.

【0014】[0014]

【作用】このように、本発明のディジタル変調器では、
ROM波形整形フィルタ以外に、デマルチプレクサと、
位相補正器と加算器が余分に必要になるものの、波形整
形フィルタのROM容量を大幅に減少できる。この減少
は非常に大きいので、余分に必要となる付加回路による
ハード増加を補って余り有るものである。
As described above, in the digital modulator of the present invention,
In addition to the ROM waveform shaping filter, a demultiplexer,
Although an extra phase corrector and adder are required, the ROM capacity of the waveform shaping filter can be greatly reduced. Since this decrease is very large, it is more than enough to compensate for the increase in hardware due to the additional circuit required.

【0015】また、波形整形フィルタは偶数番目のI,
Qデータ用と、奇数番目のI,Qデータ用にそれぞれ必
要となるので、都合4個のフィルタが要る。このことは
ROMフィルタの個数は増えることになるが、I,Qフィ
ルタは係数が全く同じであるため、時間多重使用するこ
とが出来て、個数を削減できる。この場合、ROMのア
ドレスは、1ビット増えるだけであり、さらに加算器も
多重使用することが可能であるので、一層のハードウェ
ア削減が実現できる。
Further, the waveform shaping filter has even-numbered I,
Since it is necessary for Q data and for odd-numbered I and Q data respectively, a total of four filters are required. This is
Although the number of ROM filters will increase, since the I and Q filters have exactly the same coefficients, they can be used in time multiplex and the number can be reduced. In this case, the address of the ROM only increases by one bit, and the adder can also be used multiple times, so that further hardware reduction can be realized.

【0016】[0016]

【実施例】図5は本発明の第1の実施例のブロック図で
ある。図において、51は信号点配置回路、52はデマ
ルチプレクサ、53,54,55,56は波形整形フィ
ルタ、57は位相補正器、58,59は信号加算器であ
る。
FIG. 5 is a block diagram of the first embodiment of the present invention. In the figure, 51 is a signal point arrangement circuit, 52 is a demultiplexer, 53, 54, 55 and 56 are waveform shaping filters, 57 is a phase corrector, and 58 and 59 are signal adders.

【0017】入力ディジタル信号I,Qは信号点配置回
路51によって、±1の振幅値に変換される。この変換
は図2(a)に示すQPSK変調の信号点配置に従って
行う。次に、デマルチプレクサ52によって偶数番目と
奇数番目の変調時点の信号Ie,Qe,Io,Qoに分
離する。分離した変調信号は、各々波形整形フィルタ5
3〜56に入力し、変調波形信号に変換する。フィルタ
53,54および55,56は、それぞれ全く同一の係
数を持つフィルタであり、偶数番目あるいは奇数番目の
時点のデータしか入力されないが、出力信号はどちらの
時点に対してもデータを出力する。奇数番目の変調時点
の信号に対する波形整形フィルタ55,56の出力信号
は、45度位相補正器57によって、位相を45度(π
/4)回転する。こうして、π/4シフトQPSK変調
波の奇数番目の変調時点の変調信号波形が得られる。こ
れを加算器58,59によって偶数番目の変調時点の変
調信号波形と加算合成すれば、π/4シフトQPSK変
調の波形整形機能が達成できる。最終的に変調波を得る
には、図2に示した搬送波変調回路(混合器24,25
と信号加算器26)を通せばよい。この部分はQPSK
変調器の場合と全く同一であるので省略する。
The input digital signals I and Q are converted by the signal point arrangement circuit 51 into amplitude values of ± 1. This conversion is performed according to the signal point arrangement of QPSK modulation shown in FIG. Next, the demultiplexer 52 separates the signals Ie, Qe, Io, and Qo at the even and odd modulation times. The separated modulation signals are respectively subjected to the waveform shaping filter 5
3 to 56, and converts into a modulated waveform signal. The filters 53, 54 and 55, 56 are filters having exactly the same coefficient, and only data at even or odd time points are input, but the output signal outputs data at any time point. The output signals of the waveform shaping filters 55 and 56 with respect to the signals at the odd-numbered times of modulation have a phase of 45 degrees (π) by the 45-degree phase corrector 57.
/ 4) Rotate. In this way, the modulation signal waveform at the odd-numbered modulation time point of the π / 4 shift QPSK modulation wave is obtained. By adding and synthesizing this with the modulation signal waveforms at the even-numbered modulation points by the adders 58 and 59, the waveform shaping function of π / 4 shift QPSK modulation can be achieved. In order to finally obtain a modulated wave, the carrier wave modulation circuit (mixers 24, 25 shown in FIG. 2 is used.
And the signal adder 26). This part is QPSK
Since it is exactly the same as the case of the modulator, it is omitted.

【0018】図6に図5の実施例で用いる位相補正器の
一構成例を示す。図6で61,62は加減算器、63,
64は係数掛算器である。I,Qの信号を複素数で表す
と、I+jQのようになる。ここで複素数の位相角はφ
=arctan(Q/I)で表される。従って信号xI+jxQ
を−π/4位相回転すると、
FIG. 6 shows an example of the configuration of the phase corrector used in the embodiment of FIG. In FIG. 6, 61 and 62 are adders and subtractors, 63 and
64 is a coefficient multiplier. When the I and Q signals are expressed by complex numbers, they become I + jQ. Where the phase angle of the complex number is φ
= Arctan (Q / I) Therefore, the signal x I + jx Q
By rotating -π / 4 phase,

【0019】[0019]

【数2】 yI+jyQ=(xI+jxQ)×exp(−jπ/4) =(xI+jxQ)×(cosπ/4−jsinπ/4) =(√2/2)×(1−j)×(xI+jxQ) =(√1/2)×((xI+xQ)+j(xQ−xI)) …(2) となり、図6の様な構成で実現できることが分かる。図
6では係数掛算器を用いているが、この部分は図5の波
形整形フィルタ55,56に含めることが出来る。
Y I + jy Q = (x I + jx Q ) × exp (−jπ / 4) = (x I + jx Q ) × (cosπ / 4−jsinπ / 4) = (√2 / 2) × (1 −j) × (x I + jx Q ) = (√1 / 2) × ((x I + x Q ) + j (x Q −x I )) (2), which can be realized by the configuration shown in FIG. I understand. Although the coefficient multiplier is used in FIG. 6, this portion can be included in the waveform shaping filters 55 and 56 in FIG.

【0020】以上の説明で分かるとおり、本実施例によ
れば、図3(a)に示したπ/4シフトQPSK変調方
式の変調器を、図2(a)のQPSK変調器と同じ構成
の波形整形フィルタを用いて実現することが出来る。す
なわち、図4の従来例のように信号点の多値化によるR
OMのアドレスビット数の増加がなく、記憶容量の小さ
いROMを用いて、ハードウェアを実現することが出来
る。
As can be seen from the above description, according to this embodiment, the modulator of the π / 4 shift QPSK modulation system shown in FIG. 3A has the same structure as the QPSK modulator of FIG. 2A. It can be realized by using a waveform shaping filter. That is, as in the conventional example of FIG.
The hardware can be realized by using a ROM having a small storage capacity without increasing the number of address bits of the OM.

【0021】図5に示した第1の実施例では、波形整形
フィルタが4個要り、さらに位相補正器や、加算器など
の付加回路が必要であった。ROM波形整形フィルタ5
3,54および、55,56は各々係数が同じであるの
で、多重使用することにより、これらのハードウェアを
一個のROMの中に実現できる。この考えを用いた本発
明の第2の実施例を以下に示す。
In the first embodiment shown in FIG. 5, four waveform shaping filters are required, and additional circuits such as a phase corrector and an adder are required. ROM waveform shaping filter 5
Since 3, 54 and 55, 56 have the same coefficient, these hardware can be realized in one ROM by using them in multiple. A second embodiment of the present invention using this idea will be shown below.

【0022】図7で70はROMフィルタ、71,72
は波形整形フィルタ、73は位相補正器、74はデマル
チプレクサである。奇数番目の変調時点の信号Io,Q
oに対して、波形整形フィルタの係数は同じであるの
で、多重使用すれば一個のROMで処理できる。さらに、
同一ROMで位相補正器73の機能も実現する。位相補
正器は図6で説明したように、加算器と係数乗算器で構
成できるので、図1に示すROMで実現する波形整形フ
ィルタで構成できることは容易に分かる。ROMの出力
ビット数を減らすため、出力端子はI,Qデータで多重
使用する。このため、デマルチプレクサ74でI,Q各
々の出力を分離し、信号加算器58,59で偶数番目の
変調時点のデータと加え合わせる。こうして、図7に説
明した実施例により、ROMの個数を一個減らし、さら
に位相補正器も削減したπ/4シフトQPSK変調器が
構成できる。
In FIG. 7, reference numeral 70 is a ROM filter, and 71 and 72.
Is a waveform shaping filter, 73 is a phase corrector, and 74 is a demultiplexer. Signals Io and Q at the time of odd-numbered modulation
Since the coefficient of the waveform shaping filter is the same as that of o, it can be processed by one ROM if multiple uses are made. further,
The same ROM also realizes the function of the phase corrector 73. Since the phase corrector can be configured by the adder and the coefficient multiplier as described with reference to FIG. 6, it can be easily understood that it can be configured by the waveform shaping filter realized by the ROM shown in FIG. In order to reduce the number of output bits of the ROM, the output terminal is multiplexed with I and Q data. Therefore, the demultiplexer 74 separates the I and Q outputs, and the signal adders 58 and 59 add the data at the even-numbered modulation points. Thus, according to the embodiment described in FIG. 7, the π / 4 shift QPSK modulator in which the number of ROMs is reduced by one and the phase corrector is also reduced can be configured.

【0023】上述した多重化による方法を偶数番目変調
時点の波形整形フィルタにも用いる事が出来る。この実
施例を図8に示す。図に於いて、80はROMフィル
タ、81,82は波形整形フィルタ、83はマルチプレ
クサ、84は信号加算器、85はデマルチプレクサであ
る。偶数番目変調時点の信号Ie,Qeに対しても、波
形整形フィルタの係数は同じであるので、多重使用によ
り一個のROMで共用することが出来る。この時、RO
Mの出力ビット数を減らすため、出力を時間多重使用す
る。すなわち、マルチプレクサ83を用いて、波形整形
フィルタ81,82の出力を多重する。さらに奇数番目
変調時点の波形整形フィルタの出力との加算合成も、多
重したまま信号加算器84で行ない、最終出力をデマル
チプレクサ85で分離すれば、加算合成用の加算器も1
個で済ます事が出来る。
The method based on the above-described multiplexing can also be used for the waveform shaping filter at the time of even-numbered modulation. This embodiment is shown in FIG. In the figure, 80 is a ROM filter, 81 and 82 are waveform shaping filters, 83 is a multiplexer, 84 is a signal adder, and 85 is a demultiplexer. The coefficients of the waveform shaping filter are the same for the signals Ie and Qe at the even-numbered modulation time, so that they can be shared by one ROM by multiple use. At this time, RO
The outputs are time-multiplexed to reduce the number of output bits of M. That is, the multiplexer 83 is used to multiplex the outputs of the waveform shaping filters 81 and 82. Further, addition and synthesis with the output of the waveform shaping filter at the time of odd-numbered modulation is also performed by the signal adder 84 while being multiplexed, and if the final output is separated by the demultiplexer 85, the adder for addition and synthesis is also 1
You can do it individually.

【0024】以上、本発明を用いて、π/4シフトQP
SK変調用ディジタル変調器のROM波形整形フィルタの
ROM容量を縮減する実施例について説明した。本発明
は若干の付加回路が必要となるものの、ROM容量の縮
減は2のべき乗で行われるので、ハードウェアの減少は
付加回路の増加を補っても余りあるものである。さらに
波形整形フィルタを多重使用することによって、付加回
路もROMの中に取り込むことが出来る。
As described above, according to the present invention, the π / 4 shift QP
The embodiment for reducing the ROM capacity of the ROM waveform shaping filter of the SK modulation digital modulator has been described. Although the present invention requires some additional circuits, the reduction of the ROM capacity is performed by a power of 2, so that the reduction in hardware is sufficient even if the increase in additional circuits is supplemented. Further, by additionally using the waveform shaping filter, the additional circuit can be incorporated in the ROM.

【0025】[0025]

【発明の効果】本発明によれば、π/4シフトQPSK
変調方式のディジタル変調器をROMを用いるディジタ
ル処理で実現する場合、従来法ではROM容量が増加す
るため、ROMおよびROM出力を加算合成する加算器
の個数が増加して、ハードウェア量が大きくなるという
問題点を解決する事が出来る。ROM以外の若干の付加
回路が必要であるが、本発明によるROM容量の減少は
これらの付加回路のハードウェア量を補って余り有るも
のであり、問題とならない。さらには、波形整形フィル
タを多重使用することによって、ROM個数および付加
回路もROMの中に取り込むことが出来、一層のハード
ウェア縮減を達成できる。
According to the present invention, π / 4 shift QPSK
When a modulation type digital modulator is implemented by digital processing using a ROM, the ROM capacity is increased in the conventional method, so that the number of adders for adding and synthesizing the ROM and the ROM output is increased and the hardware amount is increased. The problem can be solved. Although some additional circuits other than the ROM are required, the reduction in the ROM capacity according to the present invention does not pose a problem because it is sufficient to supplement the hardware amount of these additional circuits. Furthermore, by using multiple waveform shaping filters, the number of ROMs and additional circuits can be incorporated in the ROMs, and further hardware reduction can be achieved.

【図面の簡単な説明】[Brief description of drawings]

【図1】波形整形フィルタのブロック図。FIG. 1 is a block diagram of a waveform shaping filter.

【図2】QPSKディジタル変調器のブロック図。FIG. 2 is a block diagram of a QPSK digital modulator.

【図3】π/4シフトQPSK変調方式の信号点の配置
図。
FIG. 3 is an arrangement diagram of signal points of a π / 4 shift QPSK modulation method.

【図4】π/4シフトQPSK変調器の部分構成図。FIG. 4 is a partial configuration diagram of a π / 4 shift QPSK modulator.

【図5】本発明の第1の実施例のブロック図。FIG. 5 is a block diagram of a first embodiment of the present invention.

【図6】図5の実施例で用いる位相補正器の説明図。6 is an explanatory diagram of a phase corrector used in the embodiment of FIG.

【図7】本発明の第2の実施例のブロック図。FIG. 7 is a block diagram of a second embodiment of the present invention.

【図8】本発明の第3の実施例のブロック図。FIG. 8 is a block diagram of a third embodiment of the present invention.

【符号の説明】[Explanation of symbols]

51…信号点配置回路、52…デマルチプレクサ、5
3,54,55,56…波形整形フィルタ、57…位相
補正器、58,59…信号加算器。
51 ... Signal point arrangement circuit, 52 ... Demultiplexer, 5
3, 54, 55, 56 ... Waveform shaping filter, 57 ... Phase corrector, 58, 59 ... Signal adder.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】π/4シフト四相位相偏移変調方式の変調
波信号を得る変調回路において、変調信号を偶数番目と
奇数番目の変調時点の信号に分割し、各々波形整形フィ
ルタで、前記変調波形信号に変換した後、奇数番目変調
時点の変調波形信号の位相をπ/4シフトしてから偶数
番目変調時点の変調波形信号と加算合成して、変調波形
信号を得ることを特徴とするディジタル変調回路。
1. A modulation circuit for obtaining a modulated wave signal of a π / 4 shift four-phase phase shift keying system, wherein the modulated signal is divided into even-numbered and odd-numbered signals at the time of modulation, and each is divided by a waveform shaping filter, After being converted into a modulation waveform signal, the phase of the modulation waveform signal at the odd-numbered modulation time point is shifted by π / 4 and then added and synthesized with the modulation waveform signal at the even-numbered modulation time point to obtain the modulation waveform signal. Digital modulation circuit.
【請求項2】請求項1において、前記波形整形フィルタ
を読み出し専用メモリを用いたディジタル波形整形フィ
ルタで構成し、かつ波形整形フィルタを同相成分と直交
成分とで多重使用するディジタル変調回路。
2. A digital modulation circuit according to claim 1, wherein said waveform shaping filter is constituted by a digital waveform shaping filter using a read-only memory, and the waveform shaping filter is multiplexed with an in-phase component and a quadrature component.
【請求項3】請求項2において、奇数番目変調時点の波
形整形フィルタ出力の位相をπ/4シフトする回路を、
前記波形整形フィルタを構成する読み出し専用メモリを
用いて一括処理するディジタル変調回路。
3. The circuit according to claim 2, which shifts the phase of the output of the waveform shaping filter at the time of odd-numbered modulation by π / 4,
A digital modulation circuit that performs batch processing using a read-only memory that constitutes the waveform shaping filter.
【請求項4】請求項3において、前記偶数番目変調時点
の波形整形フィルタ出力を、同相,直交成分を多重した
まま奇数番目変調時点の波形整形フィルタ出力と加算合
成した後、同相,直交成分に分離して、変調波形信号を
得るディジタル変調回路。
4. The waveform shaping filter output at the even-numbered modulation time point is added and synthesized with the waveform shaping filter output at the odd-numbered modulation time point while the in-phase and quadrature component are multiplexed, and then converted into the in-phase and quadrature component. A digital modulation circuit that separates and obtains a modulated waveform signal.
JP25614792A 1992-09-25 1992-09-25 Digital modulation circuit Pending JPH06112981A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25614792A JPH06112981A (en) 1992-09-25 1992-09-25 Digital modulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25614792A JPH06112981A (en) 1992-09-25 1992-09-25 Digital modulation circuit

Publications (1)

Publication Number Publication Date
JPH06112981A true JPH06112981A (en) 1994-04-22

Family

ID=17288561

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25614792A Pending JPH06112981A (en) 1992-09-25 1992-09-25 Digital modulation circuit

Country Status (1)

Country Link
JP (1) JPH06112981A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007221329A (en) * 2006-02-15 2007-08-30 Fujitsu Ltd Frequency division multiplex transmission/reception apparatus and transmission/reception method
JP2011061384A (en) * 2009-09-08 2011-03-24 Toshiba Corp Quadrature modulator and transmitter
WO2016076002A1 (en) * 2014-11-13 2016-05-19 三菱電機株式会社 Transmitter and receiver

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007221329A (en) * 2006-02-15 2007-08-30 Fujitsu Ltd Frequency division multiplex transmission/reception apparatus and transmission/reception method
JP2011061384A (en) * 2009-09-08 2011-03-24 Toshiba Corp Quadrature modulator and transmitter
WO2016076002A1 (en) * 2014-11-13 2016-05-19 三菱電機株式会社 Transmitter and receiver
JPWO2016076002A1 (en) * 2014-11-13 2017-05-25 三菱電機株式会社 Transmitter and receiver
US10122556B2 (en) 2014-11-13 2018-11-06 Mitsubishi Electric Corporation Transmitter and receiver

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