JPH06112532A - Method for forming electrode of semiconductor element - Google Patents
Method for forming electrode of semiconductor elementInfo
- Publication number
- JPH06112532A JPH06112532A JP28063992A JP28063992A JPH06112532A JP H06112532 A JPH06112532 A JP H06112532A JP 28063992 A JP28063992 A JP 28063992A JP 28063992 A JP28063992 A JP 28063992A JP H06112532 A JPH06112532 A JP H06112532A
- Authority
- JP
- Japan
- Prior art keywords
- film
- electrode
- semiconductor
- layer
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、半導体素子の電極形成
方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming electrodes of a semiconductor device.
【0002】[0002]
【従来技術】半導体素子における電流狭窄手段として、
SiO2 、SiNX などの絶縁膜に、電流流路に応じた
サイズの狭窄電流通過部を設け、これに電極金属層を蒸
着する方法が知られている。ところで、InGaAsP
系あるいはGaAs系の発光ダイオード素子は、中距離
大容量光通信用デバイスとして注目されている。このデ
バイスには、通信の長距離化、大容量化および信頼性の
向上を図るため、光ファイバとの結合効率が高いこと、
応答速度が速いこと、さらに高信頼性であることが要求
され、上述の電極形成方法が用いられている。従来の発
光ダイオード素子は、例えば図2に示すように、ブロッ
キング型の構造をしており、以下のようにして製造され
る。即ち、 1)n−InP基板7の裏面に液相成長法により、n−
InP基板6、p−InGaAsP活性層5、p−In
Pクラッド層4、p−InGaAsPキャップ層3、I
nP電流阻止層2を順次積層させる。 2)次いで、SiO2 などのシリコン系絶縁膜1を形成
する。 3)次いで、絶縁膜1と電流阻止層2を同心円状に円形
に除去し、Tiコンタクト膜/Ptバリア膜/Au膜か
らなるp電極9を形成し、また、AuGeNiからなる
n電極8を形成する。p電極9を形成する際には、例え
ば図3に示すように、電気的接触を安定化させる100
0ÅのTi膜からなるコンタクト膜11、Auの拡散を
防止する2000ÅのPt膜からなるバリア膜12、2
000ÅのAu膜13を順次積層している。このように
して、Au膜13がp−InGaAsPキャップ層3や
InP電流阻止層2に直接接触して、Auがマイグレー
ションすることにより、素子が劣化するのを防いでい
る。 4)最後に、p電極9上にAuメッキ層10を形成し
て、フラット化する。このような構造の発光ダイオード
では、発光領域が限定されるため、光ファイバとの結合
効率を向上させることができる。また、キャップ層3と
絶縁膜1の間に電流阻止層2を介在させることにより、
熱膨張係数の異なる絶縁膜1とキャップ層3を分離さ
せ、両者の間の熱応力に起因する欠陥による劣化を防ぐ
ことが可能となり、信頼性の向上を図ることができる。2. Description of the Related Art As a current confining means in a semiconductor device,
A method is known in which an insulating film such as SiO 2 or SiN x is provided with a constriction current passage portion having a size corresponding to a current flow path, and an electrode metal layer is deposited on the constriction current passage portion. By the way, InGaAsP
-Based or GaAs-based light emitting diode elements have been attracting attention as devices for medium-range, large-capacity optical communication. This device has a high coupling efficiency with the optical fiber in order to extend the communication distance, increase the capacity, and improve reliability.
A high response speed and high reliability are required, and the above-mentioned electrode forming method is used. The conventional light emitting diode element has a blocking type structure as shown in FIG. 2, for example, and is manufactured as follows. That is, 1) n-
InP substrate 6, p-InGaAsP active layer 5, p-In
P clad layer 4, p-InGaAsP cap layer 3, I
The nP current blocking layer 2 is sequentially laminated. 2) Next, a silicon-based insulating film 1 such as SiO 2 is formed. 3) Next, the insulating film 1 and the current blocking layer 2 are concentrically and circularly removed to form a p-electrode 9 made of a Ti contact film / Pt barrier film / Au film, and an n-electrode 8 made of AuGeNi. To do. When forming the p-electrode 9, as shown in, for example, FIG.
Contact film 11 made of 0Å Ti film, barrier film 12 made of 2000Å Pt film for preventing Au diffusion, 2
The 000Å Au film 13 is sequentially laminated. In this way, the Au film 13 directly contacts the p-InGaAsP cap layer 3 and the InP current blocking layer 2 to prevent Au from migrating, thereby preventing the device from deteriorating. 4) Finally, the Au plating layer 10 is formed on the p electrode 9 to flatten it. In the light emitting diode having such a structure, since the light emitting region is limited, the coupling efficiency with the optical fiber can be improved. Further, by interposing the current blocking layer 2 between the cap layer 3 and the insulating film 1,
By separating the insulating film 1 and the cap layer 3 having different thermal expansion coefficients from each other, it is possible to prevent deterioration due to defects caused by thermal stress between them, and it is possible to improve reliability.
【0003】[0003]
【発明が解決しようとする課題】しかしながら、上述の
発光ダイオード素子には、以下のような問題があった。
即ち、InP電流阻止層2の段差部14において、コン
タクト膜11とバリア膜12に段切れを生じ、Au膜1
3がInP電流阻止層2に接触する恐れがある。従っ
て、キャップ層3とTiコンタクト膜11の電気的接触
を安定化するために施すp電極9形成後の熱処理によ
り、Au膜13とInP電流阻止層2が反応し、Auが
活性層5近傍まで拡散し、素子の信頼性を低下させる恐
れがあった。However, the above-mentioned light emitting diode element has the following problems.
That is, in the step portion 14 of the InP current blocking layer 2, step breakage occurs in the contact film 11 and the barrier film 12, and the Au film 1
3 may contact the InP current blocking layer 2. Therefore, the Au film 13 and the InP current blocking layer 2 react with each other by the heat treatment after the formation of the p electrode 9 for stabilizing the electrical contact between the cap layer 3 and the Ti contact film 11, and Au reaches the vicinity of the active layer 5. There is a risk of diffusion and deterioration of the reliability of the device.
【0004】[0004]
【課題を解決するための手段】本発明は上記問題点を解
決した半導体素子の電極形成方法を提供するもので、半
導体層上に電流狭窄窓を有する半導体からなる電流阻止
層および前記電流狭窄窓よりも窓面積の大きい電流狭窄
窓を有する絶縁膜が形成された半導体素子上に、コンタ
クト膜、バリア膜およびAu膜が積層された電極を形成
する半導体素子の電極形成方法において、コンタクト膜
とバリア膜を順次積層したのち、熱処理を施し、次いで
Au膜を積層することを特徴とするものである。SUMMARY OF THE INVENTION The present invention provides a method for forming electrodes of a semiconductor device, which solves the above problems. A current blocking layer made of a semiconductor having a current constriction window on a semiconductor layer and the current constriction window. In a method of forming an electrode of a semiconductor element, an electrode having a contact film, a barrier film and an Au film stacked on a semiconductor element having an insulating film having a current confinement window having a larger window area than the contact film and the barrier film. It is characterized in that after the films are sequentially laminated, a heat treatment is performed, and then an Au film is laminated.
【0005】[0005]
【作用】上述のように、コンタクト膜とバリア膜を順次
積層したのち、熱処理を施し、次いでAu膜を積層する
と、Au膜は熱処理を受けないため、Au膜が半導体か
らなる電流阻止層に接触しても、Auが電流阻止層に侵
入することを防ぐことができる。As described above, when the contact film and the barrier film are sequentially laminated, then the heat treatment is performed, and then the Au film is laminated, the Au film is not subjected to the heat treatment. Therefore, the Au film contacts the current blocking layer made of a semiconductor. However, Au can be prevented from entering the current blocking layer.
【0006】[0006]
【実施例】以下、図面に示した実施例に基づいて本発明
を詳細に説明する。図1は本発明にかかる半導体素子の
電極形成方法を用いて製作した発光ダイオードの一実施
例の断面図である。本実施例は以下のようにして製作し
た。即ち、 1)n−InP基板7の裏面に液相成長法により、n−
InPバッファ層6、p−InGaAsP活性層5、p
−InPクラッド層4、p−InGaAsPキャップ層
3、InP阻止層2を順次積層させる。 2)次いで、SiO2 などのシリコン系絶縁膜1を形成
する。 3)次いで、絶縁膜1と電流阻止層2を同心円状に円形
に除去する。ここまでは従来技術と同様である。 4)次いで、1000ÅのTiからなるコンタクト膜1
1、2000ÅのPtからなるバリア膜12を順次成膜
し、次いで、AuGeNiからなるn電極8を成膜し、
熱処理を行う。最後に、Auメッキ層10を成膜して、
p電極を形成する。このようにして形成したp電極は、
Auメッキ層10を成膜するまえに熱処理を行うため、
たとえAuメッキ層10が電流阻止層2に接触しても、
AuがInP電流阻止層2に拡散するのを防ぐことがで
きる。本発明は、発光ダイオードに限定されず、電流狭
窄構造を有する半導体素子に適用できることはいうまで
もない。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the embodiments shown in the drawings. FIG. 1 is a cross-sectional view of an embodiment of a light emitting diode manufactured by using the method of forming electrodes of a semiconductor device according to the present invention. This example was manufactured as follows. That is, 1) n-
InP buffer layer 6, p-InGaAsP active layer 5, p
-InP clad layer 4, p-InGaAsP cap layer 3, and InP blocking layer 2 are sequentially stacked. 2) Next, a silicon-based insulating film 1 such as SiO 2 is formed. 3) Next, the insulating film 1 and the current blocking layer 2 are concentrically and circularly removed. Up to this point, the process is the same as the conventional technique. 4) Next, contact film 1 consisting of 1000Å Ti
1, 2000 Å Pt barrier film 12 is sequentially formed, then AuGeNi n electrode 8 is formed,
Heat treatment is performed. Finally, the Au plating layer 10 is formed,
A p-electrode is formed. The p-electrode thus formed is
Since the heat treatment is performed before forming the Au plating layer 10,
Even if the Au plating layer 10 contacts the current blocking layer 2,
It is possible to prevent Au from diffusing into the InP current blocking layer 2. It goes without saying that the present invention is not limited to light emitting diodes and can be applied to semiconductor elements having a current constriction structure.
【0007】[0007]
【発明の効果】以上説明したように本発明によれば、半
導体層上に電流狭窄窓を有する半導体からなる電流阻止
層および前記電流狭窄窓よりも窓面積の大きい電流狭窄
窓を有する絶縁膜が形成された半導体素子上に、コンタ
クト膜、バリア膜およびAu膜が積層された電極を形成
する半導体素子の電極形成方法において、コンタクト膜
とバリア膜を順次積層したのち、熱処理を施し、次いで
Au膜を積層するため、Auが半導体に拡散することが
なく、信頼性のある半導体発光素子を製造することがで
きるという優れた効果がある。As described above, according to the present invention, a current blocking layer made of a semiconductor having a current confinement window on a semiconductor layer and an insulating film having a current constriction window having a larger window area than the current confinement window are provided. In an electrode forming method of a semiconductor element, wherein an electrode having a contact film, a barrier film and an Au film laminated thereon is formed on the formed semiconductor element, a contact film and a barrier film are sequentially laminated, heat treatment is performed, and then an Au film is formed. Since Au is laminated, there is an excellent effect that a reliable semiconductor light emitting device can be manufactured without Au being diffused into the semiconductor.
【図1】本発明にかかる半導体素子の電極形成方法を用
いて製作した発光ダイオードの一実施例の断面図であ
る。FIG. 1 is a cross-sectional view of an embodiment of a light emitting diode manufactured by using a method of forming electrodes of a semiconductor device according to the present invention.
【図2】従来の発光ダイオード素子の断面図である。FIG. 2 is a cross-sectional view of a conventional light emitting diode device.
【図3】上記断面図の部分拡大図である。FIG. 3 is a partially enlarged view of the above sectional view.
1 絶縁膜 2 電流阻止層 3 キャップ層 4 クラッド層 5 活性層 6 バッファ層 7 基板 8 n電極 9 p電極 10 Auメッキ層 11 コンタクト膜 12 バリア膜 13 Au膜 14 段差部 1 Insulating Film 2 Current Blocking Layer 3 Cap Layer 4 Cladding Layer 5 Active Layer 6 Buffer Layer 7 Substrate 8 n Electrode 9 p Electrode 10 Au Plating Layer 11 Contact Film 12 Barrier Film 13 Au Film 14 Stepped Section
Claims (1)
からなる電流阻止層および前記電流狭窄窓よりも窓面積
の大きい電流狭窄窓を有する絶縁膜が形成された半導体
素子上に、コンタクト膜、バリア膜およびAu膜が積層
された電極を形成する半導体素子の電極形成方法におい
て、コンタクト膜とバリア膜を順次積層したのち、熱処
理を施し、次いでAu膜を積層することを特徴とする半
導体素子の電極形成方法。1. A contact film is formed on a semiconductor element having a current blocking layer made of a semiconductor having a current confinement window on a semiconductor layer and an insulating film having a current confinement window having a larger window area than the current confinement window. In a method of forming an electrode of a semiconductor element, which comprises forming an electrode in which a barrier film and an Au film are laminated, a contact film and a barrier film are sequentially laminated, heat treatment is performed, and then an Au film is laminated. Electrode forming method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28063992A JPH06112532A (en) | 1992-09-25 | 1992-09-25 | Method for forming electrode of semiconductor element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28063992A JPH06112532A (en) | 1992-09-25 | 1992-09-25 | Method for forming electrode of semiconductor element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH06112532A true JPH06112532A (en) | 1994-04-22 |
Family
ID=17627862
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP28063992A Pending JPH06112532A (en) | 1992-09-25 | 1992-09-25 | Method for forming electrode of semiconductor element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH06112532A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006324427A (en) * | 2005-05-18 | 2006-11-30 | Mitsubishi Electric Corp | Semiconductor laser |
US7786493B2 (en) | 2006-01-06 | 2010-08-31 | Sony Corporation | Light emitting diode, method for manufacturing light emitting diode, integrated light emitting diode, method for manufacturing integrated light emitting diode, light emitting diode backlight, light emitting diode illumination device, light emitting diode display, electronic apparatus, electronic device, and method for manufacturing electronic device |
JP2015029101A (en) * | 2013-07-30 | 2015-02-12 | 隆達電子股▲ふん▼有限公司 | Light emitting diode structure |
-
1992
- 1992-09-25 JP JP28063992A patent/JPH06112532A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006324427A (en) * | 2005-05-18 | 2006-11-30 | Mitsubishi Electric Corp | Semiconductor laser |
US7786493B2 (en) | 2006-01-06 | 2010-08-31 | Sony Corporation | Light emitting diode, method for manufacturing light emitting diode, integrated light emitting diode, method for manufacturing integrated light emitting diode, light emitting diode backlight, light emitting diode illumination device, light emitting diode display, electronic apparatus, electronic device, and method for manufacturing electronic device |
JP2015029101A (en) * | 2013-07-30 | 2015-02-12 | 隆達電子股▲ふん▼有限公司 | Light emitting diode structure |
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