JPH06112194A - Method for wiring repair semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To make it possible to process with due consideration given to an adjacent wiring without increasing repair spots by deviating an irradiation position of a radiation beam to a direction in which no adjacent wiring exists and repairing the wiring in a repair spot where there exists no other adjacent wiring on one side. CONSTITUTION:When cutting a wiring 401, a wiring section 402 is searched as a cutting spot where an adjacent wiring exists only on one side of a cutting position. The irradiation position 405 of FIB is displaced by a distance alpha in a direction in which no adjacent wiring 403 exists and it is irradiated. Assuming that the distance alpha is defined as a maximum value which can guarantee the cutting of the wiring 401 to be cut by 100%, it is possible to protect the adjacent wiring 403 on the FIB irradiation surface 406 from overcutting. This construction makes it possible to embody logic changes which were hitherto impossible to attempt since there no technique is available and enhance work yield.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention, after manufacturing a chip of a semiconductor integrated circuit, corrects part of the wiring using FIB (focused ion beam), laser CVD, etc. on the chip to change the logic. The present invention relates to a method for repairing a semiconductor integrated circuit, which is capable of repairing a semiconductor integrated circuit, which can prevent damage to existing wiring, improve the yield of processing by FIB, and widen the repairable range. .

[0002]

2. Description of the Related Art A technique for modifying a part of wiring on a chip to change the logic after manufacturing a chip of a semiconductor integrated circuit is disclosed in Japanese Patent Laid-Open No. 62-229956. -It is reported to be performed using the CVD or the like. That is, in a semiconductor integrated circuit, FIB (focused ion beam) and laser C are produced on the chip after the chip is manufactured.
Repairing is performed by modifying a part of the existing wiring by using VD (chemical vapor deposition) or by connecting an unused gate for logic change which is not related to the logic configuration to change the logic. .

Further, as to the technique for preventing the deterioration of the repaired portion due to the failure of the adjacent wiring, US Pat. No. 5,043,29
As described in No. 7 (Aug.27.1991), it is reported that the damaged adjacent wiring can cope with the failure of the adjacent wiring by performing new processing on the damaged adjacent wiring and repairing the logical connection due to the damage. Has been done.

[0004]

The above-mentioned first prior art describes only the basic technique of how to perform repair on the chip by using FIB, laser CVD, or the like. Stop at. At the time of repairing, due to the relationship between the wiring density of the semiconductor integrated circuit to be repaired and the processing accuracy of the repairing, it is possible that adjacent wirings existing around the repaired portion may be damaged. However, the above-described conventional technique is not practically preferable because it does not consider the wiring adjacent to the repaired portion and has a problem of reducing the processing yield during repairing.

The above-mentioned second conventional technique describes a technique for a repair processing method when there is an adjacent wiring at a repair location. However, this conventional technique is a technique for making the target logical change 100%, and no consideration is given to an increase in the number of processing points. For this reason, since processing is performed while avoiding adjacent wiring, there is a problem in that the number of processing locations increases, and as a result the processing yield decreases.

Therefore, in repairing a semiconductor integrated circuit,
A technology for improving the processing yield and a technology for expanding the processable range are required.

An object of the present invention is to provide a technique for improving the processing yield and further increasing the number of machinable points by enabling the machining taking into consideration the adjacent wiring without increasing the number of repairing points. Especially.

[0008]

According to an aspect of the present invention for achieving the above object, after a chip of a semiconductor integrated circuit provided with a wiring is manufactured, a radiation beam is irradiated onto the chip to form a wiring. In the case of repairing a part of the wiring, when the radiation beam is applied to a certain wiring to perform the repair, if the radiation beam is applied to the target portion of the wiring to be repaired, it may be damaged or damaged due to its processing accuracy. Within a certain range,
When there is an adjacent wiring, it is possible to guarantee the irradiation position of the radiation beam and the target wiring cutting to the side where the adjacent wiring does not exist, only when the adjacent wiring exists only on one side of the repaired wiring. Provided is a semiconductor integrated circuit wiring repairing method, characterized by irradiating a target portion by displacing it within a certain range and performing correction processing.

When the radiation beam is irradiated, the range in which the radiation beam may be damaged or may be damaged due to its processing accuracy may be a region covered by a spot formed at the irradiation position of the radiation beam.

As repair, for example, cutting of wiring,
This includes processing such as making a hole in a part of a substrate that constitutes a semiconductor integrated circuit.

When the radiation beam is irradiated, there is a hole formed by the irradiation of the radiation beam in a range where the radiation beam may be damaged or damaged due to its processing accuracy.
It can be a region of a hole in each of one or more layers of a semiconductor integrated circuit.

According to another aspect of the present invention, there is provided a chip provided with at least a wiring and a logic circuit, and the chip has one or two repair points repaired in a part of the wiring. The semiconductor integrated circuit having the above, wherein a part of the repaired portion is present at a position displaced to one side of the wiring with reference to a center of the repaired wiring in the width direction. A semiconductor integrated circuit is provided.

The repaired part may have a substantially circular area, and the center of the circle may be located at a position displaced from the center of the repaired wiring in the width direction. In addition, the repaired portion may have a hole having a substantially circular opening, and the center of the hole may be located at a position displaced from the center of the repaired wiring in the width direction.

Further, according to another aspect of the present invention, before the repair is performed by irradiating the radiation beam with a radiation beam, a radiation beam having such a strength that the irradiation target is not processed even if the irradiation target area is irradiated with the radiation beam is repaired. Illuminate, detect the reflection,
Detecting irregularities on the surface, recognizing the presence or absence of adjacent wiring to the repaired wiring based on the detection result, and
Recognized adjacent wiring left and right one side of the repaired wiring, upper and lower one side, and determine whether or not only in one of the combination of the one side, if the adjacent wiring exists in any aspect, There is provided a semiconductor integrated circuit wiring repair location detecting method, characterized by obtaining information for displacing a radiation beam irradiation position in a direction in which an adjacent wiring does not exist.

According to another aspect of the present invention, a logic design system including a computer system, a wiring processing system including one or more processing devices, and a computer for creating process data of the processing devices. And the logic design system creates wiring processing position information based on the logic change information and the wiring information.
When irradiating a certain wiring with a radiation beam and performing repair, if the radiation beam is applied to the target location of the wiring to be repaired,
Due to its processing accuracy, if there is an adjacent wiring within the range where it may be damaged or may be damaged, the irradiation position of the radiation beam may be changed only when the adjacent wiring exists on only one side of the repaired wiring. , Displace to the side where there is no adjacent wiring within the range that can guarantee the cutting of the intended wiring,
With the function of determining the destination, the wiring processing system
There is provided a repair system having a function of creating process data of a processing device based on created wiring processing position information.

[0016]

Since the wiring may have a position where no other adjacent wiring exists on at least one side thereof, the present invention detects this position and performs repair.
At this time, at the repaired portion, the irradiation position of the radiation beam is determined by shifting in the direction in which the adjacent wiring does not exist. As a result, only the intended wiring can be processed without damaging the adjacent wiring which was originally damaged.

In determining the processing position, the data file of the wiring route information is compared with the library in which the adjacent rule is stored to determine the direction and distance for shifting the irradiation position of the FIB, and the data of the wiring route information. -It can be set on the file. On the processing device side such as the FIB device, the processing can be performed without paying attention to the adjacent wiring.

[0018]

Embodiments of the present invention will now be described in detail with reference to the drawings.

In the semiconductor integrated circuit, after the chip is manufactured, a part of the existing wiring is modified or processed by using FIB (focused ion beam), laser CVD (chemical vapor deposition) or the like on the chip. Repair is carried out by connecting unused gates for logic change which are not related to the configuration to change the logic. here,
In repairing a semiconductor integrated circuit, a technique for improving the processing yield and a technique for expanding the processable range are required. Therefore, first of all, regarding damage to adjacent wiring at the time of repair,
As a measure against this, an example of the repair method of the present invention will be described.

FIG. 1 shows an example of wiring disconnection of a semiconductor integrated circuit by FIB. FIG. 1 shows a wiring processing diagram from above the chip when the wiring is cut. For example, the wiring 10
When the point 102 of 1 is cut by the FIB, the wiring on the irradiation surface (spot) 103 is erased by the irradiation of the FIB, and the wiring 101 is cut.

However, as shown in FIG. 2, the wiring 203 adjacent to the cutting target point 202 of the wiring 201 at the wiring interval W.
May exist. In this case, if the distance W from the adjacent wiring 203 is smaller than the radius R of the FIB irradiation surface 103, some or all of the adjacent wiring 203 will be erased, resulting in an excessive cutting point 206. Become. Therefore, the wiring cannot be cut in such a place.

Further, as shown in FIG. 3, for example, even if the distance W from the adjacent wiring is slightly larger than the radius R of the FIB irradiation surface 301, the planned FIB irradiation surface 301 may be slightly deviated from the FIB irradiation position. The FIB irradiation surface 302 is deviated to, or, like the FIB irradiation surface 303, the radius widens due to the FIB aperture error, and the FIB is formed on a part of the adjacent wiring
The irradiation surface touches and damages the adjacent wiring like the damaged portion 304, which causes a reduction in processing yield.

This embodiment solves these problems, and as shown in FIG. 4, the wiring 40 for the purpose of cutting is used.
For 1, the wiring section 402 in which the adjacent wiring exists only on one side of the cutting point is searched for as the cutting point. If the cutting as described above is performed in this section 402 as it is, the adjacent wiring 403 is excessively cut in the same manner as above.

Therefore, in this embodiment, the irradiation position (irradiation center) 405 of the FIB is displaced by a distance α in the direction in which the adjacent wiring 403 does not exist, and irradiation is performed. The distance α is a maximum value that can guarantee 100% of the target disconnection of the wiring 401. When the FIB is irradiated at this irradiation position, the FIB irradiation surface 406 becomes as shown in FIG.
The situation of excessive disconnection will not occur.

By cutting in this way, it is possible to cut a wiring section which was conventionally uncut. As an effect of this, it is possible to change the logic, which has conventionally been abandoned to change the logic by the FIB without the disconnectable wiring section.

The method of this embodiment is also applied to a portion where a fine processing precision is required as shown in FIG.
By irradiating the B irradiation position with the distance α shifted in the direction in which the adjacent wiring does not exist, the possibility of damaging the adjacent wiring is greatly reduced. That is, there is an effect of improving the processing yield.

The above-mentioned embodiment describes only the consideration of the two-dimensional plane for the wiring to be cut. But,
In an actual LSI, the wiring layer is a multi-layered wiring, and repair may be necessary not only for the layer located on the surface but also for the inner layer. For example, an LSI consisting of three layers of wiring
The wiring located on the second layer may be cut. In such a case, since the FIB irradiates from above the chip, the second
The wiring of the third layer above the layer becomes an obstacle. For this reason,
Actually, the second layer is cut at a place where there is no third-layer wiring that does not become an obstacle.

FIG. 5 shows a cross-sectional view of the wiring cut portion of the second layer wiring by FIB. Wiring location 50 of the second layer wiring 504
1 is cut, in the example of FIG.
Layer 502 contacts holes 503 that are drilled as FIB trajectories. As a result, the wiring 502 is damaged or broken. Therefore, according to the conventional technique, it is impossible to cut the wiring in such a place.

Here, only when the wiring 502 adjacent to the hole 503 formed as the FIB trajectory exists on only one side, as shown in FIG. 6, the irradiation position of the FIB is set in the direction in which the adjacent wiring does not exist ( Irradiation positions 602 to 601)
Irradiate after displacing by a distance β. The concept of the distance β is the same as the distance α.

By cutting in this way, it becomes possible to cut a place that could not be cut conventionally. As this effect,
Conventionally, there is no disconnectable portion and the logic change by the FIB is abandoned, but there is an effect that the logic change is possible. Further, by applying the present embodiment to a portion where a delicate processing precision is required as shown in FIG. 3, the FIB irradiation position is displaced by the distance β in the direction in which the adjacent wiring does not exist, and thus the irradiation is performed.
The possibility of damaging adjacent wiring is greatly reduced. That is, there is an effect of improving the processing yield.

Regarding the actual wiring cutting, the above-mentioned FIG.
And by using the methods shown in FIG. 6 in combination,
The number of repairable areas can be increased. This makes it possible to improve the processing yield.

In the above embodiment, the example of cutting the wiring is shown, but the present invention can be applied to the case of making a hole for connecting the wiring. Holes for wiring connections,
This corresponds to the hole for cutting shown in 6 above. Since the hole for cutting the wiring and the hole for connecting have different uses, the diameter of the hole may be different. Therefore, the range of the range in which the existence of the adjacent wiring should be recognized may be different. FI
The same applies to the distance for displacing the B irradiation position in the direction in which the adjacent wiring does not exist.

FIG. 7 shows an example of excessive cutting of adjacent wiring when a connection hole is opened. That is, a state is shown in which the connection hole 701 provided in the beam trajectory makes contact with and damages the intended third layer wiring 703 in the upper layer of the second layer wiring 702. FIG. 8 shows an embodiment in which a target second layer wiring 702 is drilled in consideration of the adjacent wiring when the connection hole 801 is drilled. That is, only when the wiring 703 adjacent to the connection hole 801 formed as the trajectory of the FIB exists on only one side, the irradiation position of the FIB is separated by a distance γ in the direction in which the adjacent wiring does not exist (irradiation positions 804 to 805). Irradiate after displacing by a minute. The concept of the distance γ is the distance β
Is the same as.

In each of the above-mentioned embodiments, the FIB is used as the radiation beam for repairing.
The same technique can be applied when means other than B, for example, a laser is used.

Next, an embodiment of the repair system used for realizing the present invention will be described.

As shown in FIG. 13, the system of this embodiment has a design system 1310 for performing logic design and creation of wiring processing position information, and a wiring processing system 1320 for performing wiring and repair.

The design system 1310 includes a host computer 1311, an input device 1316 and an output device 131.
7 and a communication device (not shown). The host computer 1311 has a central processing unit and a storage device (neither is shown) inside. The central processing unit executes the program stored in the storage device, and as a part of its internal functions, for example, creates logical change information, wiring processing position information creation, logical consistency check, electrical characteristic check, and processing. Realize the difficulty check.

The storage device stores various programs executed by the central processing unit, data and the like. The program includes, for example, a program for determining a wiring processing position, which is executed in the procedure described below. Further, as data, logic information created by logic design, wiring information 1315 created by wiring design (see FIG. 9), logic change information data 1312 obtained by logic change processing, and repairs accompanying logic change are performed. The wiring processing position information 1313 created for this purpose is stored as a file. The storage device also stores a rule library 1314 (see FIG. 9) that defines various rules used when creating wiring processing positions. Logical change information 13
12 can also be imported from an external logic design system, for example, via a communication device.

By the way, when the processing is performed by the processing device, there are restrictions such as the processing conditions depending on the performance of the device. Therefore, the rule library 1314 contains
These constraints and the like are defined as rules and stored in a file. As a rule, for example, in a 5-layer wiring LSI, the wiring of the first and second layers cannot be processed. No other cutting holes can be present around the cutting hole X micron. , There are rules that cannot be processed, and there are hundreds to thousands or more of rules. These rules may differ depending on the LSI series to be processed. When the wiring position information is created, it is checked against these rules to verify and guarantee the data. In order to automatically process this collation, rules are stored as a library, for example, the host computer 1311.
Keep it on top.

The wiring processing system 1320 takes in the wiring processing position information from the design system 1310 via a communication device or the like, and creates a computer (minicomputer) 1321 for creating process data for repair, and creates this process data. At this time, it has a database 1322 that refers to various processing conditions, a FIB (focused ion beam) processing apparatus 1323, and a laser CVD apparatus 1324.
The database 1322 includes a focused ion beam scanning method,
The laser beam irradiation intensity / time, processing process know-how, etc. are stored.

This repair system is based on the design system 131.
In the case where the logic change of the LSI designed on 0 is carried out by the focused ion beam, the laser CVD apparatus, etc., the change of the design information (logic information, wiring information etc.) is carried out by the host computer 13.
Run on 11. For example, here, it is determined whether or not the logic to be changed can be actually processed on the wiring based on the design information, the processing difficulty level check, and it is determined whether or not the changed logic information protects the electrical characteristics. Electrical characteristic check,
The wiring processing position information is created, and the logical matching between the processing position information and the changed logic information is checked.

Here, the data of the created wiring processing position information is used for the computer 13 of the wiring processing system 1320.
21. The wiring processing system 1320 converts this wiring processing position information into control data, and
It is sent to the B processing apparatus 1323 and the laser CVD apparatus 1324. The FIB processing device 1323 cuts wiring, makes holes, and the like. Further, the CVD apparatus 1324 forms a wiring conductor and the like to connect the wiring. Regarding the FIB processing apparatus and the CVD apparatus, see, for example, Japanese Patent Laid-Open No. 62-
It is disclosed in Japanese Patent No. 229956.

In the present embodiment, the wiring system position information is created in the design system, but this data is stored in the computer 132 of the wiring system 1320.
It may be configured to be executed by 1. Next, an example of a method of determining the irradiation position of radiation when implementing the repair method of the present invention will be described.

The repair method of the present invention is a technique for automatically changing the process data for controlling the processing device used for repair. An outline of the procedure for determining the irradiation position is shown in FIG. 9 as a flow chart.

First, the host computer 1311 uses the library 1314 storing adjacent rules and the like to determine the distance from the wire to be treated as the adjacent wiring at the time of cutting, the distance for shifting the FIB irradiation position, and the wiring to be treated as the adjacent wiring of the connection hole. Up to, the distance by which the FIB irradiation position is shifted, and the like are taken in as processing rules (steps 901 and 902). next,
The wiring information (XY coordinates of the wiring path, wiring layer name) indicating the LSI wiring path is stored in the LSI wiring path information file 131.
5 (step 903).

With respect to the input wiring information, it is checked according to a processing rule whether or not there is a repairable portion such as disconnection or connection at an arbitrary point of the wiring. At this time, as one condition of the processing rule, when the adjacent wiring exists on only one side, the condition of the adjacent wiring is relaxed as described above. In this way, the repairable portion is detected for the wiring whose logic has been changed (step 904). The detection result is displayed on the display of the output device 1317 (step 905). As for the repairable parts, all possible parts are displayed. Therefore, the repair / mounting designer, from the displayed repairable location,
It is possible to select repair points (disconnection points, connection points) necessary to realize the logic change.

The host computer 1311 accepts the selection instruction from the repair / mounting designer through the input device 1316 (step 906) and registers the selected repair location as wiring processing position information data (step 907). This process may be performed by automatic selection. That is, by prioritizing priorities when determining repair points, one location can be automatically selected from a plurality of locations.

Next, with respect to the locations of the registered disconnection and connection holes, the conditions of the adjacent wiring are checked with reference to the rule library 1314. When the adjacent wiring that is damaged or the adjacent wiring that may be damaged is present on only one side, processing for shifting the processing position in the direction in which the adjacent wiring is not present is performed (step 9).
08,909). If there is no adjacent wiring on both sides of the wiring to be processed, they are left at their positions.

FIG. 1 shows an example of a method for investigating adjacent wiring.
This will be described with reference to 0. FIG. 10 shows the wiring regions of the first layer 1013, the second layer 1012, and the third layer 1011.

For example, assume that there is a three-layer wiring LSI in which the distance to the wiring to be treated as an adjacent wiring is 2 microns and the wiring pitch P is 1 micron. Wirings 1011 of the first and third layers
It is assumed that 1013 has a wiring pitch in the X direction and the second layer wiring 1012 has a wiring pitch in the Y direction. When cutting the wiring 1001 of the second layer with respect to this LSI, a processing region 1003 (a circular region having a distance of 2 μm to the wiring to be treated as an adjacent wiring) centering on the cutting portion 1002 is formed on the plane of the second layer. To generate. If no other wiring exists in this area 1003,
It can be determined that there is no adjacent wiring. Regarding the layers, two or more layers may be targeted. However, if it is necessary to consider one layer below the layer to be cut due to the accuracy of the repair device, it is sufficient to search for one or more layers below the layer to be cut. An example of excessive cutting of the lower layer is shown in FIG. 1101 becomes the first layer wiring which is damaged.

As a result of the search, the position may be changed only when the wiring exists on only one side in each direction. For example, if the position is registered in XY coordinates, the coordinates may be converted. If it cannot be expressed in coordinates, it can be expressed in many ways depending on how the data is handled, such as adding the data indicating the direction of displacement and the distance.

By the above processing, on the processing control data,
Wiring repair can be realized. By considering the adjacent wiring on the processing control data, it is possible to realize each of the above-mentioned repairs by the conventional device without providing a new function on the repair device side.

By defining the wiring rule, the handling of the adjacent wiring, the FIB movement distance and the like as a library and comparing the actual wiring route with the wiring information defined by the XY coordinates and the layer name, the repair device is determined. At the stage of controlling data, there is an effect that the above-mentioned wiring cutting, drilling and the like can be performed. further,
This has the effect that it is not necessary to equip the repair device with special optional functions.

Next, another embodiment of the present invention will be described.
In this embodiment, before the repair is performed by irradiating the radiation beam, the vicinity of the irradiation planned position is irradiated with a radiation beam having a strength such that the irradiation target does not process the irradiation target, and the reflection is detected. Then, the unevenness of the surface is detected, and based on the detection result, the presence or absence of the adjacent wiring to the repaired wiring is recognized, and the recognized adjacent wiring is one side on the left and right of the repaired wiring, one side above and below, and ,, to determine whether or not there is only one of the combination of the one side, if the adjacent wiring exists in any of the modes, to shift the irradiation position of the radiation beam in the direction where the adjacent wiring does not exist To get information.

As shown in FIG. 12, for example, when cutting the wiring portion 1201 on the processing device side, before cutting, the range treated as an adjacent wiring of the cutting portion is irradiated with light, electrons, ions or the like. The target image is created from the reflection, and the wiring step is detected by irradiating a laser, electrons, ions or the like. The presence or absence of the adjacent wiring is recognized by the recognition of the image and the wiring step difference, and only when the adjacent wiring is present on only one side, the FIB irradiation position may be shifted to the non-existing side. The technique of searching the semiconductor surface by the image signal can be performed by the technique described in Japanese Patent Application Laid-Open No. 01-23555.

According to this embodiment, since the adjacent wiring is recognized according to the actual product, the difference between the data and the actual product due to the post-manufacturing difference can be surely recognized, and the yield reduction can be prevented. . The working accuracy can be further improved by applying the present embodiment to the above-described embodiment in which the repaired portion is designated by the information of the wiring working position.

As described above, according to each of the embodiments of the present invention, the number of repairable portions is increased, which makes it possible to improve the degree of freedom of logic change, and further, the processing yield at the time of processing such as cutting and connecting. Can be improved.

[0058]

According to the present invention, by displacing the irradiation position of the FIB in the direction in which the adjacent wiring does not exist within the range in which the processing of the intended wiring is not affected, the processing of the wiring can be performed without damaging the adjacent wiring. It can be possible. As a result, it becomes possible to repair the wiring that could not be processed by the conventional technique, and there is an effect that a logical change that could not be realized due to the inability to process can be realized. Furthermore, even in the case where the wiring can be conventionally processed, the wiring interval is narrow, and the processing yield is reduced due to the processing accuracy, by applying the present invention, the damage rate of the adjacent wiring is reduced. It has an effect of improving the processing yield.

[Brief description of drawings]

FIG. 1 is a plan view showing an example of cutting a wiring of a semiconductor integrated circuit.

FIG. 2 is a plan view showing an example of a wiring disconnection defect of a semiconductor integrated circuit.

FIG. 3 is a plan view showing an example of a wiring disconnection defect of a semiconductor integrated circuit.

FIG. 4 is a plan view showing an example of searching for a place where wiring can be cut in a semiconductor integrated circuit.

FIG. 5 is a cross-sectional view showing an example of a wiring disconnection defect of a semiconductor integrated circuit.

FIG. 6 is a cross-sectional view showing an example of wiring cutting of a semiconductor integrated circuit.

FIG. 7 is a cross-sectional view showing an example of defective wiring connection of a semiconductor integrated circuit.

FIG. 8 is a cross-sectional view showing an example of wiring connection of a semiconductor integrated circuit.

FIG. 9 is a flow chart showing a procedure of recognizing adjacent wires, searching, and changing processing data.

FIG. 10 is an explanatory diagram showing a method of recognizing adjacent wiring.

FIG. 11 is a cross-sectional view showing an example of a wiring disconnection defect of a semiconductor integrated circuit.

FIG. 12 is an explanatory diagram showing another example of adjacent wiring recognition by the repair device.

FIG. 13 is a block diagram showing a system configuration of a repair system.

[Explanation of symbols]

101, 201, 401 ... Wiring 102, 501, 1002, 1104, 1201 ... Cutting point 103, 406 ... FIB irradiation surface 202 ... Cutting target point 203, 403, 404 ... Adjacent wiring 206 ... Excessive cutting point 301 ... Planned FIB irradiation Surface 602, 804 ... Planned FIB irradiation position 302, 406 ... Deviated FIB irradiation surface 303 ... Expanded FIB irradiation surface 304 ... Damaged adjacent wiring 401, 1001 ... Cutting wire 402 ... Section where adjacent wiring is on one side 502, 703 , 1011, 1103, 1203 ... third
Layer wiring 503, 605, 701, 801, 1105 ... Beam orbit of FIB 504, 1012, 1102, 1202 ... Second layer wiring 702, 802 ... Connecting two layer wiring 1003 ... 2 micron circular area 1013, 1101 ... First layer wiring 1204 ... Laser 1205 ... Chip surface 1206 ... Insulating layer

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Toshio Yamada 2326 Imai, Ome-shi, Tokyo Inside the Device Development Center, Hitachi, Ltd. (72) Tomio Taniguchi 6-81 Onoe-machi, Naka-ku, Yokohama, Kanagawa Prefecture Hitachi Software Engineering Stock Association In-house (72) Inventor Kenki Ishii 1 Horiyamashita, Hadano City, Kanagawa Prefecture Hitate Manufacturing Co., Ltd. Kanagawa Plant

Claims (11)

[Claims] 1. When manufacturing a semiconductor integrated circuit chip provided with wiring and then irradiating the chip with a radiation beam to repair a part of the wiring, the wiring is irradiated with the radiation beam for repair. When applying the radiation beam to the target location of the repaired wiring,
Due to its processing accuracy, if there is an adjacent wiring within the range where it may be damaged or may be damaged, the irradiation position of the radiation beam may be changed only when the adjacent wiring exists on only one side of the repaired wiring. , Displace to the side where there is no adjacent wiring within the range that can guarantee the cutting of the intended wiring,
A semiconductor integrated circuit wiring repairing method, which comprises irradiating a target portion and performing correction processing. 2. The irradiation range of the radiation beam according to claim 1, wherein the radiation beam is damaged or may be damaged due to its processing accuracy, which is a region covered by a spot formed at the irradiation position of the radiation beam. Semiconductor integrated circuit wiring repair method. 3. The semiconductor integrated circuit wiring repair method according to claim 1, wherein the repair includes cutting of wiring. 4. The repair according to claim 1, wherein the repair includes a process of making a hole in a part of a substrate which constitutes a semiconductor integrated circuit, and when the radiation beam is irradiated, it is damaged or damaged due to its processing accuracy. The possible range is a semiconductor integrated circuit wiring repairing method, which is a region of a hole in one or more layers of a semiconductor integrated circuit in which a hole formed by irradiation of the radiation beam exists. 5. The semiconductor integrated circuit wiring repair method according to claim 1, wherein the radiation beam is FIB (focused ion beam). 6. The method according to claim 1, 2, 3, 4 or 5.
Before irradiating with a radiation beam for repair, irradiate a radiation beam with a strength that does not cause the irradiation target to be processed in the vicinity of the planned irradiation position, detect the reflection, and detect the reflection of the surface. Detecting unevenness and recognizing the presence or absence of adjacent wiring to the repaired wiring based on the detection result, and the recognized adjacent wiring is one side on the left and right sides of the repaired wiring, one side above and below, and a combination of the one side. It is possible to obtain information for displacing the irradiation position of the radiation beam in the direction in which the adjacent wiring does not exist, when the adjacent wiring exists in any of the modes. A semiconductor integrated circuit wiring repairing method characterized by the above. 7. A semiconductor integrated circuit comprising a chip provided with at least wiring and a logic circuit, and the chip having one or more repaired parts repaired in a part of the wiring. The semiconductor integrated circuit is characterized in that some of the repaired portions are present at positions displaced to one side of the wiring with reference to the center of the repaired wiring in the width direction. 8. The semiconductor integrated circuit according to claim 7, wherein the repaired part has a substantially circular area, and the center of the circle is located at a position displaced from the center of the repaired wiring in the width direction. 9. The semiconductor integrated device according to claim 7, wherein the repaired portion has a hole having a substantially circular opening, and the center of the hole is displaced from the center of the repaired wiring in the width direction. circuit. 10. Before irradiating and repairing with a radiation beam, a radiation beam having a strength such that an irradiation target is not processed is irradiated in the vicinity of a planned irradiation position and its reflection is detected. Detecting unevenness on the surface and recognizing the presence or absence of an adjacent wiring with respect to the repaired wiring based on the detection result, and the recognized adjacent wiring is one side on the left and right sides of the repaired wiring, one side above and below, and, It is determined whether or not it exists in only one of the combinations on one side, and when the adjacent wiring exists in any aspect, information for displacing the irradiation position of the radiation beam in the direction in which the adjacent wiring does not exist. A method for detecting a repaired portion of a wiring of a semiconductor integrated circuit, comprising: 11. A logical design system including a computer system, a wiring processing system including one or more processing devices, and a computer for creating process data of the processing devices, wherein the logical design system includes logical change. Based on the information and the wiring information, wiring processing position information is created.When a certain wiring is irradiated with a radiation beam and repaired, when the target radiation of the repaired wiring is irradiated with the radiation beam, Due to processing accuracy, if there is an adjacent wiring within the range that may or may be damaged, the radiation beam will be emitted only when the adjacent wiring exists on only one side of the repaired wiring.
The irradiation position has the function of deciding the target location by displacing the irradiation position to the side where there is no adjacent wiring within the range that can guarantee the cutting of the target wiring. A repair system having a function of creating process data of a processing device based on information.