JPH0594975A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable a contact hole to be lessened in aspect ratio and processed with stable etching rate and excellent controllability by a method wherein a photoresist film to he anisotropically etched is made small in thickness. CONSTITUTION:A first resist film 6, an SOG film 7, and a second resist film 8 are successively deposited on an interlayer insulating film 3 which is to be etched, and an opening prescribed in shape is provided to the SOG film 7. Then, the first resist film 6 is isotropically etched through an O2 plasma etching method using the SOG film 7 as a mask and then anisotropically etched by a reactive ion etching method. Thereafter, the interlayer insulating film 3 is anisotropically etched using the first resist film 6. By this setup, a contact hole can be lessened in aspect ratio as compared with a case where a conventional technique is used and processed with stable etching rate and excellent controllability.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing technique, and more particularly to an insulating film etching technique such as contact hole formation.

[0002]

2. Description of the Related Art FIG. 2 shows a step of forming a contact hole in an interlayer insulating film having an uneven surface according to the prior art. In FIG. 2, 1 is a silicon substrate, 2 is a gate electrode, 3 is an interlayer insulating film, 4 is a photoresist, and 5 is a contact hole portion. As the interlayer insulating film 3, for example, BP
An SG film is used.

Next, the contact hole forming step will be described.

First, a photoresist 4 is applied on an interlayer insulating film 3 having a surface irregularity by a gate electrode 2 formed on a silicon substrate 1 and a predetermined portion is irradiated with ultraviolet rays (FIG. 2 (a)). . Next, the photoresist 4 in the portion irradiated with ultraviolet rays is removed using an alkaline developing solution (FIG. 2 (b)). Next, the interlayer insulating film 3 is anisotropically etched by the reactive ion etching (RIE) method using the photoresist formed in the above process as a mask to form the contact hole portion 5 (FIG. 2C). .

[0005]

The photoresist used as the photomask formed in the above etching process is applied evenly regardless of the unevenness of the underlying interlayer insulating film 3 (FIG. 2A). Therefore, for example, when the contact hole portion 5 is to be opened, the photoresist 4
Of the gate electrode 2 becomes thicker by the step difference of the gate electrode 2.

In recent devices, the contact hole diameter has become finer with higher integration, and conversely, the unevenness on the surface of the interlayer insulating film 3 due to the increase in the step difference of the underlying layer has become large.
The aspect ratio ((thickness of resist 4 in contact hole portion 5 + thickness of interlayer insulating film 3) / (contact hole diameter)) tends to increase. When the contact hole portion 5 having the aspect ratio of about 2 or more is formed by using RIE, it becomes difficult for radicals, which are reactive ions, to enter into the contact hole portion 5, so that the etching rate is lowered, and thus the etching rate. There was a problem that the situation where the progress was stopped occurs.

It is an object of the present invention to provide an etching technique using a resist mask which makes the aspect ratio smaller.

[0008]

A method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device, which comprises a step of processing a film to be etched having surface irregularities by dry etching. After applying the resist, a step of forming a mask having a predetermined shape on the photoresist, a step of performing isotropic etching of the resist in an amount such that at least the surface of the film to be etched is not exposed, and after the step, the predetermined A step of anisotropically etching the resist until the surface of the film-to-be-etched is exposed using a mask having the shape of FIG. 5; and a step of processing the film-to-be-etched by dry etching using the photoresist mask formed in the above step It is characterized by having.

[0009]

By using the above-described present invention, the thickness of the photoresist on which anisotropic etching is performed becomes thin,
The aspect ratio becomes smaller than in the conventional process.

[0010]

The present invention will be described in detail below based on an example.

FIG. 1 shows a manufacturing process of an embodiment of the present invention. In FIG. 1, 1 is a silicon substrate, 2 is a gate electrode, 3 is an interlayer insulating film, 5 is a contact hole portion, 6 is a first photoresist, 7 is an SOG film, and 8 is a second photoresist. In addition to the SOG film 7, a TiO film, plasma Si
Any method such as an N film that can be deposited on a photoresist at a low temperature can be used.

Next, the manufacturing process of one embodiment of the present invention will be described.

A gate electrode 2 is provided on a silicon substrate 1,
After forming the interlayer insulating film 3, the first resist 6, the SOG film 7 and the second resist 8 are sequentially formed (FIG. 1A).
Next, ultraviolet light exposure is performed to form the second resist 8 in a desired shape with an appropriate alkaline developing solution, and then the second resist 8 is formed.
The SOG film 7 is opened by reactive ion etching (RIE) using the resist as a mask (FIG. 1B). Next, using the SOG film 7 as a mask, the first resist film 6 is isotropically etched by O ₂ plasma etching (FIG. 1C). O ₂ plasma etching is performed by flowing O ₂ at a flow rate of 30 sccm, a pressure of 100 mTorr, and an electric power of 50.
It is performed under the condition of 0 W and the maximum film thickness of the first resist 6 is 20
Etching% -80%. Usually, the film thickness of the first resist 6 is about 2 μm.

At this time, the second resist 8 is also removed at the same time. Next, using the SOG film 7 as a mask, the first
The rest of the resist 6 is anisotropically etched by RIE (FIG. 1D), and then the interlayer insulating film 3 is anisotropically etched by RIE using CHF ₃ gas with the first resist 6 as a mask. , The contact hole portion 5 is formed (FIG. 1E).

[0015]

As described in detail above, by using the present invention, when a resist mask having a three-layer structure is used as an etching mask, anisotropic etching is performed after isotropic etching. As a result, the depth of the portion where anisotropic etching is performed can be made shallower, so that it is possible to provide a processing method in which the aspect ratio is reduced and the etching rate is stable and excellent in controllability.

[Brief description of drawings]

FIG. 1 is a manufacturing process diagram of an example of the present invention.

FIG. 2 is a process drawing of forming a contact hole portion according to a conventional technique.

[Explanation of symbols]

 1 Silicon Substrate 2 Gate Electrode 3 Interlayer Insulation Film 6 First Resist 7 SOG Film 8 Second Resist

Claims (1)

[Claims] 1. A method of manufacturing a semiconductor device, comprising a step of processing an etching target film having surface irregularities by dry etching, wherein after applying a photoresist on the etching target film,
Forming a mask having a predetermined shape on the photoresist, performing isotropic etching of the photoresist in an amount such that at least the surface of the film to be etched is not exposed, and after the step, forming the mask having the predetermined shape Using a step of anisotropically etching the photoresist until the surface of the etching target film is exposed, and a step of processing the etching target film by dry etching using the photoresist mask formed by the above steps. A method of manufacturing a semiconductor device, comprising: