JPH0592615A - Print head - Google Patents

Abstract

PURPOSE:To improve printing quality by providing a drive current controlling circuit with which the drive current to a drive element is varied in accordance with each of light-emitting element arrays so that the unevenness in luminous energy among respective light-emitting element arrays can be corrected. CONSTITUTION:A drive current controlling circuit 21, equipped with a luminous body, one drive element 4 that drives a number of light-emitting elements L1-L2560 of the luminous body in time-sharing, and a drive control circuit 5 that controls driving of these elements, is provided so that the drive current to the drive element 4 is varied to each of light-emitting element arrays LA1-LA40 in order to correct the unevenness in luminous energy among respective light-emitting element arrays LA1-LA40. The drive current controlling circuit 21 is composed of an array counter 25 of a common selection circuit 24, a memory means 27 that stores reference voltage set for each of the light- emitting element arrays LA1-LA40, and a voltage control means 28 that varies the drive current to the drive element 4 in accordance with the results of judgement by the array counter 25 and the signals of reference voltage from the memory means 27.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a print head in which a plurality of light emitting element arrays are arranged in a row, and more particularly to a print head for controlling the light quantity of each of the plurality of light emitting element arrays.

[0002]

[Prior Art]

(1) An LED printer is known as a device that records an image by an electrophotographic method using a light emitting element array (LED array) in which a large number of light emitting elements, for example, LEDs (light emitting diodes) are arranged at high density. Has been.

Such a printer device selectively emits light from the light emitting elements arranged in rows based on the print data.
This is a device that creates an image on paper by an electrophotographic process by writing light on the photoconductor line by line.

However, there are variations in the light emission output of the light emitting element array used in the above apparatus, and if printing is performed in this state, the print density becomes non-uniform and the print quality is degraded.

By the way, the permissible value of the variation of the head with respect to the printing quality depends on the printing pattern, and is within ± 30% for characters, within ± 20% for figures, and when gradations such as photographs and graphics are required. ± 5%
Is considered within. However, the variation of the light emission output of the light emitting element array can be within ± 15% within one light emitting element array chip, but the variation between the light emitting element array chips can be kept within ± 30%. Have difficulty.

Therefore, usually, the light emission output of the light emitting element array is ranked by, for example, every 5%, and the light emitting element array of the same rank is used to form the light emitting body of the print head. The amount of light is corrected using the above circuit (Prior Art 1).

FIG. 8 is a basic functional block diagram of a conventional print head.

In FIG. 8, reference numeral 1 denotes a print head, which is a self-focusing rod lens array 2, a light-emitting body 3 in which a plurality of light-emitting element arrays are arranged in a row, and light emission. A drive element 4 (driver IC) for driving the light emitting element array of the body 3 and a drive control circuit 5 for controlling the drive element 4 and the common electrode of the light emitting element array are mounted on a substrate. ..

The drive element 4 comprises a shift register 6, a latch circuit 7, a gate circuit 6, a constant current control circuit 9 and a drive circuit 10.

FIG. 9 shows an example of the internal circuit configuration of the driving element 4. The drive circuit 10 is composed of 64 transistors of the source output type, and the constant current control circuit 9 is composed of resistances of the current limiting resistances R1 to R64. Further, the gate circuit 6 is composed of 64 AND circuits for switching with the strobe signal from the drive control circuit 5, and the latch circuit 7 and the shift register 6 have a 64-bit configuration.

FIG. 10 shows 256 A4 size, 300 dots / inch (dpi) using the driving element 4 shown in FIG.
FIG. 7 is a circuit diagram of a printhead using zero light emitting elements. As shown in FIG. 10, the light amount variations of the light emitting elements L1 to L2560 are corrected by adjusting the current in the variable resistance array 11. The resistance value of the resistor array 11 is adjusted by laser trimming.

However, in the case of an A4 size, 300 dpi print head, 2560 trimming resistors are required, and the time required for trimming this is enormous and it is also disadvantageous in terms of cost.

(2) Then, a method of using the drive element 4 having an improved constant current control function and selecting and using the light emitting element array has been devised (prior art 2).

FIG. 11 shows an example of the basic circuit configuration of the driving element 4. As shown in FIG. 11, the drive element 4 includes a shift register 6, a latch circuit 7, a gate circuit 8, a constant current control circuit 9, and a drive circuit 10.

The drive circuit 10 is composed of 64 transistors of the source output type, and the constant current control circuit 9 is
The output current is determined by the V _REF voltage, and the transistors Tr1 to Tr64 of the drive circuit 10 constitute a current mirror circuit. The gate circuit 8 is composed of 64 AND circuits for switching with the strobe signal from the drive control circuit 5, and the latch circuit 7 and the shift register 6 have a 64-bit structure.

FIG. 12 is a circuit diagram of an A4 size, 300 dots / inch (dpi) printed head using the driving element 4 shown in FIG. Light emitter 3 used here
6 ranked the light output every 5%, for example.
Among the 4-bit light emitting element arrays, products of the same rank LA1 to L
A40 is selected and used, which gives a total of 2560
It is composed of individual light emitting elements L1 to L2560.

The current for driving the light emitting elements L1 to L2560, that is, the output current of the driving element 4 is the bleeder resistance R.
It is determined by applying the V _REF voltage in the voltage generation circuit 20 composed of _B1 and R _B2 .

[0018]

In the above-mentioned conventional technique 2,
Although the light amount variations of the light emitting element arrays LA1 to LA40 themselves under a constant current can be suppressed to some extent,
It is not possible to eliminate variations in the amount of light caused by variations in the current of the drive element 4 and variations in the drive capability of the drive control circuit 5 with respect to the common electrodes of the light emitting element arrays LA1 to LA40. In addition, the light emitting element arrays LA1 to LA1
The light emitting element arrays LA1 to LA4 to be used depend on the production quantity of each rank of the LA40 and the production quantity of the print head.
Since it is necessary to select 0, mass productivity is not good.

The present invention has been made in view of the above problems, and an object thereof is to provide a dynamic drive type print head capable of correcting the variation in the light amount of each light emitting element array.

[0020]

As shown in FIGS. 1 to 4, a means for solving the problems according to claim 1 of the present invention includes a plurality of light emitting element arrays LA1 to LA40, each of which is composed of a plurality of light emitting elements L1 to L2560 corresponding to a printing dot. , Each light emitting element array LA
1 to LA40 and a driving element 4 for driving the light emitting elements L1 to L2560 in a time division manner,
A drive current control circuit 21 that changes the drive current of the drive element 4 according to each light emitting element array LA1 to LA40 is provided so as to correct the variation in the light amount of each light emitting element array LA1 to LA40. , The light emitting element arrays LA1 to LA1 based on the clock signal from the outside
The determination means 25 for determining whether to drive the LA 40, the storage means 27 for storing the reference voltage value set for each of the light emitting element arrays LA1 to LA40, the determination result from the determination means 25 and the storage means 27 The voltage control means 28 changes the drive voltage of the drive element 4 based on the reference voltage value signal.

A means for solving the problems according to claim 2 of the present invention is to provide a plurality of light emitting elements L corresponding to printing dots as shown in FIGS.
1 to L2560, a plurality of light emitting element arrays LA1 to LA1
LA40 and drive element 4 for driving the light emitting elements L1 to L2560 of each of the light emitting element arrays LA1 to LA40 in a time division manner.
And a common select circuit 24 for pulse-driving the common electrodes of the light emitting element arrays LA1 to LA40.
In addition, each of the light emitting element arrays LA1 to LA40 is configured to correct the variation in the light amount of the light emitting element arrays LA1 to LA40.
A drive pulse control circuit 31 that changes the number of drive pulses according to the drive pulse control circuit 31 is provided, and the drive pulse control circuit 31 determines which light emitting element array L based on a clock signal from the outside.
Determination means 34 for determining whether to drive A1 to LA40,
Storage means 35 for storing the number of drive pulses set for each of the light emitting element arrays LA1 to LA40, and the storage means 35.
And pulse output means 36 for outputting a pulse signal based on the drive pulse number signal from.

[0022]

In the means for solving the problems according to the above-mentioned claim 1, the light emitting element arrays LA1 to LA40 are arranged in advance in a state similar to the actual use state to emit light, and the current correction value of the light quantity variation is stored in the storage means 27. I will let you.

Then, each of the light emitting element arrays LA1 to LA4
When driving 0 in a time division manner, each of the light emitting element arrays LA1 to LA1
The storage unit 27 that stores the current correction value of the LA 40 is accessed to call the current correction value data, and the voltage control unit 28 changes the drive voltage of the drive element 4 based on this. By doing so, it is possible to correct the light amount variation of the light emitting element arrays LA1 to LA40, and it is possible to relatively easily provide a high quality print head.

In the problem solving means according to claim 2, the respective light emitting element arrays LA1 to LA40 are preliminarily juxtaposed in a state similar to the actual use state to emit light, and the number of correction drive pulses for the variation in the light amount is stored in the storage means 35. I will let you.

Then, each light emitting element array LA1 to LA4
Each of the light emitting element arrays L is driven when 0 is time-divisionally driven
Storage means 35 for storing the number of drive pulses of A1 to LA40
Is accessed to call the drive pulse number data, and the pulse output means 36 changes the drive pulse number of the drive element 4 based on the access data to thereby generate the light emitting element array LA1.
It is possible to correct the variation in the light amount of the LA 40 to LA 40, and it is possible to relatively easily provide a high quality print head.

[0026]

【Example】

(First Embodiment) FIG. 1 is a circuit block diagram showing a print head of a first embodiment of the present invention, FIG. 2 is an internal circuit block diagram of the same drive control circuit, and FIG. 3 is a structure of a drive current control circuit. FIG. 4 is a circuit diagram of the main part shown in FIG. Regarding the same functional parts as those of the conventional technology shown in FIGS.
The same reference numerals are attached.

As shown in the figure, the print head of this embodiment is provided with a light emitter 3 and a plurality of light emitting elements L1 to L of the light emitter 3.
The light emitting element arrays LA1 to LA40 have one driving element 4 that drives 2560 in a time division manner and a drive control circuit 5 that drives and controls the light emitting element arrays LA1 to LA40. A drive current control circuit 21 that changes the drive current of the drive element 4 according to the LA 40 is provided.

As shown in FIG. 1, the luminous body 3 is composed of 40 64-bit light emitting element arrays LA1 to LA40, which are the same as in the conventional case.
(LED arrays) are arranged side by side in one line, and as a result, a total of 2560 light emitting elements L corresponding to printing dots are formed.
1 to L2560 are juxtaposed in one line.

As the driving element 4, the same one as in the prior art 2 shown in FIG. 11 is used, and the shift register 6, the latch circuit 7, the gate circuit 8, the current control circuit 9, and the drive circuit 10 are used. Consists of.

As shown in FIG. 2, the drive control circuit 5 controls the drive element 4 and simultaneously switches the common electrodes C1 to C40 of the light emitting element array.
OCK) counting 64 bits, and the latch signal (LATC) based on the timing of the carry-out signal generated by the dot counter 22.
H) and an internal gate circuit 23 that forms a strobe signal (STROBE), and a common select circuit 24 for switching the common electrodes C1 to C40 of the light emitting element arrays LA1 to LA40.

As shown in FIG. 2, the common select circuit 24 counts the carry-out signal generated by the dot counter 22 by the number of the light emitting element arrays LA1 to LA40 and determines which light emitting element array LA1 to LA40 is to be driven. Means 25 (hereinafter referred to as array counter)
And a 40-bit decoder 26 for decoding the output of the array counter 25, and the common electrodes C1 to C of the light emitting element arrays LA1 to LA40 according to the output of the decoder 26.
Transistors Tr1 to Tr40 for turning on and off 40
It consists of

As shown in FIG. 3, the drive current control circuit 21 includes an array counter 25 of the common select circuit 24.
And a storage means 27 for storing the reference voltage value set for each of the light emitting element arrays LA1 to LA40, and the drive element based on the judgment result from the array counter 25 and the reference voltage value signal from the storage means 27. 4 and the voltage control means 28 for changing the drive voltage.

As shown in FIG. 3, the storage means 27 is a ROM of a micro computer type, and causes each of the light emitting element arrays LA1 to LA40 which are arranged side by side in a state similar to the actual use state including the photosensitive drum to emit light. Measure the amount of light,
A voltage value that can correct the variation in the light amount is calculated, and the calculation result is stored. The addresses of the storage means 27 are accessed by the array counter 25 of the common select circuit 24, and each of the light emitting element arrays LA1 to LA1 driven in a time division manner.
A correction value corresponding to LA40 is output.

An existing D / A converter is used as the voltage control means 28, and the reference voltage value signal from the storage means 27 is directly converted into the voltage V _REF, and the constant current control circuit 9 of the drive element 4 is supplied with this voltage. _{Apply the} voltage V _REF .

Reference numeral 30 in the figure denotes a connector for external connection.

Next, the operation of this embodiment will be described with reference to FIG. First, through the connector 30 from outside, RESE
After inputting the T signal and resetting the dot counter 22 and the array counter 25, the first light emitting element array LA
The 64-bit print data corresponding to 1 is transmitted to the shift register 6 in synchronism with the clock signal, and the clock signal is transmitted to the 64-bit dot counter 22 of the drive control circuit 5. The dot counter 22 sends a carry-out signal to the internal gate circuit 23, and the internal gate circuit 23 outputs the latch signal to the latch circuit 7 in synchronization with the carry-out signal. After the above process, the 64-bit print data is latched by the latch circuit 7.

On the other hand, a 40-ary array counter 25 which receives the carry-out signal from the dot counter 22
Counts up only one.

Then, the count output is supplied to the decoder 26.
Then, the decoder 26 first turns on the first transistor Tr1 to bring the corresponding first light emitting element array LA1 into a state capable of emitting light.

As described above, at this time, the array counter 25 causes the memory means 27 to store the light emitting element array LA.
The address storing the current correction value corresponding to 1 is accessed. At the same time, a strobe signal is output from the internal gate circuit 23, and the gate circuit 8 of the driving element 4 outputs an output bit based on the print data corresponding to the light emitting element array LA1.
Then, only the light emitting element array LA1 emits light corresponding to the print data and at the corrected current value.

Subsequently, the second light emitting element array L
When 64-bit print data corresponding to A2 is input together with the clock signal, a latch signal is generated in the same manner as the above-mentioned operation.
Bit data is latched. Further, since the array counter 25 further performs another count-up, the decoder 26 turns on the second transistor Tr2 to bring the second light emitting element array LA2 into a state capable of emitting light. Then, similarly to the above, at this time, since the strobe signal is also input to the drive element 4, the light emitting element array LA2 emits light corresponding to the print data. Further, by inputting the print data and the clock signal, the light emitting element arrays LA3 to LA40 sequentially emit light in accordance with the print data in the same manner as described above, and the printing operation for one line is completed.

As described above, in the dynamic drive type print head in which a plurality of light emitting element arrays are time-divisionally driven by one drive element, the voltage value measured in the actual use state is stored in the storage means. Therefore, it is possible to correct not only the light amount variation of the light emitting element array itself but also the current variation of the driving element and the variation of the driving capability of the common driver.

(Second Embodiment) FIG. 5 is a circuit block diagram showing the print head of the second embodiment of the present invention, and FIG. 6 is a diagram showing the drive timing in the same one-line printing.
The same functional components as those of the first embodiment shown in FIGS. 1 to 4 and the conventional technique shown in FIGS.

As shown in FIG. 5, in the print head of this embodiment, the common electrodes C1 to C40 of the light emitting element arrays LA1 to LA40 are pulse-driven by the common select circuit 24 in the drive control circuit 5.

As shown in FIG. 5, the drive control circuit 5 includes a dot counter 22 for counting an external clock signal (CLOCK) by 64 bits, and the dot counter 2.
The latch signal (LATCH) and strobe signal (STRO) are generated based on the timing of the carry-out signal
BE) and an internal gate circuit 23, and a common select circuit 24 for switching the common electrode of the light emitting element array.

Among them, the common select circuit 24 counts the carry-out signal generated by the dot counter 22 by the number of the light emitting element arrays LA1 to LA40, and judges which light emitting element array LA1 to LA40 is to be driven. Hereinafter, referred to as an array counter), a 40-bit decoder 26 for decoding the output of the array counter 25, and the light emitting element arrays LA1 to LA1 to LA1 to correct variations in the light amount of the light emitting element arrays LA1 to LA40.
The drive pulse control circuit 31 that changes the number of drive pulses of the common electrodes C1 to C40 of the LA 40, and the common electrodes C1 to C40 of the light emitting element array according to the pulse output from the drive pulse control circuit 31 and the output from the decoder 26. An AND gate circuit 32 for pulse driving, transistors Tr1 to Tr40, and a pulse generator 33 as an oscillation source of a drive pulse for the light emitting element array.

The drive pulse control circuit 31 includes an address counter 34 for counting the carry-out signal generated by the dot counter 22 by the number of light emitting element arrays.
Storage means 35 for storing the number of drive pulses set for each of the light emitting element arrays LA1 to LA40, and the storage means 35.
And pulse output means 36 for outputting a pulse signal based on the drive pulse number signal from.

As the storage means 35, an existing micro computer type ROM is used, and the data of the pulse drive number corresponding to the light amount of each of the light emitting element arrays LA1 to LA40 measured in the actual use state is stored.

The pulse output means 36 is a storage means 35.
It is a parallel / serial converter that converts parallel data from the to serial data.

The AND gate circuit 32 is composed of 40 AND gates G1 to G40.
To G40 are connected to the respective transistors Tr1 to Tr40.

Since the dot counter 22, the internal gate circuit 23, etc. are the same as those shown in the first embodiment, their explanation will be omitted.

Next, the operation of this embodiment will be described with reference to FIG. First, through the connector 30 from outside, RESE
After inputting the T signal and resetting the dot counter 22 and the array counter 25, the first light emitting element array LA
64 bit print data DATA corresponding to 1 is CLO
The clock is transmitted to the shift register 6 in synchronization with CK, and the CLOCK is transmitted to the 64-bit dot counter 22 of the drive control circuit 5. The dot counter 22 sends a carry-out signal to the internal gate circuit 23, and the internal gate circuit 23 outputs the latch signal to the latch circuit 7 in synchronization with the carry-out signal. After the above process,
The print data of 4 bits is latched by the latch circuit 7.

On the other hand, a 40-ary array counter 25 which receives the carry-out signal from the dot counter 22
Counts up only one.

Then, the count output is supplied to the decoder 26.
When it is output to the AND gate circuit 3,
Make the input of AND gate G1 in 2 active,
First, the first transistor Tr1 is brought into an operable state. At this time, the address counter 34 accesses the address in which the data of the number of drive pulses corresponding to the light emitting element array LA1 is stored in the storage means 35, and the pulse output means 36 outputs the drive pulse data in the parallel state output at this time. Convert to serial data and pulse generator 33
A drive pulse synchronized with the generated clock signal STCLK is input to the AND gate circuit 32. As described above, since only the AND gate G1 corresponding to the light emitting element LA1 is active, the pulse output means 36 is provided.
The drive pulse output from turns ON / OFF only the transistor Tr1.

At the same time, the strobe signal is output from the internal gate circuit 23, the gate circuit 8 of the driving element 4 turns on the output bit based on the print data corresponding to the light emitting element array LA1, and only the light emitting element array LA1 is output. The light is emitted in correspondence with the print data and with the number of drive pulses corresponding to LA1.

Subsequently, the second light emitting element array L
When 64-bit print data corresponding to A2 is input together with the clock signal, a latch signal is generated in the same manner as the above-mentioned operation.
Bit data is latched. Further, since the array counter 25 performs another counting up,
The decoder 26 turns on the second transistor Tr2.
Then, the second light emitting element array LA2 is brought into a state in which pulse driving is possible. Then, similarly to the above, since the strobe signal is also input to the drive element 4, the light emitting element array LA2 emits light in accordance with the print data. Further, by inputting the print data and the clock signal, the light emitting element arrays LA3 to LA40 sequentially emit light in accordance with the print data in the same manner as described above, and the printing operation for one line is completed.

As described above, in the print head of the dynamic drive type, based on the data measured in the actual use state, not only the light quantity variation of the light emitting element array itself but also the current variation of the driving element and the variation of the driving ability of the common driver are obtained. It is possible to provide a print head capable of correcting even the above.

(Third Embodiment) FIG. 7 is a circuit block diagram of a third embodiment of the present invention. The same functional parts as those of the first and second embodiments shown in FIGS. 1 to 6 and the prior art shown in FIGS. 8 to 12 are designated by the same reference numerals.

As shown in FIG. 7, in the printhead of this embodiment, the common select circuit 24 is replaced with the array counter 25 and the decoder 26 in the second embodiment, and the light emitting element array is generated based on the carry-out signal generated by the dot counter 22. A shift register 41 for selecting is used. Other configurations are similar to those of the second embodiment.

Next, the operation of this embodiment will be described. In addition,
The signal operation of each unit is similar to that shown in FIG. First, after inputting a RESET signal from the outside through the connector 30 to reset the dot counter 22 and the shift register 41, the 64-bit print data DATA corresponding to the first light emitting element array LA1 is synchronized with the CLOCK to shift register. 6 and the CLOCK to the dot counter 22. The dot counter 22 sends a carry-out signal to the internal gate circuit 23, and the internal gate circuit 23 outputs the latch signal to the latch circuit 7 in synchronization with the carry-out signal. After the above process, the 64-bit print data is transferred to the latch circuit 7.
Be latched on.

On the other hand, the shift register 41 which has received the carry-out signal from the dot counter 22 sets only the first bit to 1 and activates the input of the AND gate G1 in the AND gate circuit 32, and first, the first transistor. Put Tr1 in an operable state. At this time, the address counter 34 accesses the address in which the data of the number of drive pulses corresponding to the light emitting element array LA1 is stored in the storage means 35, and the pulse output means 36 outputs the drive pulse data in the parallel state output at this time. A drive pulse which is converted into serial data and which is synchronized with the clock signal STCLK generated by the pulse generator 33 is input to the AND gate circuit 32. As described above, since only the AND gate G1 corresponding to the light emitting element LA1 is active, the drive pulse output from the pulse output means 36 turns ON / OFF only the transistor Tr1.
To do.

At the same time, the strobe signal is output from the internal gate circuit 23, the gate circuit 8 of the driving element 4 turns on the output bit based on the print data corresponding to the light emitting element array LA1, and only the light emitting element array LA1 is output. The light is emitted in correspondence with the print data and with the number of drive pulses corresponding to LA1.

Subsequently, the second light emitting element array L
When 64-bit print data corresponding to A2 is input together with the clock signal, a latch signal is generated in the same manner as the above-mentioned operation.
Bit data is latched. Further, the shift register 41 shifts by one bit in response to the carry-out signal from the dot counter 22 and only the second bit becomes 1, so that the second transistor Tr2 becomes operable and the second light emitting element array is formed. The LA2 is brought into a pulse driveable state. Then, similarly to the above, since the strobe signal is also input to the drive element 4, the light emitting element array LA2 emits light in accordance with the print data. Further, by inputting the print data and the clock signal, the light emitting element arrays LA3 to LA40 sequentially emit light in accordance with the print data in the same manner as described above, and the printing operation for one line is completed.

Therefore, also in this embodiment, as in the second embodiment, it is possible to correct the light quantity variation of the light emitting element array.

The present invention is not limited to the above embodiments, and it goes without saying that many modifications and changes can be made to the above embodiments within the scope of the present invention.

For example, in the above embodiment, A4 size,
Although described in a 300 dpi printhead, the invention is not so limited.

[0066]

As is apparent from the above description, according to claims 1 and 2 of the present invention, in the print head of the dynamic drive system, the data measured in the actual use state is input to the storage means. In consideration of variations in drive capability for controlling drive elements and common electrodes, variations in light amount for each light emitting element array can be corrected, and printing quality can be improved.

Further, it becomes unnecessary to select and mount the light emitting element arrays having the same output level, and the selection step can be omitted, so that the work can be simplified, which is an excellent effect.

[Brief description of drawings]

FIG. 1 is a circuit block diagram showing a print head according to a first embodiment of the present invention.

FIG. 2 is also an internal circuit block diagram of the drive control circuit.

FIG. 3 is a main part circuit diagram showing a configuration of a drive current control circuit of the same.

FIG. 4 is a diagram showing drive timing in 1-line printing similarly.

FIG. 5 is a circuit block diagram showing a print head according to a second embodiment of the present invention.

FIG. 6 is a diagram showing drive timing in 1-line printing similarly.

FIG. 7 is a circuit block diagram of a third embodiment of the present invention.

FIG. 8 is a basic functional block diagram of the print head of Conventional Example 1.

FIG. 9 is a diagram showing the internal circuit configuration of the driving element.

FIG. 10 is a circuit block diagram of the same print head.

FIG. 11 is a diagram showing an internal circuit configuration of a drive element of Conventional Example 2.

FIG. 12 is a circuit block diagram of the same print head.

[Explanation of symbols]

 4 drive element 21 drive current control circuit 25,34 judging means 27,35 storage means 28 voltage control means 31 drive pulse control circuit 36 pulse output means L1 to L2560 light emitting elements LA1 to LA40 light emitting element arrays C1 to C40 common electrodes

Claims (2)

[Claims] 1. A light emitting element array in a printhead having a plurality of light emitting element arrays, each of which comprises a plurality of light emitting elements corresponding to a printing dot, and a drive element for driving the light emitting elements of each light emitting element array in a time division manner. Is provided with a drive current control circuit that changes the drive current of the drive element in accordance with each light emitting element array so as to correct the variation in the light amount of the light emitting element array, and the drive current control circuit determines which light emitting element array based on the clock signal from the outside. Determination means for determining whether to drive
Storage means for storing the reference voltage value set for each light emitting element array, and voltage control for changing the drive voltage of the drive element based on the determination result from the determination means and the reference voltage value signal from the storage means. A print head, characterized in that it comprises a means and. 2. A plurality of light emitting element arrays consisting of a plurality of light emitting elements corresponding to printing dots, a drive element for driving the light emitting elements of each light emitting element array in a time division manner, and a pulse for a common electrode of the light emitting element array. In a printhead having a driving common select circuit, the common select circuit is provided with a drive pulse control circuit that changes the number of drive pulses according to each light emitting element array so as to correct the variation in the light amount of the light emitting element array. The drive pulse control circuit is a determination means for determining which light emitting element array is driven based on a clock signal from the outside, and a storage means for storing the number of drive pulses set for each light emitting element array, And pulse output means for outputting a pulse signal based on the drive pulse number signal from the storage means. Print head to do.