JPH0591735A - Booster-type dc-dc converter - Google Patents

Abstract

PURPOSE:To enable a booster-type DC-DC converter to be operated stably and highly efficiently even if an input voltage is reduced. CONSTITUTION:An energy from a DC power supply E is accumulated in a reactor L1 while a MOS transistor TR is on. While the MOS transistor TR is off, a means EP for reducing grounding potential which reduces a grounding potential of a pulse width modulation circuit PM is provided by utilizing a negative potential which is generated at the reactor L1, thus enabling a pulse width modulation circuit PM to produce a voltage which is equivalently larger than a voltage of the DC power supply E and a pulse with a height corresponding to this voltage to be added to the MOS transistor TR.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switched-capacitor DC-DC converter for converting an input voltage into a required output voltage by connecting and disconnecting a switch, and more particularly to a step-up type input voltage lower than a drive voltage of a MOS transistor. The present invention relates to a switched capacitor DC-DC converter.

[0002]

2. Description of the Related Art A switched capacitor DC-DC in which a DC power source is connected in series with an output capacitor and a MOS transistor for controlling the terminal voltage of the output capacitor.
The converter is divided into two types, a step-down type and a step-up type.

FIG. 2 is a circuit diagram showing a basic configuration of a step-up type switched capacitor DC-DC converter disclosed in Japanese Patent Application No. 167801/1990 filed by the applicant of the present application. In the figure, a series circuit of a _first switch S ₁ , a capacitor C _1, and a second reactor L ₂ is connected in parallel to a DC power source E, and a second switch S ₂ is
Is connected in parallel to the series circuit of the switch S ₁ and the capacitor C ₁ . The series circuit of the first reactor L ₁ and the output capacitor C _O is connected in parallel to the series circuit of the capacitor C ₁ and the second reactor L _2, and the load R _L is connected in parallel to the output capacitor C _O. Are connected.

In this circuit, when the first switch S ₁ and the second switch S ₂ are turned on and off in a reverse phase relationship,
That is, when the first switch S ₁ is on, the second switch S ₂ is off, and when the first switch S ₁ is off, the second switch S ₂ is off.
The first such switch S ₂ is on, Actuation second the switches S _1, S _2, the ratio between the DC-DC converter output voltage D _out and the input voltage D _in the duty ratio d ，
That is, it is expressed as follows using the ratio of the _OFF period T _OFF to the ON / OFF period T of the switch S ₂ .

D _out / D _in = T _OFF / T = / (1-d) Therefore, by setting the duty ratio d to an arbitrary value from 0 to 1, D _out is set to an arbitrary value not less than D _in. Can be boosted to.

The actual step-up type switched capacitor type DC-DC converter further includes a control circuit SC for stabilizing the output voltage, and has, for example, a circuit configuration shown in A of FIG. In the figure, the diode D ₁ is used as the first switch S ₁ and the P-channel type MOS transistor TR is used as the second switch S ₂ . In the control circuit SC, the output voltage V _out is _divided by the two resistors r ₁ and r _{2 in} series, and the divided voltage V and the reference voltage V _R are compared by the comparator CP to obtain the voltage V A voltage V _{D, which} is the difference from the reference voltage V _R , is created and input to _one input terminal T ₁ of the pulse width modulation circuit PM. The input voltage V _in is supplied to the other input terminal T ₂ of the pulse modulation circuit PM. Thus, the pulse modulation circuit PM includes a series of positive pulse voltage (Fig. 3 see B) output terminals T ₃ and having a height corresponding to the input voltage V _in has a width corresponding to the differential voltage V _D Is output from the output terminal of the MOS transistor TR via the protection resistor r ₃ . As a result, the MOS transistor TR is turned off and the diode D ₁ is turned on while the positive pulse is applied to the gate of the MOS transistor TR.

Therefore, by appropriately selecting the ratio between the resistance r ₁ and the resistance r _2, and controlling the gate voltage of the MOS transistor TR by the difference voltage V _D corresponding thereto to maintain the duty ratio at a predetermined value, the output The voltage V _out can be maintained at a desired value. Also, the output voltage V _out can be changed by changing the ratio of the resistors r ₁ and r ₂ or the reference voltage V _R , and thus the difference voltage V _D.

[0008] In FIG. 4, the driving voltage V _GS of the P-channel MOS transistor TR is substantially equal to the input voltage V _in, also decreases the driving voltage V _GS of the MOS transistor when the input voltage V _in is decreased, P-channel MOS The on-resistance between the drain and source of the transistor TR increases, and the MOS transistor TR generates heat. In other words, when the input voltage V _in drops, the MOS transistor T
R causes heat generation, which is a cause of lowering the efficiency of the entire DC-DC converter. In fact, in the circuit of FIG. 3, the output voltage V _out is 12 V and the input voltage V _in is 2 V.
It was confirmed that the drive voltage V _GS of the MOS transistor TR becomes insufficient and the MOS transistor TR generates heat when V _in becomes smaller than 4 V.

[0009]

Therefore, in such a step-up type switched capacitor DC-DC converter, the gate of the P-channel MOS transistor is
It was desired to elucidate how to provide a controlled voltage.

The present invention has been made in order to solve the above-mentioned problems. Even when the voltage supplied from the DC power supply is low, the efficiency does not decrease and the boosting DC-type is stable and highly efficient.
An object is to provide a DC converter.

[0011]

In order to achieve the above object, a step-up DC-DC converter according to the present invention comprises:
A means for connecting at least one switch with a MOS transistor and connecting it to a DC power supply, at least one reactor for storing energy from the DC power supply while the MOS transistor is on, and a DC power supply via the reactor and the MOS transistor. At least a connected output capacitor for supplying a current to the load and a pulse width modulation circuit to which a voltage corresponding to the output voltage of the output capacitor is input and which applies a pulse of a required duty ratio to the gate of the MOS transistor. I have it. This step-up DC-
The DC converter further includes ground potential lowering means for reducing the ground potential of the pulse width modulation circuit by utilizing the negative potential generated in the reactor while the MOS transistor is off. Thereby, the pulse width modulation circuit produces a potential difference larger than the output potential difference of the DC power supply, and a pulse having a height corresponding to this potential difference is applied to the gate of the MOS transistor.

In one embodiment of the present invention, a boost type D
The C-DC converter includes a means for connecting to a DC power supply and a first means.
A circuit in which the switch, the second reactor, and the output capacitor are connected in series in this order, and a circuit in which the first capacitor and the first reactor are connected in series.
Connected in parallel to the series circuit of the reactor and the output capacitor, the load connected in parallel to the output capacitor, and the series circuit of the first switch and the first capacitor A second switch and a pulse width modulation circuit for inputting a voltage corresponding to the output voltage of the output capacitor and applying a pulse of a required duty ratio to the second switch, and using a MOS transistor as the second switch Then, energy is stored in the first reactor while the MOS transistor is on.

The DC-DC converter of this embodiment has a M
A ground potential lowering means for lowering the ground potential of the pulse width modulation circuit by a predetermined voltage is provided by receiving and utilizing the energy stored in the first reactor while the OS transistor is off. The pulse width modulation circuit uses a MOS pulse whose height corresponds to the sum of the predetermined voltage and the output voltage of the DC power supply.
Can be added to the gate of a transistor.

The ground potential lowering means is formed by connecting a series circuit of the additional capacitor and the rectifying diode in parallel to the first reactor, and connecting the connection point of the additional capacitor and the rectifying diode to the ground terminal of the pulse modulation circuit. You may comprise by.

[0015]

In the step-up DC-DC converter according to the present invention, the ground potential of the pulse width modulation circuit is equivalently lowered by utilizing the energy stored in the first reactor while the MOS transistor is off. As a result, the pulse width modulation circuit produces a voltage larger than the voltage of the DC power supply, and a pulse having a height corresponding to this voltage is applied to the MOS transistor. Therefore, even if the input voltage drops, the MOS transistor does not generate heat, and the step-up DC-DC
The converter operates with high efficiency and stability.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a boost type switched capacitor DC-DC converter according to the present invention will be described in detail below with reference to FIG. As is clear from A of FIG. 1, this step-up DC-DC converter has the DC-DC of A of FIG.
In addition to the converter, an additional capacitor C ₂ is connected between the negative terminal (ground level) of the DC power supply E and the ground terminal G of the pulse width modulation circuit PM, and the first reactor L ₁ and the capacitor C ₁ are connected. The cathode of the rectifying diode D ₂ is connected to the connection point of, and its anode is connected to the ground terminal G of the pulse width modulation circuit PM.

Next, the operation of the step-up DC-DC converter shown in FIG. 1 will be described. P-channel MOS transistor T
When R is turned on, the first reactor L ₁ becomes a DC power source E
Accumulates the energy of. On the other hand, the capacitor C ₁ is connected to the DC power source E via the turned-on MOS transistor TR.
It is connected in series and is discharged. The energy by energy and discharge of the capacitor C ₁ of the DC power source E is supplied to the second reactor L ₂ and the output capacitor C _0, charging the output capacitor C _0.

On the other hand, a P-channel MOS transistor T
When R is turned off, the diode D ₁ is turned on and the first reactor L ₁ is connected in series with the DC power source E, so that the energy stored therein is released through the diode D _1. Then, the capacitor C ₁ is charged. Further, the second reactor L ₂ is connected in series with the DC power source E via the diode D ₁ and charges the output capacitor C ₀ .

Since the counter electromotive force is generated in the first reactor L ₁ while the MOS transistor TR is off, the connection point between the _first reactor L ₁ and the capacitor C ₁ has a negative potential. Therefore, the MOS transistor TR
The additional capacitor C ₂ is charged through the rectifying diode D2 while the MOS transistor TR is off by the energy stored in the first reactor L ₁ during the on period. As a result, the potential of the ground terminal G of the pulse width modulation circuit PM becomes lower than the ground potential by the voltage V _C2 across the capacitor C ₂ . That is, the capacitor C ₂ and the diode D _{2 form} the ground potential lowering means EP.

Thus, a part of the energy stored in the first reactor L ₁ when the P-channel MOS transistor TR is on is supplied to the additional capacitor C via the rectifying diode D ₂ when the MOS transistor TR is off. By accumulating in ₂ , the pulse width modulation circuit PM can utilize the sum of the voltage V _C2 across the additional capacitor C ₂ and the input voltage V _in . Therefore, the pulse width modulation circuit PM applies a pulse having a height corresponding to this sum voltage (see B in FIG. 1) to the gate of the MOS transistor TR as the drive voltage V _GS .

[0021] Therefore, the input voltage V _in is also reduced,
Since a pulse having a height corresponding to the sum of the input voltage V _in and the voltage V _{C2 of the} additional capacitor is supplied to the gate of the MOS transistor TR, the step-up DC-of this embodiment is used.
In the DC converter, an increase in the on-resistance of the MOS transistor TR is prevented, so that it is less likely to generate heat as compared with the conventional one, and it is possible to operate stably with high efficiency.

Actually, in the step-up DC-DC converter of FIG. 1, when the output voltage V _out is set to 12 V and the input voltage is changed from 2 V to 7 V, the input voltage V _in
However, even if the voltage drops to 2 V, the heat generation cannot be recognized in the MOS transistor TR. From this, it can be seen that the step-up DC-DC converter according to the present invention maintains stable and highly efficient operation even when the input voltage drops.

[0023]

As described above, since the means for lowering the ground potential of the pulse generation modulation circuit is provided by utilizing the reverse electromotive force generated by the first reactor while the MOS transistor is off, the pulse width modulation is performed. The circuit can generate a voltage larger than the voltage of the DC power supply, and the pulse of the height corresponding to this voltage can be used as the drive voltage of the MOS transistor. Therefore, even when the input voltage drops, heat generation of the MOS transistor can be avoided, and the step-up DC-DC converter can be operated stably and highly efficiently.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of an embodiment of a step-up switched capacitor DC-DC converter according to the present invention, and B is a diagram showing a waveform of a pulse applied to a gate of a MOS transistor. ..

FIG. 2 is a diagram for explaining the operation principle of the step-up switched capacitor DC-DC converter according to the previous application.

3 is a boosted switched capacitor D of FIG.
It is a figure which shows the example of a circuit which actualized the C-DC converter, and B is a figure which shows the waveform of the pulse applied to the gate of a MOS transistor.

[Explanation of symbols]

L ₁ : First reactor L ₂ : Second reactor C ₀ : Output capacitor C ₂ : Additional capacitor D ₁ : Diode (first switch) D ₂ : Rectification diode PM: Pulse width modulation circuit SC: Control Circuit TR: MOS transistor (second switch) EP: Ground potential lowering means

Claims (3)

[Claims] 1. A means for connecting at least one switch to a direct current power source, the switch comprising a MOS transistor, and the M switch.
At least one reactor that stores energy from the DC power supply while the OS transistor is on; and an output capacitor that is connected to the DC power supply via the reactor and the MOS transistor to supply current to a load. A voltage corresponding to the output voltage of the output capacitor is input, and a pulse having a required duty ratio is supplied to the MOS.
A step-up DC-DC converter including at least a pulse width modulation circuit applied to the gate of a transistor, wherein the negative potential generated in the reactor while the MOS transistor is off is used to ground the pulse width modulation circuit. A ground potential lowering means for lowering the potential is provided, and the ground potential lowering means enables the pulse width modulation circuit to equivalently make a potential difference larger than the potential difference of the DC power supply, and a height corresponding to this potential difference. A step-up DC-DC converter characterized by applying a pulse to the MOS transistor. 2. A series circuit in which a means for connecting to a DC power source, a first switch, a second reactor, and an output capacitor are connected in this order, and a first capacitor and a first reactor are connected in series. A circuit connected in parallel to a series circuit of the second reactor and the output capacitor, a load connected in parallel to the output capacitor, the first switch and the first A second switch connected in parallel with a series circuit of the capacitor and a voltage corresponding to the output voltage of the output capacitor, and a pulse width modulation for applying a pulse of a required duty ratio to the second switch. A circuit using a MOS transistor as the second switch, and storing energy in the first reactor while the MOS transistor is on. In the step-up DC-DC converter, the ground potential lowering means for lowering the ground potential of the pulse width modulation circuit by a predetermined voltage by receiving and using the energy stored in the first reactor while the MOS transistor is off. And a pulse width modulation circuit for applying a pulse having a height corresponding to the sum of the predetermined voltage and the output voltage of the DC power supply to the gate of the MOS transistor. DC converter. 3. The ground potential lowering means includes a series circuit of an additional capacitor and a rectifying diode, the series circuit being connected in parallel to the first reactor, and connecting the additional capacitor and the rectifying diode. The point is connected to the ground terminal of the pulse modulation circuit.
Alternatively, the step-up DC-DC converter described in 2.