JPH0591448A - A/d converter for video signal - Google Patents

Abstract

PURPOSE:To display the images of high contrast by attaining the A/D conversion of high level resolution with use of an A/D converter of low level resolution. CONSTITUTION:A reference potential generating circuit 11 contained in an A/D converter 3 generates the upper and lower limit reference potentials of the prescribed voltage width and supplies these potentials to the comparators 121-12n. At the same time, the average level of the video signals received from a video amplifier circuit 1 is detected. Then both upper and lower limit reference potentials are automatically varied in accordance with the average level together with a prescribed potential kept as it is. The comparators 121-12n convert the video signals received from the circuit 1 within a range between the upper and lower limit reference potentials. Therefore the upper and lower limit reference potentials of the A/D conversion very in accordance with the average value of the video signals with the prescribed voltage width kept as it is despite the variance of the video signals. Thus the resolution of the A/D conversion can always be maximized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal AD converter for converting a television video signal into a digital signal.

[0002]

2. Description of the Related Art Recently, as a portable small television receiver,
A liquid crystal television receiver that uses a liquid crystal display panel instead of a cathode ray tube has been developed and is already in practical use. When a television image is displayed using a liquid crystal display panel, it is considered appropriate that the number of gray scales is about 16 gray scales from the capability of the liquid crystal display element. The 16 gradation signals can be produced by a 4-bit A / D converter.

[0003]

However, in order to faithfully A / D convert a video signal, it is necessary to A / D convert the white level to the black level of the video signal, and the resolution is 7 bits. More than required. The A / D converter is configured by using comparators, and for example, a large number of comparators such as 15 for 4-bit output, 31 for 5-bit output, and 63 for 6-bit output are provided. It is necessary, and if the resolution is improved, the structure becomes complicated and becomes very expensive. Further, since the video signal does not always change from the white level to the black level, the contrast is poor when the entire range of the video signal is A-D converted.

The present invention has been made in view of the above points. Utilizing the fact that human vision is sensitive to a portion where the change of the video signal is gentle and insensitive to a portion where the change is drastic, the average of the video signal is calculated. By performing A-D conversion around the value, it is possible to perform A-D conversion having a high level resolution by using an A-D converter having a low level resolution, and a video signal A-D capable of displaying an image with good contrast. An object is to provide a conversion device.

[0005]

In order to achieve the above object, the present invention comprises means for detecting an average level of a video signal,
Upper limit reference potential and lower limit reference potential of a predetermined voltage width are supplied,
The video signal is AD between the upper reference potential and the lower reference potential.
A / D converting means for converting, and the upper limit reference potential and the lower limit reference potential supplied to the A / D converting means, following the average level of the video signal detected by the detecting means,
And a means for automatically varying while maintaining the predetermined potential.

[0006]

With this configuration, even if the video signal fluctuates, the average value of the video signal is tracked in accordance with the fluctuation of the video signal while the upper limit reference potential and the lower limit reference potential of the A-D conversion maintain a predetermined voltage range. Therefore, the resolution of A-D conversion can always be maximized.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows the configuration of the main part of a liquid crystal television receiver. In the figure, 1 is an image amplification circuit,
A signal from a video detection circuit (not shown) is amplified and output to the sync separation circuit 2 and the AD converter 3. Moreover, a part of the output signal of the video amplifier circuit 1 is sent to an audio amplifier circuit (not shown). The sync separation circuit 2 separates the horizontal and vertical sync signals from the input video signal and outputs them to the control circuit 4. The control circuit 4 gives a driving timing signal to the first driving circuit 6 and a timing signal to the second driving circuit 7 via the shift register 5.

The first drive circuit 6 includes a liquid crystal display panel 8
In the vertical direction, and the second drive circuit 7 scans the liquid crystal display panel 8 in the horizontal direction. In addition, the control circuit 4 selects the chip enable signal / CE (the code "/" is the signal CE for selecting the video signal every other horizontal scanning.
Is shown) and is given to the AD converter 3.
The A-D converter 3 is configured reference potential generating circuit 11, a comparator 12 ₁ to 12 _n, the decoder 13, a bias circuit 14 mainly.

As will be described later in detail, the reference potential generating circuit 11 has a low level reference potential V _L and a high level reference potential V _L according to the white level voltage and the black level voltage of the video signal.
_H is generated, and the reference potentials V _L and V _H are directly or divided by the resistors R _{1 to} R _m , and then the comparator 12 is generated.
It is input to the reference terminals of _{1 to} 12 _n . The output signal of the video amplifier circuit 1 is applied to the comparison terminals of the comparators 12 _{1 to} 12 _n .

On the other hand, the bias circuit 14 operates in synchronization with the chip enable signal / CE, and the comparator 12 ₁
It gives a bias to the ~12 _n. Comparator 12 ₁ ~ 1
The 2 _n operates while being biased by the bias circuit 14 and inputs its output signal to the decoder 13.
The decoder 13 decodes the input signal into, for example, a 4-bit digital signal, and sends it to the shift register 9 as an output of the AD converter 3. This shift register 9
For example, the liquid crystal display panel 8 has 120 × 160 dots 2
In the case of a double matrix, it is configured by 4 bits × 320 stages. Then, the data input to the shift register 9 is sent to the second drive circuit 7 via the buffer 10.
The second drive circuit 7 subjects the output of the buffer 10 to brightness modulation based on the brightness pulse from the control circuit 4, and applies a drive bias to the liquid crystal display panel 8.

Next, details of the reference potential generating circuit 11 will be described with reference to FIG. The video signal sent from the video amplifier circuit 1 is sent to the OP amplifier 22 via the integration circuit 21.
Input to the + input terminal of. The OP amplifier 22 is used as a voltage follower buffer,
The output is input to its own-input terminal and the resistor 2
It is input to the-input terminal of the OP amplifier 24 via
A DC voltage of 1/2 V _cc is applied to the + input terminal of the OP amplifier 24. Then, the output of the OP amplifier 24 is input to its own-input terminal via the resistor 25. The OP amplifier 24 is used as a DC inverting amplifier, and its output is input to the-input terminal of the OP amplifier 27 via the resistor 26 and to the-input terminal of the OP amplifier 29 via the resistor 28. To be done. Further, the + input terminals of the OP amplifiers 27 and 29 are connected to 1 / 2V _cc
Voltage is applied.

Further, the voltage of V _cc is divided by a series circuit of a resistor 30, a variable resistor 31 and a resistor 32, and the divided voltage between the resistor 30 and the variable resistor 31 is the OP amplifier 29.
, And the divided voltage between the variable resistor 31 and the resistor 32 is supplied to the-input terminal of the OP amplifier 27. Also, the outputs of the OP amplifiers 27 and 29 are input to their-input terminals via the resistors 33 and 34, respectively.
Then, the output of the OP amplifier 27 is set to the reference potential V _H ,
The output of the OP amplifier 29 is taken out as the reference potential V _L.

Next, the operation of the above embodiment will be described with reference to the signal waveforms of the respective parts shown in FIG. A video signal a as shown in FIG. 3A is output from the video amplifier circuit 1.
It is input to the AD converter 3. The video signal a is first integrated by the integrating circuit 21 and then amplified by the OP amplifier 22 to become a signal b as shown in FIG. That is, the signal b changes following the change in the average value of the video signal a. The signal b is output to the OP amplifier 24.
The signal waveform is inverted and amplified in FIG. 3 to obtain the signal waveform shown in FIG. That is, the output signal c of the OP amplifier 24 is
Since 1 / 2V _cc is given as fourth reference voltage, a _{c = (1 / 2V cc -b} ) + 1 / 2V cc = V cc -b.

The output c of the OP amplifier 24 is an OP amplifier.
The signal shown in FIG. 3 (e) after being inverted and amplified by
Reference potential V_HBecomes At this time, the + end of the OP amplifier 27
1 / 2V for the child_ccVoltage is input to the negative terminal
The divided voltage d between the anti-31 and the resistor 32 is given.
Therefore, the output e of the OP amplifier 27 is e = V_H= (1 / 2V_cc-E) + (1 / 2V_cc-D) + 1 / 2V_cc  = 3 / 2V_cc-C-d = 3 / 2V_cc-(V_cc-B) -d = 1 / 2V_cc+ B-d.

Since the divided voltage d is set to a value lower than 1/2 V _cc as shown in FIG. 3D, the reference potential V _H becomes high level. The output of the OP amplifier 24 is inverted and amplified by the OP amplifier 29, and the output of FIG.
The signal g shown in (g), that is, the reference potential V _L is obtained. At this time, the voltage of 1/2 V _cc is input to the + terminal of the OP amplifier 29, and the divided voltage between the resistor 30 and the variable resistor 31 is applied to the-terminal, so the output g of the OP amplifier 29
_{Is, g = V L = (1} / 2V cc -c) + (1 / 2V cc -f) + 1 / 2V cc = 3 / 2V cc -c-f = 3 / 2V cc - (V cc -b) - the _{f = 1 / 2V cc + b} -f.

Since the divided voltage f is set to a value higher than 1/2 V _cc as shown in FIG. 3 (f), the reference potential V _L becomes low level. The divided voltage d, f
Changes with the adjustment of the variable resistor 31, so the level of the reference potentials V _H and V _L can be adjusted by operating the variable resistor 31. Further, the quasi-potentials V _H and V _L change according to the output b of the OP amplifier 22, as is clear from the above calculation formula. That is, the reference potentials V _H and V _L change in accordance with changes in the average value of the video signal.

Therefore, the reference potentials V _H and V _L output from the reference potential generating circuit 11 are directly or through the resistor R.
_The voltage is divided by _{1 to} R _m and the comparators 12 _{1 to} 12 _n
Input as a reference voltage. Comparator 12 ₁
˜12 _{n take} out the video signal output from the video amplifier circuit 1 in accordance with the reference potentials V _H and V _L and convert it into 4-bit data via the decoder 13. Therefore, the A-D conversion is always performed around the average value of the video signal. That is, when the image is darkish, the average value of the video signal is low, so the reference potentials V _H and V _L are low, and when the image is whitish, the average value of the video signal is high, so the reference potential is high and A-D conversion is performed around the average value. Then, the 4-bit data AD-converted by the AD converter 3 is written in the shift register 9, sent to the second drive circuit 7 via the buffer 10, and displayed on the liquid crystal display panel 8. It

[0018]

As described above, according to the present invention, not the entire range of the video signal but the predetermined range around the average value of the video signal having a gentle change is A / D converted. A / D conversion with high level resolution can be performed using an A / D converter with low resolution, and an image with good contrast can be displayed. Also A-
Since the D converter having a low level resolution can be used, the number of comparators used can be reduced to simplify the configuration, and the cost can be reduced.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram showing details of a reference potential generation circuit in the AD converter in FIG.

FIG. 3 is an operation signal waveform diagram of each part in FIG.

[Explanation of symbols]

3 ... A-D converter, 11 ... reference voltage generating circuit, 12 ₁
... 12 _n ... Comparator, 13 ... Decoder, 14 ... Bias circuit, 21 ... Integrating circuit, 22, 24, 27, 29 ...
OP amplifier.

Claims (1)

[Claims] 1. A means for detecting an average level of a video signal, an upper reference potential and a lower reference potential having a predetermined voltage width are supplied,
The video signal is AD between the upper reference potential and the lower reference potential.
Following the average level of the A-D converting means for converting and the video signal detected by the detecting means, the upper limit reference potential and the lower limit reference potential supplied to the A-D converting means are set to the predetermined potential. A video signal A / D conversion device comprising means for automatically varying while maintaining.