JPH0590400A - Semiconductor device with built-in high breakdown strength element - Google Patents

Abstract

PURPOSE:To miniaturize a semiconductor device containing a high breakdown strength element by reducing the rear of the element. CONSTITUTION:Double diffused regions formed of an N<+> type drain region and an N<-> type region of a high breakdown strength NMOS transistor is isolated by a groove 7c in which an insulator 8 is buried thereby to prevent lateral extension of the N<-> type region in an outward direction, thereby reducing the area of a high breakdown strength element.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a high breakdown voltage element such as a display device driving device, various motor driving devices, a DC-DC converter, a switching device for a switching power supply and the like.

[0002]

2. Description of the Related Art In recent years, the power supply of integrated circuits has tended to become lower in voltage, and the fine processing technology of MOS integrated circuits has been further advanced under this tendency. However, if a high breakdown voltage element is to be simultaneously fabricated in a semiconductor device, the diffusion layer should be made deeper in the opposite direction of the above-mentioned microfabrication technique of making the diffusion layer shallower and suppressing the lateral spread to promote miniaturization. It is necessary to reduce the electric field of the PN junction. A double diffusion method is known as a method for realizing such a high breakdown voltage element.

FIG. 3 is a sectional view showing a structure of a high breakdown voltage N-channel MOS transistor realized by using the double diffusion method. In the figure, reference numeral 1 is a P ⁻ type silicon substrate,
A MOS transistor including a gate G, a drain D and a source S is built on the silicon substrate 1. The drain region to which a high voltage is applied is N ⁻ region 2a and N ⁻ region 2a.
^It has a double diffusion structure composed of ⁺ region 2b. According to such a double diffusion structure, a PN junction having a gentle impurity concentration gradient is formed between the drain and the substrate, so that when a high voltage is applied to the drain D, the depletion layer of the PN junction portion expands and acts on this portion. The applied electric field is relaxed, and the breakdown voltage can be improved.

[0004]

However, the conventional example having such a structure has the following problems. That is, according to the conventional example, as the breakdown voltage of the device is increased, the low-concentration diffusion layer is made wider and deeper and P
Since it is necessary to loosen the N matching concentration gradient, there is a problem that the lateral expansion of the diffusion layer becomes large and the occupation area of the high breakdown voltage element becomes large.

The present invention has been made in view of the above circumstances, and provides a semiconductor device with a built-in high breakdown voltage element which can reduce the occupied area of the high breakdown voltage element as well as the low breakdown voltage element. It is an object.

[0006]

The present invention has the following constitution in order to achieve such an object. That is, according to the present invention, in a semiconductor device including a high breakdown voltage element having a double diffusion structure for relaxing an electric field, a double diffusion region of the high breakdown voltage element is formed from a low impurity concentration layer of the double diffusion region. It is also deep and separated by a groove in which an insulator is embedded.

[0007]

According to the present invention, since the concentration gradient of the PN junction is made gentle by the low impurity concentration layer having the double diffusion structure, the concentration of the electric field is relieved and the lateral concentration by making the low impurity concentration layer deeper. Spreading is prevented by trenches with embedded insulation.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing an element structure of an embodiment of a semiconductor device with a high breakdown voltage element according to the present invention.

The semiconductor device shown in FIG. 1 includes a PMOS transistor 3 and an NMOS on a P ^- type silicon substrate 1.
A low breakdown voltage C-MOS transistor 5 including a transistor 4 and a high breakdown voltage NMOS transistor 6;
Each element is insulated and separated by the grooves 7a to 7d formed in the silicon substrate 1. An insulator 8 such as a silicon oxide film is embedded in each groove.

In the PMOS transistor 3, 9 is N
^- well region 10 is polysilicon gates, 11 and 12 are drain and source regions composed of P ⁺ regions. Here, the trenches 7a and 7b have a role of preventing lateral expansion of the N ⁻ well region 9 and achieving miniaturization of the element.

In the NMOS transistor 4, 13 is a polysilicon gate, and 14 and 15 are drain and source regions formed of N ⁺ regions.

In the high breakdown voltage NMOS transistor 6, 16 is a polysilicon gate and 17 and 18 are N ^+.
The drain and source regions are regions. Also,
Reference numeral 19 denotes an N ⁻ region which is a low concentration region provided for increasing the breakdown voltage by giving a concentration gradient to the PN junction between the drain region 17 and the silicon substrate 1. Here, the groove 7c
Prevent lateral expansion of the N ⁻ region 19, and the groove 7d prevents lateral spread of the source region 18. In order to make the size of the NMOS transistor 6 as small as possible, the lateral extension of the source region 18 is prevented by the groove 7d. However, the lateral extension of the source region 18 is slight, so the groove 7d is not necessarily provided. There is no.

As described above, since the drain region of the NMOS transistor 6 has the double diffusion structure as described in the conventional example, the electric field concentration is relaxed and the breakdown voltage is increased. Moreover, since the groove 7c prevents lateral expansion of the N ⁻ region 19 in the outward direction, the element area can be made smaller than that of the conventional high breakdown voltage element.

The semiconductor device shown in FIG. 1 is manufactured as follows. First, the silicon substrate 1 is subjected to anisotropic etching such as reactive ion etching (RIE) to form the grooves 7a to 7d for element separation. Each groove 7a-7
The depth of d must be set at least deeper than the N ⁻ regions 9 and 19, but is usually in the range of 1 to several μm.
Next, after the insulator 8 such as a silico oxide film is laminated by the CVD (Chemical Vapor Deposition) method, the insulator 8 is buried in the trenches 7a to 7d by etching back. The N ^- well region 9 is formed in the region of the PMOS transistor 3.
And the N ⁻ region 19 is formed in the drain region of the NMOS transistor 6. Next, through the gate oxide film, the polysilicon gates 10 and 1 of each transistor are formed.
3, 16 are formed, and the drain regions 11, 14, 17 and the source regions 12, 1 are formed by using these gates as a mask.
5, 18 are formed by self-alignment. As described above, the device shown in FIG. 1 is manufactured.

In the above embodiment, the case where the high breakdown voltage NMOS transistor 6 is formed on the P ⁻ type silicon substrate 1 has been described as an example, but the present invention is applied to the N ⁻ type silicon substrate. It can also be applied when forming a PMOS transistor.

The present invention can be applied not only to high breakdown voltage MOS transistors, but also to high breakdown voltage diodes, for example. FIG. 2 shows an example in which the present invention is applied to a high breakdown voltage diode. That is, P ⁻
Groove 7 in which an insulator 8 is embedded in a silicon substrate 1 of a mold
e and 7f are formed to separate the element regions. Then, an N ⁻ region 20 for relaxing electric field concentration in this element region
And an N ⁺ region 21 is further formed thereon. In the figure, reference symbol A is an anode electrode and K is a cathode electrode. Also in this embodiment, since the lateral expansion of the N ⁻ diffusion layer 20 is prevented by the grooves 7e and 7f, it is possible to realize a high breakdown voltage diode having a small element area.

[0017]

As is apparent from the above description, according to the present invention, the double diffusion region of the high breakdown voltage element is deeper than the low impurity concentration layer of the double diffusion region, and the insulator is provided inside. Since the trenches are separated by the buried trench, lateral expansion of the low impurity concentration layer can be prevented, a dimension between elements can be set small, and a semiconductor device having a high breakdown voltage element can be miniaturized.

[Brief description of drawings]

FIG. 1 is a sectional view showing an element structure of an example of a semiconductor device with a built-in high breakdown voltage element according to the present invention.

FIG. 2 is a cross-sectional view showing an element structure of a high breakdown voltage diode according to another embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a structure of a high breakdown voltage element according to a conventional example.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Silicon substrate 3 ... PMOS transistor 4 ... NMOS transistor 5 ... C-MOS transistor 6 ... High breakdown voltage NMOS transistor 7a-7f ... Groove 8 ... Insulator 9 ... N ^- well region 10, 13, 16 ... Polysilicon gate 11, 14, 17 ... Drain region 12, 15, 18 ... Source region 19, 20 ... N ^- region

Claims (1)

[Claims] 1. A semiconductor device incorporating a high breakdown voltage element having a double diffusion structure for relaxing an electric field, wherein a double diffusion region of the high breakdown voltage element is formed more than a low impurity concentration layer of the double diffusion region. A semiconductor device with a built-in high breakdown voltage element, characterized in that it is deeply separated by a groove in which an insulator is embedded.