JPH0590398A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a method for manufacturing a semiconductor device in which a current amplification factor of a parasitic element is reduced by introducing a crystal defect controlled to an element isolation layer. CONSTITUTION:A method for manufacturing a semiconductor device comprises the steps of forming a reverse conductivity type epitaxial layer 2 on a predetermined region on one conductivity type semiconductor substrate 1, ion implanting either conductivity type impurity to a predetermined position of the layer 2, and forming a reverse conductivity type layer to that of the layer 2 in a depth reaching the substrate 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device in which an influence of a parasitic element generated inside an integrated circuit is minimized to prevent abnormal circuit operation (latch-up). Regarding

[0002]

2. Description of the Related Art Generally, as element isolation of an integrated circuit, a p-type is formed by embedding a reverse conductivity type impurity in a portion to be isolated.
n separation is performed. 2A to 2C are schematic process sectional views showing an example of a conventional element isolation method. First, in FIG. 1A, an n-type layer 2 having a thickness of several μm is formed on the surface of a p-type substrate 1 by epitaxial growth.
Then, an insulating film 3 made of SiO ₂ or the like is formed on the n-type layer 2, and a portion to be separated is patterned to form a concave portion 4 to expose the epitaxial layer 2. Next, in FIG. 2B, a diffusion coating material 5 containing B (boron) is applied to the entire surface of the substrate including the recess 4. Next, in FIG. 3C, thermal diffusion of drive-in in which the p layer (boron) reaches the substrate 1 is performed. After that, the diffusion coating agent and the insulating film 3 are removed. According to the above process, the portion covered with the insulating film 3 remains the n-type, and the portion subjected to the thermal diffusion is the element isolation layer (p ⁺
Therefore, the n-type portion can be separated.

[0003]

In recent years, the technology for refining materials has improved, and the p ⁺ layer in the separation layer 6 formed by diffusion has few defects. Therefore, the npn junction as the parasitic element 7 is formed in the substrate 1 as shown in FIG. 2, and the impurity concentration of the substrate 1 (p), the impurity concentration of the epitaxial layer 2 (n) or their crystallinity is obtained. As a result, the current amplification factor α of the parasitic element 7 changes. For example, this α increases as the number of crystal defects in the element isolation layer 6 decreases. An object of the present invention is to introduce a controlled crystal defect into the element isolation layer 6 to reduce the current amplification factor α of the parasitic element.

[0004]

In order to solve the above problems, the present invention provides a step of forming an epitaxial layer of opposite conductivity type in a predetermined region on a semiconductor substrate of one conductivity type, and a predetermined portion of the epitaxial layer. And a step of forming a layer having a conductivity type opposite to that of the epitaxial layer to a depth reaching the substrate.

[0005]

The impurity implanted by the ion implantation causes defects in the epitaxial layer. This defect spreads over the entire element isolation layer in the subsequent step of thermally diffusing the coating material and suppresses the formation of a parasitic element.

[0006]

1 (a) to 1 (e) are schematic process sectional views showing an embodiment of the present invention. It demonstrates according to a process. Step 1 (see FIG. A) A specific resistance of 1 to 5 / cm and a thickness of 15 μ are formed on the surface of a p-type Si substrate 1 having a specific resistance of 10 to 20 Ω / cm and a thickness of about 500 μm.
m of the epitaxial layer 2 is grown, a SiO ₂ film 3 is formed on the epitaxial layer 2 to a thickness of about 0.7 μm, and the SiO ₂ film 3 is patterned to form 4 recesses, The epitaxial layer 2 on which the separation layer is to be formed is exposed (up to this point, it is the same as the conventional one). Step 2 (see FIG. B) 10 ¹⁵ to 10 Using the SiO ₂ film 2 as a mask for ion implantation
Boron (B) having a concentration of about ¹⁶ / cm ³ is 40 to 90 ke
Inject with V. This ion implantation causes defects in the epitaxial layer 2. Step 3 (see FIG. C) Next, a diffusion coating agent 5 containing B was applied by a spin coat to about 0.7 to 2 μm, and nitrogen was mixed with oxygen 9
Pre-diffusion (pre-deposition) is performed in a gas atmosphere of 00 to 2000 ° C. for 1 to 2 hours. Step 4 (see FIG. D) Next, main diffusion (drive-in) is performed in an oxygen atmosphere at 1100 to 1200 ° C. to form the element isolation layer 6a. The process described above will cause defects to propagate throughout the isolation layer during drive-in diffusion. Since the isolation layer has a defect in this manner, it is possible to obtain a semiconductor element in which the parasitic element 7 is not formed. The degree of defects in the separation layer can be controlled by considering the speed and concentration during ion implantation, the drive-in temperature, and the like. Further, in the present embodiment, the substrate is a p-type and the n-type epitaxial layer is formed. However, when the p-type epitaxial layer is formed on the n-type substrate, the p-type epitaxial layer is formed.
Alternatively, n-type ions may be implanted.

As described above in detail with reference to the embodiments, according to the semiconductor manufacturing method of the present invention, it is possible to intentionally cause a defect in the element isolation layer and control the degree of the defect. Therefore, it is possible to obtain a semiconductor element in which a parasitic element is not formed, and an abnormal operation of the integrated circuit, that is,
It is possible to prevent the phenomenon that the output is latched up by the power supply.

[Brief description of drawings]

1A to 1E are cross-sectional views showing a schematic manufacturing process of a method for manufacturing a semiconductor device of the present invention.

2A to 2C are cross-sectional views showing a schematic manufacturing process of a conventional method for manufacturing a semiconductor device.

FIG. 3 is a diagram showing a state of a parasitic element.

[Explanation of symbols]

 1 Substrate 2 Epitaxial Layer 3 Insulating Film 4 Recess 5 Diffusion Coating Agent 6, 6a Element Separation Layer 7 Parasitic Element

Claims (1)

[Claims] 1. A step of forming an epitaxial layer of an opposite conductivity type in a predetermined region on a semiconductor substrate of one conductivity type, and a step of ion-implanting an impurity of either conductivity type into a predetermined portion of the epitaxial layer. Forming a layer having a conductivity type opposite to that of the epitaxial layer to reach the substrate,
A method of manufacturing a semiconductor device, comprising: