JPH0590243A - Method of processing si substrate - Google Patents

Abstract

PURPOSE:To process a bulk Si substrate easily and evenly and to make it possible to apply the bulk Si substrate to an X-ray mask, a light-transmitting substrate, a micromachining and the like by a method wherein a non-porous Si substrate is partially brought into a porous state from the substrate surface to the substrate rear and the porous Si regions of the substrate are removed by a chemical etching. CONSTITUTION:A method of processing an Si substrate is performed in such a way as to have a process for bringing partially a non-porous Si substrate 11 into a porous state from the substrate surface to the substrate rear at one place or more and a process for removing porous Si regions 13 of the substrate by a chemical etching. For example, the surface and rear of a non-porous Si substrate 11 are both covered with each mask 12 and windows are partially opened. Then, an anode-chemical formation is performed in an HF solution and exposed parts are brought into a porous state from the substrate surface to the substrate rear. After that, the substrate is wetted in a hydrofluoric acid-nitric acid-acetic acid (1:3:8) solution and porous Si regions 13 are subjected to chemical etching and are removed. In that case, when the masks 12 are arranged at the same position within the surface and the rear on both of the surface and the rear, the wall surfaces of holes are formed in a vertical form and when the masks 12 are shifted from each other and are arranged, the wall surfaces are formed in an oblique form.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for processing a Si substrate, and more particularly to a method for processing a Si substrate capable of efficiently and uniformly processing a Si substrate with high accuracy. INDUSTRIAL APPLICABILITY The present invention can be applied to processing of semiconductor devices, light transmissive substrates, and micromechanical mechanisms.

[0002]

2. Description of the Related Art In recent years, research has been conducted on a micromechanical mechanism for processing and manufacturing a Si substrate. As a method for etching the bulk Si, chemical etching, reactive ion etching (RIE) is used.
ing) is well known.

The chemical etching method is a resist, Si ₃ N
_This is a method in which the Si substrate is soaked in an etching solution using ₄ or SiO ₂ as a mask to etch only the portion not covered by the mask.

The reactive ion etching method is a resist,
In this method, Si ₃ N ₄ or SiO _{2 is used} as a mask in a reactive ion atmosphere to etch only a portion not covered with the mask.

[0005]

However, in the above-described bulk Si etching method, there is no difference in material between the region to be etched and the region not to be etched.
An etching mask having excellent etching resistance is required.

[0006] In chemical etching, overetching occurs in the lateral direction, and in anisotropic etching, a low etching rate surface appears, and it is impossible to form an etching portion only by a wall surface perpendicular to the surface. Further, the shape also changes depending on the plane orientation of the Si substrate.

By the reactive ion etching method, vertical etching can be performed, but it is almost impossible to cut through Si having a thickness of several hundred μm to several mm.

An object of the present invention is to provide a method for processing a Si substrate, which can easily and uniformly process bulk Si and can be applied to an X-ray mask, a light transmissive substrate, micromachining and the like.

[0009]

Means and Actions for Solving the Problems Si of the Present Invention
The method for processing a substrate includes a step of partially making the non-porous Si substrate porous from one surface or more to a back surface thereof, and a step of removing the porous Si region by chemical etching. To do.

The operation of the present invention will be described below.
First, in order to facilitate understanding of the present invention, the porous Si used in the present invention will be described.

Porous Si is described in 1956 by Uhlir et al.
It was discovered in the process of research on electropolishing of semiconductors in 2010 (A.
Uhlir, Bell Syst.Tech.J., vol 35, p.333 (1956)). Also, Unami et al. Studied the dissolution reaction of Si in anodization and reported that the anodic reaction of Si in HF solution requires holes, and the reaction is as follows (T .
Unagami: J. Electrochem. Soc., Vol.127, p.476 (198
0)).

Si + 2HF + (2-n) e ⁺ → SiF ₂ + 2H ⁺ + ne ^- SiF ₂ + 2HF → SiF ₄ + H ₂ SiF ₄ + 2HF → H ₂ SiF ₆ or Si + 4HF + (4 -λ) e ⁺ → SiF ₄ + 4H ⁺ + λe ^- SiF ₄ + 2HF → H ₂ SiF ₆ Here, e ⁺ and e ⁻ represent holes and electrons, respectively. In addition, n and λ are the numbers of holes required for dissolving Si1 atoms, respectively, and porous Si is formed when the condition of n> 2 or λ> 4 is satisfied.

As described above, holes are required to form porous Si, and P-type Si is more likely to be transformed into porous Si than N-type Si.

However, if N-type Si is also injected with holes,
It is known to change into porous Si (RPHolmst
rom and JYChi. Appl. Phys. Lett. Vol. 42,386 (1983)
). This porous Si layer has a density of single crystal Si of 2.33.
By changing the HF solution concentration to 50 to 20% as compared with g / cm ³ , its density is 1.1 to 0.6 g / cm ^3.
The range can be changed. This porous Si layer has an average of about 600 as observed by a transmission electron microscope.
A hole with a diameter of about angstrom is formed. Although its density is less than half that of single crystal Si, single crystallinity is maintained, and it is possible to epitaxially grow a single crystal Si layer on the upper part of the porous layer.

Generally, when a single crystal of Si is oxidized, its volume is increased to about 2.2 times, but by controlling the density of porous Si, it is possible to suppress the volume expansion of the single crystal, which causes warpage of the substrate. It is possible to avoid cracks introduced into the surface residual single crystal layer. The volume ratio R of the single crystal Si after being oxidized to the porous Si can be expressed as follows.

R = 2.2 × (A / 2.33) where A is the density of porous Si. If R = 1,
That is, when there is no volume expansion after oxidation, A = 1.0
6 (g / cm ³ ) and the density of the porous Si layer is 1.0
When it is 6, volume expansion can be suppressed.

Further, since the porous layer has a large amount of voids formed therein, its density is reduced to less than half. As a result, the surface area increases dramatically compared to the volume,
Its chemical etching rate is significantly enhanced compared to the etching rate of non-porous layers.

The present invention has been made under such a technical background. The operation of the present invention will be described below.

As described above, since the porous layer has a large amount of voids formed therein, the density is reduced to less than half. As a result, the surface area is dramatically increased as compared with the volume, so that the chemical etching rate is significantly increased as compared with the etching rate of the non-porous layer.

The present invention utilizes such properties of porous Si, and is characterized in that a non-porous Si substrate is partially made porous from the front surface to the back surface at one or more locations. The purpose is to form a porous Si region in which the etching rate is remarkably increased as compared with the non-porous Si region, and to remove this porous Si region by chemical etching.

The porous Si used in the present invention is
Since it is formed along the current flow during anodization, it is possible to control the current flow by providing a mask or impurity distribution, and to create and process non-porous Si in almost any shape. Is possible.

Further, according to the present invention, the non-porous Si substrate is partially transformed into porous Si at one or more places, and the porous S is highly efficiently and highly accurately prepared without using an etching preventive film.
It is possible to remove the i region and form a hole partially penetrating to the back surface in one or more places in the non-porous Si substrate.

[0023]

Embodiments Embodiments of the present invention will be described below. [Embodiment 1] FIG. 1 shows an example in which both the front and back surfaces of non-porous Si are partially covered with a mask and the exposed portion is made porous from the front surface to the back surface.

As shown in FIG. 1A, non-porous Si1
The front surface and the back surface of 1 are covered with a mask 12 to partially open a window. Here, as the mask, a polyimide film having high resistance to chemical etching, apiezon wax, a high resistance epitaxial film, a high resistance non-epitaxial deposition film, or the like is used.

Next, the exposed portion is made porous from the front surface to the back surface (FIG. 1 (b)). At this time, the porous Si region 1
Since No. 3 is formed along the current flow during anodization, the mask 12 makes it possible to form a porous Si region in almost any shape.

Thereafter, the mask 12 is peeled off, and the porous Si
Region 13 is removed by chemical etching. Of course, the mask may be peeled off after the porous Si region 13 is selectively etched. Further, when the mask 12 does not have any adverse effect on the application of the present processed product such as an epitaxial layer, it is clear that the mask 12 need not be peeled off.

FIG. 1C shows a completed diagram of this embodiment. As described above, the holes can be partially penetrated from the front surface to the back surface of the non-porous Si at one or more locations.

Here, if the mask is arranged at the same position on the front surface and the back surface in the same plane, the wall surface of the hole becomes vertical to the front surface, and if it is arranged so as to be displaced, the wall surface becomes oblique. [Embodiment 2] FIG. 2 shows an example in which the surface of non-porous Si is partially covered with a mask and the exposed portion to the back surface is made porous.

As shown in FIG. 2A, non-porous Si2
The surface of 1 is covered with a mask 22 and a window is partially opened. Here, as the mask, a polyimide film having high resistance to chemical etching, apiezon wax, a high resistance epitaxial film, a high resistance non-epitaxial deposition film, or the like is used.

Next, the exposed portion and the back surface are made porous (FIG. 2B).

Thereafter, the mask 22 is peeled off, and the porous Si
Region 23 is chemically etched away. Of course, the mask 22 may be peeled off after the porous Si region 23 is selectively etched. Further, when the mask 22 does not have any adverse effect on the application of the present processed product such as an epitaxial layer, it is clear that the mask 22 need not be peeled off.

FIG. 2C shows a completed diagram of this embodiment. As described above, the holes can be partially penetrated from the front surface to the back surface of the non-porous Si at one or more locations. [Embodiment 3] FIG. 3 shows an example in which the front surface and the back surface of the non-porous Si are partially made high in resistance, and the exposed low resistance portion is made porous from the front surface to the back surface.

As shown in FIG. 3A, non-porous Si3
The resistance of both the front surface and the back surface of No. 1 is partially increased to be a high resistance region 32.
To make. At least one low resistance region is exposed on each side. The high resistance region 32 is formed by a non-deposition method such as ion implantation or impurity diffusion.

Next, the exposed low resistance portion is made porous from the front surface to the back surface (FIG. 3 (b)). At this time, porous Si
Since the region 33 is formed along the current flow during anodization, the high resistance region 32 allows the porous Si region to be formed in an almost arbitrary shape.

After that, the porous Si region 33 is removed by chemical etching.

FIG. 3C shows a completed diagram of this embodiment. As described above, the holes can be partially penetrated from the front surface to the back surface of the non-porous Si at one or more locations.

Here, if the high resistance regions 32 are arranged at the same position on the front surface and the back surface, the wall surface of the hole becomes vertical to the surface, and if they are arranged so as to be displaced, the wall surface becomes oblique. [Embodiment 4] FIG. 4 shows an example of a case where the surface of non-porous Si is made to have a high resistance, and the exposed low resistance part is made porous from the back surface.

As shown in FIG. 4A, non-porous Si4
The surface of No. 1 is partially made high in resistance to form the high resistance region 42. At least one low resistance region is exposed on each side. The high resistance region 42 is formed by a non-deposition method such as ion implantation or impurity diffusion.

Next, the exposed low resistance portion is made porous from the back surface (FIG. 4B).

After that, the porous Si region 43 is removed by chemical etching.

FIG. 4C shows a completed diagram of this embodiment. As described above, the holes can be partially penetrated from the front surface to the back surface of the non-porous Si at one or more locations.

[0042]

Embodiments of the present invention will be described in detail below with reference to the drawings. Example 1 A high resistance epitaxial Si layer is formed on both surfaces of a 200 μm thick low resistance single crystal Si substrate by MBE (Molecular Beam Epitaxy).
It was formed to a thickness of 0.5 μm by the axy method. The growth conditions are
It is as follows.

Temperature: 700 ° C. Pressure: 1 × 10 ⁻⁹ Torr Growth rate: 0.1 nm / sec After that, a resist is patterned on the epitaxial Si layer by a lithography technique to form an epitaxial Si layer.
RIE (Reactive Ion Etching: React) is performed until the low resistance single crystal Si substrate is exposed in the region where the layer is exposed.
It was etched by the iv lon Etching method. At this time, at least one exposed low resistance region was present on each surface. Further, the exposed low resistance region was arranged at the same position on the front and back surfaces in the plane. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1:
1: 1 time: 1.6 (hours) Thickness of porous Si: 200 (μm) Porosity: 56 (%) The maskless portion from the front surface to the back surface was made porous.
The substrate was infiltrated with a fluoronitric acid acetic acid (1: 3: 8) solution.
As described above, the etching rate of porous Si is increased about 100 times that of single crystals.

Ordinary single crystal Si fluoronitric acid acetic acid (1: 3:
8) Since the etching rate with respect to the solution was about 1 μm / min or less, the 200 μm-thick porous Si region was removed in 2 minutes. A single crystal Si substrate was obtained in which at least one hole penetrated to the back surface was partially formed.
The wall of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the mask pattern, and the size is limited only to the size of the substrate used.

A high resistance epitaxial Si film was used for the mask of this embodiment, but similar results were obtained with other materials, such as a coating layer, a deposited film or an epitaxial film having a high resistance and a high resistance to hydrofluoric nitric acid acetic acid. .. At this time, the mask may be peeled off after the anodization. (Embodiment 2) High resistance epitaxial Si layers are formed on both surfaces of a 200 μm thick low resistance single crystal Si substrate under reduced pressure CVD (Chemical Vapor Deposition: Chemical Vapor Depo).
The film thickness was 0.5 μm. The growth conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1 × 10 ⁻² Torr Growth rate: 3.3 nm / sec After that, a resist is patterned on the epitaxial Si layer by a lithography technique to form epitaxial Si.
RIE (Reactive Ion Etching: React) is performed until the low resistance single crystal Si substrate is exposed in the region where the layer is exposed.
It was etched by the iv lon Etching method. At this time, at least one exposed low resistance region was present on each surface. Further, the exposed low resistance region was arranged at the same position on the front and back surfaces in the plane. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 1.6 (hours) Thickness of porous Si: 200 (μm) Porosity: 56 (%) The portion without a mask from the front surface to the back surface was made porous.
The substrate was infiltrated with a 7M NaOH solution. As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Ordinary single crystal Si
Since the etching rate for the 7M NaOH solution was about 1 μm per minute, the 200 μm thick porous Si region was removed in 2 minutes. A single crystal Si substrate was obtained in which at least one hole penetrated to the back surface was partially formed. The wall of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the mask pattern, and the size is limited only to the size of the substrate used.

A high resistance epitaxial Si film was used for the mask of this example, but similar results were obtained with other materials such as a coating layer deposition film or an epitaxial film having a high resistance and a high resistance to a 7M NaOH solution. At this time, the mask may be peeled off after the anodization. (Embodiment 3) A high resistance epitaxial Si layer is formed on both surfaces of a low resistance single crystal Si substrate having a thickness of 200 μm by LPE (Liquid Phase Epitaxy).
It was formed to 3 μm by the y) method. The growth conditions are as follows.

Solvent: Sn Growth temperature: 900 ° C. Growth atmosphere: H ₂ Growth time: 30 min After that, a resist is patterned on the epitaxial Si layer by a lithography technique to form an epitaxial Si layer.
RIE (Reactive Ion Etching: React) is performed until the low resistance single crystal Si substrate is exposed in the region where the layer is exposed.
It was etched by the iv lon Etching method. At this time, at least one exposed low resistance region was present on each surface. Further, the exposed low resistance region was arranged at the same position on the front and back surfaces in the plane. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 1.6 (hours) Thickness of porous Si: 200 (μm) Porosity: 56 (%) The portion without a mask from the front surface to the back surface was made porous.
The substrate was infiltrated with a 6M KOH solution. As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. The etching rate for a typical 6M KOH solution of single crystal Si is about 1μ / min.
Since it is about a little less than m, the 200 μm thick porous Si region was removed in 2 minutes. A single crystal Si substrate was obtained in which at least one hole penetrated to the back surface was partially formed. The wall of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the mask pattern, and the size is limited only to the size of the substrate used.

Although the high resistance epitaxial Si film is used for the mask of this embodiment, the same result can be obtained with another material such as a coating layer, a deposited film or an epitaxial film having a high resistance and a high resistance to a 6MKOH solution. It was At this time, the mask may be peeled off after the anodization. Example 4 A high resistance epitaxial Si layer having a thickness of 0.5 μm was formed on both surfaces of a low resistance single crystal Si substrate having a thickness of 200 μm by a bias sputtering method. The growth conditions are as follows.

RF frequency: 100 MHz High frequency power: 600 W Ar gas pressure: 8 × 10 ⁻³ Torr DC bias: −200 V Substrate DC bias: +5 V Temperature: 300 ° C. Growth time: 60 min After that, a resist was formed on the epitaxial Si layer by a lithography technique. Patterned to form epitaxial Si
RIE (Reactive Ion Etching: React) is performed until the low resistance single crystal Si substrate is exposed in the region where the layer is exposed.
It was etched by the iv lon Etching method. At this time, at least one exposed low resistance region was present on each surface. Further, the exposed low resistance region was arranged at the same position on the front and back surfaces in the plane. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 1.6 (hours) Thickness of porous Si: 200 (μm) Porosity: 56 (%) The portion without a mask from the front surface to the back surface was made porous.
The substrate was infiltrated with a fluoronitric acid acetic acid (1: 3: 8) solution.
As described above, the etching rate of porous Si is single crystal S
The etching rate of i is increased by about 100 times. Since the etching rate for a normal single crystal Si solution of fluoronitric acid acetic acid (1: 3: 8) is about 1 μm / minute or less, 2
The 00 μm thick porous Si region was removed in 2 minutes. A single crystal Si substrate was obtained in which at least one hole penetrated to the back surface was partially formed. The wall of this hole is
It was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the mask pattern, and the size is limited only to the size of the substrate used.

Although the mask of this embodiment uses a high-resistance epitaxial Si film, the same result can be obtained with another material such as a coating layer, a deposited film or an epitaxial film having a high resistance and a high resistance to a hydrofluoric nitric acid solution. It was At this time, the mask may be peeled off after the anodization. Example 5 Apiezon wax was partially coated on both surfaces of a 200 μm thick low resistance single crystal Si substrate. At this time, at least one exposed low resistance region was present on each surface. Further, the exposed low resistance region was arranged at the same position on the front and back surfaces in the plane. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 1.6 (hours) Thickness of porous Si: 200 (μm) Porosity: 56 (%) The portion without a mask from the front surface to the back surface was made porous.
The substrate was infiltrated with a fluoronitric acid acetic acid (1: 3: 8) solution.
As described above, the etching rate of porous Si is single crystal S
The etching rate of i is increased by about 100 times. Since the etching rate for a normal single crystal Si solution of fluoronitric acid acetic acid (1: 3: 8) is about 1 μm / minute or less, 2
The 00 μm thick porous Si region was removed in 2 minutes. A single crystal Si substrate was obtained in which at least one hole penetrated to the back surface was partially formed. The wall of this hole is
It was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the mask pattern, and the size is limited only to the size of the substrate used.

Although the mask of this example uses apiazone wax, similar results were obtained with other materials, such as a coating layer, a deposited film or an epitaxial film having high resistance and high resistance to hydrofluoric nitric acid acetic acid. .. At this time, if after anodization,
The mask may be peeled off. (Embodiment 6) 1 μm polyimide was applied as a mask on both surfaces of a 200 μm thick low resistance single crystal Si substrate to form a mask. At this time, there was at least one exposed Si region on each surface. Also, exposed Si
The regions were arranged offset on the front and back surfaces. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 1.6 (hours) Thickness of porous Si: 200 (μm) Porosity: 56 (%) The portion without a mask from the front surface to the back surface was made porous.
After removing the polyimide of the mask, the substrate was soaked in a fluoronitric acid acetic acid (1: 3: 8) solution. As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. The etching rate for an ordinary solution of single crystal Si in fluorinated nitric acid (1: 3: 8) is
Since it was about 1 μm / minute or less, the 200 μm thick porous Si region was removed in 2 minutes. A hole that penetrates to the back side,
Single crystal Si partially formed in at least one place
A substrate was obtained. The wall surface of this hole was inclined with respect to the surface by the amount of deviation of the opening of the mask. Here, the shape and size of the opening of the hole are determined only by the mask pattern, and the size is limited only to the size of the substrate used.

Although polyimide was used for the mask of this example, similar results were obtained with other materials, such as a coating layer, a deposited film or an epitaxial film having a high resistance and a high resistance to fluoronitric acid acetic acid. At this time, the mask may be peeled off after the anodization. (Embodiment 7) A high resistance epitaxial Si layer is provided on one surface of a 200 μm thick low resistance single crystal Si substrate by MBE (Molecular Beam Epitaxy).
It was formed to a thickness of 0.5 μm by the xy) method. The growth conditions are as follows.

Temperature: 700 ° C. Pressure: 1 × 10 ⁻⁹ Torr Growth rate: 0.1 nm / sec After that, a resist is patterned on the epitaxial Si layer by a lithography technique to form an epitaxial Si layer.
RIE (Reactive Ion Etching: React) is performed until the low resistance single crystal Si substrate is exposed in the region where the layer is exposed.
It was etched by the iv lon Etching method. At this time, at least one exposed low resistance region was present on each surface. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 1.6 (hours) Thickness of porous Si: 200 (μm) Porosity: 56 (%) Porous was made from the front surface to the back surface through a portion without a mask. The substrate was infiltrated with a fluoronitric acid acetic acid (1: 3: 8) solution. As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Since the etching rate of a normal single-crystal Si solution to a fluoronitric acid acetic acid (1: 3: 8) solution was about 1 μm / min, a 200 μm-thick porous Si region was removed in 2 minutes. A single crystal Si substrate was obtained in which at least one hole penetrated to the back surface was partially formed. Here, the shape and size of the opening of the hole are determined only by the mask pattern, and the size is limited only to the size of the substrate used.

Although the mask of this embodiment uses a high resistance epitaxial Si film, the same result can be obtained by using a coating layer, a deposited film or an epitaxial film made of another material, which has a high resistance and a high resistance to fluoronitric acid acetic acid. It was At this time, the mask may be peeled off after the anodization. (Embodiment 8) 200 μm thick P-type low resistance (1 × 10 ¹⁹ c
m ^-3 ) A high resistance region was formed on both surfaces of the single crystal Si substrate by masking with a resist and ion-implanting the opening, followed by heat treatment. The implantation and heat treatment conditions were as follows.

Ion species: P ⁺ energy: 120 keV Implantation amount: 2 × 10 ¹⁴ cm ^-2 Heat treatment: 900 ° C., 30 min At this time, at least one or more low-resistance regions not ion-implanted exist on each surface. It was Further, the low resistance region was arranged in the same position on the front and back surfaces. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 1.6 (hours) Porous Si thickness: 200 (μm) Porosity: 56 (%) From the front surface to the back surface, the portion not ion-implanted was made porous. The substrate was infiltrated with a fluoronitric acid acetic acid (1: 3: 8) solution. As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Since the etching rate of a normal single-crystal Si solution to a fluoronitric acid acetic acid (1: 3: 8) solution was about 1 μm / min, a 200 μm-thick porous Si region was removed in 2 minutes. There is at least one hole that penetrates to the back side,
A partially formed single crystal Si substrate was obtained. The wall of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used.

Although the ion implantation method was used for forming the high resistance region in the present embodiment, similar results were obtained by the diffusion method. (Example 9) 200 μm thick P-type low resistance (2 × 10 ¹⁷ c
m ^-3 ) A high resistance region was formed on both surfaces of the single crystal Si substrate by masking with a resist and ion-implanting the opening, followed by heat treatment. The implantation and heat treatment conditions were as follows.

Ion species: H ⁺ energy: 100 keV Implantation amount: 2 × 10 ¹⁵ cm ⁻² Heat treatment: 500 ° C., 30 min At this time, at least one or more low-resistance regions not ion-implanted exist on each surface. It was Further, the low resistance region was arranged in the same position on the front and back surfaces. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 1.6 (hours) Porous Si thickness: 200 (μm) Porosity: 56 (%) From the front surface to the back surface, the portion not ion-implanted was made porous. The substrate was infiltrated with a 7M NaOH solution. As described above, the etching rate of porous Si is single crystal Si.
The etching speed is increased about 100 times. Since the etching rate of a normal single crystal Si with 7M NaOH solution is about 1 μm / min or less, a 200 μm thick porous Si region was removed in 2 minutes. A single crystal Si substrate was obtained in which at least one hole penetrated to the back surface was partially formed. The wall of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used.

Although the ion implantation method was used for forming the high resistance region in the present embodiment, similar results were obtained by the diffusion method. (Example 10) 200 μm thick N-type low resistance (1 × 10 ¹⁹
cm ⁻³ ) A single-crystal Si substrate was masked with a resist on both sides thereof, and its opening was ion-implanted, followed by heat treatment to form a high resistance region. The implantation and heat treatment conditions were as follows.

Ion species: B ⁺ energy: 150 keV Implantation amount: 4 × 10 ¹⁴ cm ^-2 Heat treatment: 900 ° C., 30 min At this time, at least one low resistance region not ion-implanted exists on each surface. It was Further, the low resistance region was arranged in the same position on the front and back surfaces. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 1.6 (hours) Porous Si thickness: 200 (μm) Porosity: 56 (%) From the front surface to the back surface, the portion not ion-implanted was made porous. The substrate was infiltrated with a 6M KOH solution. As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. The etching rate of 6MKOH solution of normal single crystal Si is
Since it was about 1 μm / minute or less, the 200 μm thick porous Si region was removed in 2 minutes. A hole that penetrates to the back side,
Single crystal Si partially formed in at least one place
A substrate was obtained. The wall of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used.

Although the ion implantation method was used for forming the high resistance region in the present embodiment, similar results were obtained by the diffusion method. (Example 11) 200 μm thick P-type low resistance (1 × 10 ¹⁹
cm ⁻³ ) A single-crystal Si substrate was masked with a resist on both sides thereof, and its opening was ion-implanted, followed by heat treatment to form a high resistance region. The implantation and heat treatment conditions were as follows.

Ion species: P ⁺ energy: 120 keV Implantation amount: 2 × 10 ¹⁴ cm ^-2 Heat treatment: 900 ° C., 30 min At this time, at least one or more low-resistance regions not ion-implanted exist on each surface. It was Further, the low resistance region was arranged in the same position on the front and back surfaces. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 1.6 (hours) Porous Si thickness: 200 (μm) Porosity: 56 (%) From the front surface to the back surface, the portion not ion-implanted was made porous. The substrate was infiltrated with a fluoronitric acid acetic acid (1: 3: 8) solution. As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Since the etching rate of a normal single-crystal Si solution to a fluoronitric acid acetic acid (1: 3: 8) solution was about 1 μm / min, a 200 μm-thick porous Si region was removed in 2 minutes. There is at least one hole that penetrates to the back side,
A partially formed single crystal Si substrate was obtained. The wall of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used.

Although the ion implantation method was used for forming the high resistance region in this example, similar results were obtained by the diffusion method. (Example 12) 200 μm thick P-type low resistance (1 × 10 ¹⁹
cm ⁻³ ) A single-crystal Si substrate was masked with a resist on both sides thereof, and its opening was ion-implanted, followed by heat treatment to form a high resistance region. The implantation and heat treatment conditions were as follows.

Ion species: P ⁺ energy: 120 keV Implantation amount: 2 × 10 ¹⁴ cm ^-2 Heat treatment: 900 ° C., 30 min At this time, at least one low resistance region not ion-implanted exists on each surface. It was Further, the low resistance regions are arranged so as to be offset on the front surface and the back surface. This formed a mask for leaving the non-porous Si region in the subsequent anodization. Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 1.6 (hours) Porous Si thickness: 200 (μm) Porosity: 56 (%) From the front surface to the back surface, the portion not ion-implanted was made porous. The substrate was infiltrated with a fluoronitric acid acetic acid (1: 3: 8) solution. As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Since the etching rate of a normal single-crystal Si solution to a fluoronitric acid acetic acid (1: 3: 8) solution was about 1 μm / min, a 200 μm-thick porous Si region was removed in 2 minutes. There is at least one hole that penetrates to the back side,
A partially formed single crystal Si substrate was obtained. The wall surface of this hole was inclined with respect to the surface by the amount of deviation of the opening of the mask. Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used.

Although the ion implantation method was used for forming the high resistance region in this example, similar results were obtained by the diffusion method. (Example 13) 200 μm thick P-type low resistance (1 × 10 ¹⁹
A mask was formed on one surface of the cm ⁻³ ) single crystal Si substrate with a resist, the opening was ion-implanted, and the heat treatment was performed thereafter to form a high resistance region. The implantation and heat treatment conditions were as follows.

Ion species: P ⁺ energy: 120 keV Implantation amount: 2 × 10 ¹⁴ cm ^-2 Heat treatment: 900 ° C., 30 min At this time, at least one low resistance region not ion-implanted exists on each surface. It was by this,
The next anodization formed a mask to leave the non-porous Si regions.

Anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 15 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 2.6 (hours) Thickness of porous Si: 200 (μm) Porosity: 56 (%) Porous was conducted from the front surface to the back surface through a portion not ion-implanted. This substrate was treated with fluoronitric acid acetic acid (1: 3: 8)
The solution was infiltrated. As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Ordinary single-crystal Si fluorinated nitric acid (1: 3:
8) Since the etching rate with respect to the solution was about 1 μm / min or less, the 200 μm-thick porous Si region was removed in 2 minutes. A single crystal Si substrate was obtained in which at least one hole penetrated to the back surface was partially formed.
Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used.

Although the ion implantation method was used for forming the high resistance region in this example, similar results were obtained by the diffusion method.

[0106]

As described in detail above, according to the present invention,
The non-porous Si substrate is processed by highly accurately and uniformly etching the porous Si region partially provided in one or more places in the non-porous Si substrate to form the non-porous Si in any shape and in any size. Now, it is possible to make a hole that penetrates from the front surface to the back surface.

Since the porous Si used in the present invention is formed along the current flow during anodization, it is possible to control the current flow by providing a mask or an impurity distribution, and it is possible to control the flow rate to almost any value. It is possible to process the non-porous Si into the shape of.

Further, according to the present invention, the non-porous Si substrate is partially transformed into porous Si at one or more locations, and the etching is performed very efficiently and highly accurately by chemical etching without using an etching preventive film. It is possible to remove the porous Si region and form a region partially penetrating to the back surface at one or more places in the non-porous Si substrate.

Furthermore, according to the present invention, a light transmissive substrate,
Also, it becomes possible to produce an article applicable to micromachining and the like.

[Brief description of drawings]

FIG. 1 is a sectional view of a basic process of a first embodiment example of the present invention.

FIG. 2 is a sectional view showing a basic step of a second embodiment of the present invention.

FIG. 3 is a sectional view showing a basic step of the third embodiment of the present invention.

FIG. 4 is a sectional view showing a basic step in a fourth embodiment of the present invention.

[Explanation of symbols]

 11 non-porous Si substrate 12 mask 13 porous Si region 21 non-porous Si substrate 22 mask 23 porous Si region 31 low resistance non-porous Si substrate 32 high resistance Si region 33 porous Si region 41 low resistance non-porous Si substrate 42 High resistance Si region 43 Porous Si region

Claims (3)

[Claims] 1. A step of partially making a non-porous Si substrate porous at one or more places from the front surface to the back surface, and the porous S substrate.
and a step of removing the i region by chemical etching. 2. The method for processing a Si substrate according to claim 1, wherein the step of making porous is anodization. 3. The method for processing a Si substrate according to claim 2, wherein the anodization is performed in an HF solution.