JPH0583129A - A/d converter circuit - Google Patents

Abstract

PURPOSE:To simply select a valid output bit by providing a gate means validating/invalidating a prescribed low-order bit of an A/D converter in response to a level of noise included in analog data to the A/D converter. CONSTITUTION:The circuit is provided with an A/D converter 1 converting analog data into digital data and with gate circuits 11, 12 validating/invalidating a prescribed low-order bit of the A/D converter 1 in response to a level of noise included in the analog data. That is, a terminal 10 from which data of a least significant bit are outputted and one terminal of an AND circuit 11 are connected and the other terminal of the AND circuit 11 is connected to a common terminal of a switch SW1. Furthermore, a terminal 9 from which data in a bit adjacently higher from a least significant bit (next least significant bit) is connected to one terminal of the AND circuit 12, and the other terminal of the AND circuit 12 is connected to a common terminal of a switch SW2. Thus, the optimum valid bit is set without trouble.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog / digital conversion circuit for converting analog data into digital data, and in particular, it can be suitably applied to a facsimile machine and an analog image output from an image pickup device equipped with a CCD or the like. The present invention relates to a circuit for converting data into digital image data.

[0002]

2. Description of the Related Art In recent years, with the development of technology for increasing the density of semiconductor integrated circuits, it has become possible to miniaturize equipment having a complicated structure in which various electronic circuits are mounted. As a result, until a decade ago, facsimile machines, which tended to be large in size, are now becoming more common, ranging from compact ones that are integrated with a telephone to general mobile phones to those that are portable. For facsimile machine manufacturers, it is becoming necessary to provide various types of machines. Therefore, a facsimile device having various patterns of substrates depending on the model is provided.

By the way, a CCD is often used as an image sensor in a facsimile machine.
An oscillator that generates a clock is required to operate D. However, this clock has many problems, and depending on the pattern of the substrate, noise caused by the clock may enter the circuit and cause deterioration of S / N. Then, it is difficult to know in advance what kind of pattern the S / N will be improved, and, for the sake of the sake of this, every time, a substrate having the exact same pattern as the pattern which has obtained a good result has been made every time. Can not cope with the development of competitive new products.

Conventionally, in order to reduce the influence of noise caused by a clock, as shown in FIG. 2, the terminals 10 and 9 are grounded so that the LSB of digital image data and the most significant bit in the vicinity thereof are at the ground potential. It was

The analog / digital conversion circuit shown in FIG. 2 will be described in detail. The analog image data a input to the terminal 2 of the analog / digital converter (hereinafter referred to as A / D converter) 1 is A / D converted. The digital image data is converted from analog to digital by the device 1 and the converted digital image data is output from terminals 5 to 10 as 6-bit data. The terminal 5 is an MSB terminal and the terminal 10 is an LSB terminal.

A level + is applied to terminals 3 and 4 of the A / D converter 1.
The voltages of Vr and -Vr are applied. These are reference levels when converting analog image data into digital image data.

In the circuit of FIG. 2, terminals 9 and 10 are grounded. The reason for such a configuration is to reduce the influence of noise included in the analog image data a, as described above. That is, the noise included in the data a affects the values of the LSB of the digital image data and the most significant bits (bits on the terminals 10 and 9) immediately adjacent to the LSB,
This is because a problem occurs in data processing.

In such a circuit configuration, the number of bits of the digital data output from the A / D converter 1 is 6, but the number of effective bits is 4, for example, level + V.
“1111” is output for the analog image data a of r, and “0000” is output for the data a of level −Vr.

[0009]

However, in the circuit configuration of FIG. 2, the terminals 9 and 10 are grounded, and regardless of the level of noise contained in the analog image data a, 2 bits are always invalid and the noise level is The resolution could not be improved even when the value was low.

The present invention has been made in view of such circumstances, and an object thereof is to improve the resolution of digital image data when the level of noise included in the analog image data is low. On the contrary, when the noise level is high, it is to obtain an analog / digital conversion circuit in which the effective output bit can be selected by a simple operation so as to reduce the adverse effect of noise.

[0011]

In order to achieve the above object, the present invention provides an analog / digital converter for converting analog data into digital data, and the analog / digital converter is provided in accordance with the level of noise contained in the analog data. -It is provided with gate means for enabling / disabling a predetermined lower bit of the digital converter.

[0012]

In the present invention, when the noise level included in the analog data is high, the predetermined lower bit is invalid, and when the noise level is low, the lower bit is valid. As a result, the resolution of the converted digital data is increased when the noise included in the analog data is at a low level, and the S / N deterioration of the converted digital data is reduced when the noise is at a high level.

[0013]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a circuit diagram showing an embodiment of an analog / digital conversion circuit according to the present invention. In the figure, the same parts as those shown in FIG. 2 are designated by the same reference numerals, and the description thereof will be omitted.

The circuit of FIG. 1 is applied to, for example, a facsimile apparatus, and analog image data a from an image sensor is converted into digital image data b by an A / D converter 1. The digital image data b is sent to the digital transmission line after undergoing a predetermined process (for example, modulation).

In the circuit of FIG. 1, the terminal 10 for outputting the least significant bit data and one terminal of the AND circuit 11 are connected, and the other terminal of the AND circuit 11 is connected to the common terminal of the switch SW1. Has been done. The potential of "1" or "0" appears at the common terminal of the switch SW1 depending on the switching position of the switch SW1.

The terminal 9 from which the data of the most significant bit of the least significant bit (hereinafter referred to as the next least significant bit) is output is connected to one terminal of the AND circuit 12, and the other terminal of the AND circuit 12 has the switch SW2. It is connected to the common terminal of. The common terminal of the switch SW2 is "1" or "0" depending on the switching position of the switch SW2.
It is configured such that the potential of appears.

Next, how to determine the number of bits of the digital data b output from the A / D converter 1 will be described. The number of bits is determined in the analog / digital conversion circuit according to the level of noise included in the analog image data a. The level of this noise is substantially determined by the pattern of the printed circuit board on which the circuit including the circuit of FIG. 1 is formed, and this level is obtained by measuring at the final stage of device development. Therefore, the analog-digital conversion circuits on the printed circuit board having the same pattern are set to the same number of bits (the same resolution) and completed as a product.

When the noise level thus obtained is a value that allows digital data of 5 bits, "0" and "1" are set to the common terminals of the switches SW1 and SW2, respectively. As a result, the least significant bit (LSB)
However, the data of the next least significant bit is valid, and the resolution of the data is doubled as compared with the conventional method. It should be noted that the common terminals of the switches SW1 and SW2 are not set to 1,0. This is because, in this state, the least significant bit is valid, but the next least significant bit, which is the upper bit, is invalid, resulting in an irrational state. If such a setting is made, "0" or "0" can be output via an appropriate logic circuit, or an LED or the like can be turned on to notify the state.

Further, when the noise level obtained by the measurement is a value which allows only the digital data having the number of bits of 4, 0,0 is set to the common terminal of the switches SW1 and SW2, and the terminals 9 and 10 are set. Since both bits are invalid and the number of effective bits is 4, the resolution is the same as the conventional one. When the noise level obtained by the measurement is a value that allows digital data having 6 bits, the common terminals of the switches SW1 and SW2 are set to 1
Since 1 is set and the bits of the terminals 9 and 10 are both valid, the data resolution can be improved four times as compared with the conventional case.

In FIG. 1, AND circuits 11, 1
The voltage of 0 or 1 is applied to the other terminal of 2 by the switches SW1 and SW2.
A register or the like corresponding to the switch may be provided, and the output state of this register may be set by another switch or a jumper wire, or a voltage of 1 or 0 level (for example, 5V or 0V) is generated. You may make it connect a part and the other terminal of the AND circuits 11 and 12 directly.

[0021]

As described in detail above, according to the present invention, the resolution of digital image data is increased when the level of noise included in analog image data is low, and conversely,
When the noise level is high, it is possible to obtain an analog / digital conversion circuit in which the effective output bit can be selected by a simple operation so as to reduce the adverse effect of noise. Therefore, in developing a device such as a facsimile, it is possible to set the optimum effective bit without any trouble in consideration of the noise level included in the analog image data at the final stage of the development.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of an analog / digital conversion circuit according to the present invention.

FIG. 2 is a circuit diagram showing a conventional analog-digital conversion circuit.

[Explanation of symbols]

 1 A / D converter 11 AND gate 12 AND gate SW1 switch SW2 switch

Claims (1)

[Claims] 1. An analog / digital converter for converting analog data into digital data is provided, and a predetermined lower bit of the analog / digital converter is made valid or invalid according to the level of noise included in the analog data. An analog-to-digital conversion circuit having a gate means.