JPH0583036A - Noise signal generator - Google Patents

Abstract

PURPOSE:To make the generator small and to reduce the cost by decreasing the circuit scale and to facilitate the fine-adjustment of a noise signal power and a frequency characteristic. CONSTITUTION:A filter circuit 3 gives a white frequency characteristic to a white noise signal generated from a white noise signal generator 2. The frequency characteristic in this case is decided by an external filter characteristic adjustment signal 104. The white noise signal is multiplied with a power multiple coefficient 106 outputted from a coefficient selection circuit 6 by a multiplier 4 and a power is given and a noise signal 107 is obtained. The noise signal 107 is inputted once to a latch circuit 5, here the signal is latched. The latch circuit 5 latches various noise signals whose power and frequency characteristic differ and a required noise signal is selected among them by a noise signal selection signal 105 and outputted to any designated terminal among output terminals 51, 52, 53.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to a noise signal generator,
Especially, DSI (Digital Spece) of high efficiency transmission equipment
h Interpolation) and the like for a noise signal generator used as background noise.

[0002]

2. Description of the Related Art Conventionally, this type of noise signal generator is used as a noise signal generator in a DSI device known as a high-efficiency transmission device, which is inserted into a line as background noise in order to eliminate discomfort during a call. It is used, and it is necessary to adjust the power value and frequency characteristics of noise according to the characteristics of the line. Therefore, the circuit configuration shown in FIG. 2 is used.

FIG. 2 is a block diagram showing a circuit configuration of a conventional example. Timing signal 20 by an instruction signal from the outside
The timing circuit 11 that outputs 1 and a plurality of noise signal generators 21, 22, and 23
Any of the noise signals 202, 203 and 204 designated by 01 is output to any of the output terminals 31, 32 and 33. The noise signals 202, 203, and 204 have different noise power values and frequency characteristics, and the required noise signal is selected by the timing signal 201 and output to the designated output terminal. The output noise signal is used by being inserted into the reception output of the DSI device.

[0004]

As described above, in the conventional example, since a noise signal generator is required for each noise signal, the device becomes large and the cost becomes high. Further, since the noise signal generator is independent, it is difficult to finely adjust the power value of the noise signal by an external signal.

[0005]

A noise signal generator of the present invention generates a white noise signal, and a timing circuit for inputting an instruction signal from the outside and outputting a first timing signal and a second timing signal. Then, a white noise signal generator that outputs the white noise signal in synchronization with the first timing signal and a filter characteristic selection signal that receives the white noise signal and is externally input are designated as the white noise signal. A filter circuit for giving frequency characteristics, and a coefficient for inputting a plurality of power value signals and a power adjustment signal input from the outside and outputting a power value multiplication coefficient and a noise signal selection signal in synchronization with the second timing signal. The selection circuit, a multiplier for inputting the output signal of the filter circuit and the power value multiplication coefficient to perform multiplication, and a noise signal for temporarily holding a noise signal output by the multiplier. And a holding circuit for outputting an output terminal designated the noise signal held in the No. 択信.

[0006]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the circuit configuration of this embodiment. Timing circuit 1 by external instruction signal
Is a first timing signal 1 for timing and outputting the white noise signal generated by the white noise signal generator 2.
01 and the noise signal selection signal 1 output from the coefficient selection circuit 6
05 and power value multiplication coefficient 10 for determining the power value of the noise signal
And a second timing signal 102 for outputting 6 and 6 with timing.

The white noise signal output from the white noise signal generator 2 is white noise having a flat frequency characteristic which serves as a reference for each noise signal output from the noise signal generator. The noise signals handled here are all digital signals. The filter circuit 3 inputs this white noise signal and gives a frequency characteristic.
The frequency characteristic at this time is determined by the filter characteristic adjustment signal 104 from the outside. The white noise signal given the frequency characteristic is multiplied by the power value multiplication coefficient 106 output from the coefficient selection circuit 6 by the multiplier 4, and the power value is given to become the noise signal 107. The noise signal 107 is once input to the holding circuit 5 and held there.

The coefficient selection circuit 6 inputs a plurality of power value signals 111, 112, 113 from the outside and a power adjustment signal 103 for fine adjustment, and synchronizes with the second timing signal 102 to select a noise signal selection signal. 105 and power value multiplication coefficient 106
And output. Each noise signal having a different power value and frequency characteristic is held in the holding circuit 5, and the required noise signal is selected from them by the noise signal selection signal 105, and any one of the output terminals 51, 52, 53 is designated. Output to the terminal.

The filter circuit 3 is, for example, FIR (F
inite Impulse Response) and IIR (Infinite Impulse Res)
If a digital filter is used, the required frequency characteristic can be obtained only by changing the filter coefficient by the filter characteristic adjustment signal 104. In addition, the white noise signal generator is a DSP (Digital Signal Pros).
It is easily realized by using an embedded ROM (Read Only Memory) as a reference noise generator and an internal multiplier as a multiplier.

[0010]

As described above, the present invention does not require a plurality of independent noise signal generators for each required noise signal, so that the circuit scale can be reduced. Therefore, the device can be downsized and the cost can be reduced. Furthermore, there is an effect that the power value and frequency characteristic of the noise signal can be easily adjusted by an external power adjustment signal or filter characteristic adjustment signal.

[Brief description of drawings]

FIG. 1 is a block diagram showing a circuit configuration of this embodiment.

FIG. 2 is a block diagram showing a circuit configuration of a conventional example.

[Explanation of symbols]

 1 Timing Circuit 2 White Noise Signal Generator 3 Filter Circuit 4 Multiplier 5 Holding Circuit 6 Coefficient Selection Circuit

Claims (1)

[Claims] 1. A timing circuit for inputting an instruction signal from the outside to output a first timing signal and a second timing signal, and a white noise signal for generating the white noise signal in synchronization with the first timing signal. A white noise signal generator for outputting a noise signal, a filter circuit for inputting the white noise signal and giving a frequency characteristic designated to the white noise signal by a filter characteristic selection signal input from the outside, and an external input A coefficient selection circuit that inputs a plurality of power value signals and a power adjustment signal and outputs a power value multiplication coefficient and a noise signal selection signal in synchronization with the second timing signal, an output signal of the filter circuit, and the power A multiplier for inputting a value multiplication coefficient and multiplication, and a noise signal output from the multiplier is temporarily held and the noise signal held by the noise signal selection signal is designated. And a holding circuit for outputting the noise signal to the output terminal.