JPH0582677A - Hybrid integrated circuit - Google Patents

Abstract

PURPOSE:To prevent the disconnection of a wire connecting an element and a conductor due to stress developed during heating and cooling cycles. CONSTITUTION:The surface of a chip-shaped circuit element 4 mounted on a substrate 1 is exclusively covered with a resin thin-film 6 having a low which approxiomates to the thermal expansion coefficient of the element 4, and a neck portion 5B of a wire 5 on the substrate 1 is covered with a resin having a thermal expansion coefficient which is approximately the same as alpha of the substrate 1.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION This invention relates to hybrid integrated circuits,
In particular, it relates to a bare chip mounting type hybrid integrated circuit.

[0002]

2. Description of the Related Art In a general hybrid integrated circuit, a plurality of circuit elements such as transistors, chip resistors, and chip capacitors are fixed on a conductive path made of copper material formed on a metal substrate such as ceramics or aluminum. Thus, a hybrid integrated circuit having a desired function is formed. Also, with the high-density mounting, a wide variety of hybrid integrated circuits in which bare chips such as LSI and VLSI are mounted on a substrate have appeared.

When the above-mentioned bare chip such as LSI or VLSI is mounted on an aluminum substrate, as shown in FIG. 5, a bare chip (21), an electrode on the bare chip surface, and a conductive path (22) are provided in order to ensure reliability against humidity. For connecting the wire wire (23) such as Al to the epoxy resin (24)
Cover with. Since the coefficient of thermal expansion of the epoxy resin is adjusted to be substantially the same as the coefficient of thermal expansion of the substrate, the adhesion between the substrate and the epoxy resin is good, moisture does not easily enter, and the moisture resistance reliability is high. improves. The applicant has already applied for matching the thermal expansion coefficients of both the epoxy resin and the substrate (see Japanese Patent Application No. 3-118812).

[0004]

As described above, by matching the coefficient of thermal expansion of the epoxy resin and the coefficient of thermal expansion of the substrate, the adhesion between the two is improved, but the coefficient of thermal expansion between the epoxy resin and the bare chip is improved. The difference in temperature is remarkably different, and due to temperature change (temperature cycle), stress is repeatedly applied to the bonding part between the sealant and the bare chip, causing a defect such as a neck break in the wire bonding part on the bare chip surface or peeling from the electrode. I have a problem to do.

According to an experiment conducted by the present inventor, such defects are
It was found that the interface between the chip surface and the encapsulant was peeled off around the corner of the bare chip and where the wire disconnection failure occurred. This is because the maximum stress is applied to the corner portion by repeating the cooling / heating cycle. Therefore, it is considered that peeling occurs at the corner portion, strain in the shearing direction which is suppressed by the adhesive force is applied to the wire bonding portion, and the wire is broken.

This will be described with reference to FIGS. 6A and 6B. In A of FIG. 6, stress in the shearing direction is applied due to the difference in thermal expansion coefficient between the epoxy resin and the chip due to thermal shock, but since the epoxy resin is bonded to the chip, movement in the shearing direction is suppressed. is doing. On the other hand,
FIG. 6B shows that the epoxy resin peels off at the corners of the chip where the maximum stress is applied (shaded areas) due to repeated thermal shocks, and strain in the shearing direction is applied to the wire bonding portion, eventually leading to disconnection. Is.

Further, FIG. 7 shows the results of a wire disconnection failure experiment conducted with different chip sizes. As experimental conditions, a bare chip was fixedly mounted on a copper foil formed on an aluminum substrate via an Ag paste, the bare chip and the copper foil were bonded with an Al wire wire, and the bare chip and the wire wire were sealed with an epoxy resin. -5
A thermal shock test was performed at 5 ° C / 5 min to 150 ° C / 5 min (liquid phase). In FIG. 7, (A) has a chip size of 5.47 × 8.05, and (B) has a chip size of 5.16.
× 6.2, and 10 chips were used for each.

As can be seen from FIG. 7, a small chip size (B) has a defect at 2000 cycles, and a large chip size (A) has a defect at 500 cycles. If the chip size is small to a certain extent, the occurrence rate of wire curve defects is low even at 2000 cycles, so that it can be used as a vehicle-mounted hybrid integrated circuit under severe environmental conditions.

However, it has been confirmed that a chip having a relatively large chip size fails in 500 cycles and cannot be mounted as a hybrid integrated circuit for use in a vehicle under severe environmental conditions as described above.

[0010]

The present invention has been made to solve the above-mentioned problems, and is fixed on a metal substrate on which a conductive path having a desired shape is formed and a pad at a predetermined position of the conductive path. A chip-shaped circuit element, a plurality of wire lines connecting the plurality of conductive paths extending in the vicinity of the circuit element and electrodes of the circuit element, and the circuit element and the wire line are hermetically sealed. The sealing resin layer is made of a silicon-based resin, an insulating resin thin film having a low thermal expansion coefficient is formed only on the upper surface of the circuit element, and the wire wire and the conductive path are The connection part to be connected is coated with a resin having a coefficient of thermal expansion substantially similar to the coefficient of thermal expansion of the substrate.

Further, in such a hybrid integrated circuit,
The insulating resin film is characterized by using a solvent-based phenolic epoxy resin. Further, in such a hybrid integrated circuit, the wire wire is an aluminum wire. Further, in such a hybrid integrated circuit, an aluminum substrate is used as the metal substrate.

[0012]

As described above, in the hybrid integrated circuit of the present invention, since the insulating resin film having a low coefficient of thermal expansion is formed on the chip-shaped circuit element, the coefficient of thermal expansion between the insulating resin film and the chip-shaped element is reduced. The difference is significantly reduced. As a result, peeling due to temperature change (cooling / heating cycle) at the interface between the insulating resin film and the chip-shaped element is suppressed. Further, since the neck portion of the wire wire connected to the electrode on the chip element is reinforced by the insulating resin film, even if shearing force due to the cooling / heating cycle is generated in the neck portion of the wire wire on the rotating element side, it is disconnected. There is no fear.

Further, since the neck portion of the wire wire connected to the conductive path is covered with a resin having a value substantially similar to the coefficient of thermal expansion of the board, the neck of the wire wire on the board side during the thermal cycle. There is no disconnection in any part.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A hybrid integrated circuit according to the present invention will be described below based on the embodiments shown in FIGS. FIG. 1 is an enlarged cross-sectional view of a main part of a hybrid integrated circuit of the present invention. (1) is a hard substrate, (2) is an insulating resin layer, (3) is a conductive path, (4) is a chip-shaped circuit element, (5) is a wire wire, (6) is an insulating resin thin film, (7) is a silicon resin layer, and (9) is a coating resin.

As the hard substrate (1), a metal substrate such as an aluminum substrate is used. An aluminum oxide film is formed on the surface of such an aluminum substrate by a known anodic oxidation technique. A conductive path (3) having a desired shape is formed on one main surface of the substrate (1) through an insulating resin layer (2) such as an epoxy resin. The conductive path (3) is formed of a copper foil, and for example, a material in which the above-mentioned insulating resin layer (2) and the copper foil are integrated in a clad shape is adhered to the substrate (1) and a predetermined etching is performed. Patterned by technology.

Although not clearly shown in FIG. 1, the conductive path (3) is formed in a region of substantially the entire surface of the substrate (1), and a pad (3A) for fixing a circuit element is formed at a predetermined position. A plurality of conductive paths (3) are formed to extend near the periphery of the pad (3A). Each pad (3A)
A plurality of circuit elements (4) are fixedly mounted on the top. For example, circuit elements such as transistors and chip resistors and LS
A chip-shaped circuit element (4) such as I or VLSI is fixed onto the pad (3A) via an adhesive (8) such as Ag paste. On the other hand, the electrodes and conductive paths (3) on the circuit element (4)
The connection is made with an Al wire wire (5) having a diameter of about 20 to 40 μm and is electrically connected using a connecting means such as ultrasonic bonding.

A feature of the present invention is that an insulating resin thin film (6) having a low coefficient of thermal expansion (hereinafter referred to as a resin thin film) is provided on a chip-shaped circuit element (4), and a conductive path (3) is provided. The neck (5) of the wire (5) connected to
B) is covered with a resin having a coefficient of thermal expansion substantially similar to that of the substrate (1). First, the resin thin film (6) will be described. The thermal expansion coefficient of the resin thin film (6) is set to a value substantially the same as or close to the thermal expansion coefficient of the circuit element (4). That is, since the thermal expansion coefficient of the circuit element (4) is relatively low at about 3 to 4 × 10 ⁻⁶ / ° C., the thermal expansion coefficient of the resin thin film (6) used in the present example is a filler such as silica. It is densely packed and adjusted to about 10 × 10 ^-6 / ° C. Further, since the resin thin film (6) needs to be thinly formed on the circuit element (4) as described above, a solvent-based phenol-curable epoxy resin is used. Solvent-based phenol-curing resin is liquid, so it is about 1
The resin thin film (6) having a film thickness of about 00 μ to 500 μ can be easily formed on the circuit element.

When the resin thin film (6) is formed on the circuit element (4), since the resin is solvent-based as described above,
It can be formed only by potting an appropriate amount of resin corresponding to the size of the circuit element (4) and heat treatment. That is, since the resin thin film (6) is formed on substantially the entire surface of the circuit element (4), the neck portion (5A) of the wire wire (5) is reinforced by the resin thin film (6). Become.

In this embodiment, a solvent-based phenol curable resin is used as the resin material of the resin thin film (6), but an acid anhydride cured epoxy resin or amine cured epoxy resin is used as the other material. You can However, among these, the phenol-based curable resin has the highest moisture resistance, and therefore the phenol-cured system is used in this embodiment.

On the other hand, the thermal expansion coefficient of the coating resin (9) for coating the neck portion (5B) of the wire (5) on the substrate (1) side is substantially the same as the thermal expansion coefficient of the substrate (1) as described above. Has been adjusted to. That is, the coating resin (9) used in the present invention is variously changed by setting it in the cold heat cycle condition. For example, when the thermal cycle condition is in the range of −50 to + 150 ° C., an epoxy resin having a glass transition temperature (TG) of 150 ° C. or higher, which is equal to or higher than the upper limit of the condition, is used, and about 57 wt% of the resin is used. By mixing an inorganic filler (silica or the like), α of the coating resin (9) is changed to α of the substrate (1).
The same can be adjusted to about 25 × 10 ⁻⁶ / ° C.

By the way, the above-mentioned resin is the circuit element (4).
Ensures moisture resistance reliability as it is coated directly on the surface
Highly purified resin is used for
There is. The resin used in this example is an impurity in the cured product.
Very low on concentration (Cl ^-10 ppm, Na⁺2-3
ppm), same as transfer mold resin for LSI
It is highly purified to the level. Therefore, the circuit element
(4) Adhesion is good and it is difficult for moisture to enter, so
High moisture resistance reliability is obtained. In addition, soft error due to α rays
Chip-like circuit elements such as DRAM that easily generate
There is no problem even if you do.

As described above, according to the present invention, by forming the resin thin film (6) having a low coefficient of thermal expansion on the circuit element (4), the circuit element (4) and the resin thin film (6) are formed. Since the coefficient of thermal expansion is matched, the interface between the element (4) and the resin thin film (6) does not peel even during the thermal cycle. Therefore, even if a shearing force is applied to the corner portion of the circuit element (4) under severe thermal cycling conditions, the interface between the circuit element (4) and the resin thin film (6) is not separated as described above, and the wire wire is not removed. Since the neck portion (5A) of (5) is reinforced by the resin thin film (6), the wire wire (5)
The adhesive strength of the wire is increased, and the wire disconnection failure during the heat cycle as in the conventional case can be remarkably suppressed.

Further, since the neck portion (5B) of the wire wire (5) on the side of the substrate (1) is coated with a resin having the same expansion coefficient as that of the substrate (1), the neck portion (5B) is covered with the resin during the heat cycle. Since there is no difference in the coefficient of thermal expansion between the substrate (1) and the coating resin (9), no stress is generated in the neck portion (5B) of the wire wire (5), and the neck portion (5B) is covered with the coating resin (9). ) Will be strongly reinforced.

As a result, by using the present invention, even a relatively large chip-shaped circuit element (4) can be mounted on a hybrid integrated circuit board for use in a harsh environment such as a vehicle. The reliability is confirmed. By the way, FIG. 2 and FIG. 3 are distribution graphs showing the results of the tensile test of the Al wire wire. 2 is performed without coating, and FIG. 3 is performed with the resin thin film (6) formed on the circuit element (4) and the neck portion (5B) covered with the coating resin (9). Is. As the measurement conditions, 10 LSI chips in which 64 Al wires having a diameter of 40 μm were bonded on a copper foil formed on an aluminum substrate were measured. In addition, as shown in FIG. 4, a hook-shaped wire (10) attached to the tip of the tension gauge was hooked on the loop of the Al wire wire (5) and pulled up to read the scale of the gauge when curved. is there.

As shown in FIG. 2, in the uncoated structure, the tensile strength is distributed within the range of 5.4 g to 16.3 g, and the average tensile strength is 12.3 g. Most of the disconnection modes were broken necks in the bonding part on the LSI side. On the other hand, in FIG. 3, the tensile strength is 1
It is distributed within 8.7 g to 27.4 g and has an average tensile strength of 22.0 g. Comparing FIGS. 2 and 3, it can be seen that the distribution range is narrower and the tensile strength is improved in FIG. The disconnection modes shown in FIG. 3 were all fractures at the measurement portion of the wire. Therefore, as described above, the chip-shaped circuit element (4) such as a large DRAM is mounted on the substrate (1).
It can be die-bonded on top and used as a hybrid integrated circuit that is required for environmental conditions and high reliability, such as for a vehicle.

By the way, as described above, the circuit element (4)
After forming the resin thin film (6) thereon, the circuit element (4) and the plurality of wire lines (5) are completely sealed with silicone gel (7) as shown in FIG. The silicone gel (7) prevents corrosion of the wire (5). In addition, since the silicone gel (7) has extremely low elasticity, no stress enough to break the wire wire (5) is generated even when the silicone gel (7) expands and contracts during the heat cycle, so the silicone gel (7) prevents the wire wire (5) from being broken. Will not be disconnected.
Furthermore, the stress due to the difference in the coefficient of thermal expansion between the circuit element (4) and the substrate (1) generated by the thermal cycle is relaxed and absorbed by the loop-shaped portion of the wire (5), so that the stress of the wire (5) is reduced. No problem occurs in the bonding part.

Further, when the silicone gel (7) is applied, the coating resin (9) is formed on the substrate (1) in advance on the neck portion (5B), so that the coating resin (9) stops flowing. It will act as a preventive material.

[0028]

As described above in detail, according to the present invention,
Even if a relatively large chip-shaped circuit element is mounted on a vehicle-mounted hybrid integrated circuit board that requires high environmental conditions and high reliability, the wire that connects the circuit element and the conductor during a thermal cycle is broken. There is nothing to do. As a result, by using the present invention, a highly reliable hybrid integrated circuit can be provided.

Further, as described above, since a large chip-shaped circuit element can be die-bonded, high density packaging of a hybrid integrated circuit which can be used in a harsh environment can be implemented. As a result, it is possible to provide a high-density and extremely miniaturized hybrid integrated circuit.

[Brief description of drawings]

FIG. 1 is an enlarged sectional view of an essential part of a hybrid integrated circuit for explaining the present invention.

FIG. 2 is data from a wire pull test.

FIG. 3 is data of a wire drawing test.

FIG. 4 is a cross-sectional view showing a state of the test of FIGS. 2 and 3.

FIG. 5 is a cross-sectional view showing a conventional hybrid integrated circuit.

FIG. 6 is an explanatory diagram when a thermal shock is applied to the neck portion of the wire wire.

FIG. 7 is a characteristic diagram showing a disconnection defect rate of a wire wire.

[Explanation of symbols]

 (1) Substrate (2) Insulating resin layer (3) Conductive path (4) Circuit element (5) Wire wire (6) Resin thin film (7) Silicone gel (9) Coating resin

Claims (4)

[Claims] 1. A metal substrate on which a conductive path having a desired shape is formed, a chip-shaped circuit element fixed on a pad at a predetermined position of the conductive path, and a plurality of circuit elements extending in the vicinity of the circuit element. A plurality of wire lines that connect the conductive paths and the electrodes of the circuit element are provided, and a sealing resin that hermetically seals the circuit element and the wire line is provided, and a silicone resin is used for the sealing resin layer. An insulating resin film having a low coefficient of thermal expansion is formed only on the upper surface of the circuit element, and a connecting portion where the wire wire and the conductive path are connected has a coefficient of thermal expansion that is substantially approximate to the coefficient of thermal expansion of the substrate. A hybrid integrated circuit, characterized in that it is covered with a resin. 2. The hybrid integrated circuit according to claim 1, wherein the insulating resin film uses a solvent-based phenolic epoxy resin. 3. The hybrid integrated circuit according to claim 1, wherein the wire wire is an aluminum wire. 4. The hybrid integrated circuit according to claim 1, wherein the metal substrate is an aluminum substrate.