JPH0580353A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To provide a liquid crystal display device where the dispersion of parasitic capacity between a picture element electrode and a signal is eliminated, and the deterioration of image quality on a screen is restrained to improve the uniformity. CONSTITUTION:This liquid crystal display device is provided with the signal lines plurally arranged in a row direction, scanning lines 3 plurally arranged in a column direction, a picture element electrode 1 arranged in an area surrounded by a signal line 2 and the scanning line 3, and a thin film transistor 4 which is connected between the electrode 1 and the signal line 2 and whose gate electrode is connected to the scanning line 3. In the liquid crystal display device, respective distances (da) and (db) between the electrode 1 and the two signal lines 2 adjacent to the electrode 1 are made different, and respective electrostatic capacities Cds1 and Cds2 between the electrode 1 and the two signal lines 2 adjacent to the electrode 1 are made equal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device considering the parasitic capacitance between a pixel electrode and a signal line.

[0002]

2. Description of the Related Art In recent years, liquid crystal displays have been actively developed as thin and lightweight display devices. Among them, as a method for realizing high image quality and high definition, research on a liquid crystal display using a thin film transistor array has been made, and it is expected as a display replacing a CRT.

A thin film transistor array used in a liquid crystal display is represented by an equivalent circuit shown in FIG. Only when the scanning line (gate line) is selected, the thin film transistor, which is a switching element, is turned on, and the capacitor (C _LC ) formed by the liquid crystal sandwiched between the pixel electrode and the counter electrode.
And the auxiliary capacitance (C _S ) formed on the array substrate are charged by the voltage of the signal line. When the scanning line is not selected, the pixel potential is held according to the leak currents of C _LC and C _S.

It is known that in the thin film transistor array, the electrostatic capacitance (Cgs) between the pixel electrode and the scanning line, which is a parasitic capacitance, must be taken into consideration. Due to the structure of the thin film transistor array, Cgs is mainly formed by the overlapping portion of the gate electrode and the source electrode. Due to the parasitic capacitance, the pixel potential being held is affected by the potential fluctuation of the scanning line, and a potential change called a through voltage occurs when the pulse of the scanning line falls.

In addition to Cgs, the parasitic capacitance that must be taken into consideration in the thin film transistor array includes the electrostatic capacitance (Cds) between the pixel electrode and the signal line. Cds is mainly formed in a portion where the pixel electrode and the signal line are adjacent to each other due to the array structure. Generally, the pixel electrode 1 is surrounded by two signal lines 2 as shown in FIG. 14, and Cds1 and Cds2 are formed between the signal lines 2 ₁ and 2 ₂ for each pixel electrode 1. To be done. The smaller the distance between the pixel electrode and the signal line, and the longer the adjacent portion, the larger the capacitance becomes, and the capacitance is determined by the shape and material. Further, when the relative positions of the pixel electrode 1 and the signal line 2 change due to the mask misalignment, the respective Cds change. In FIG. 14, 3 is a gate line (scanning line), 4 is a thin film transistor,
Reference numeral 5 indicates an auxiliary capacitance electrode.

Here, the fluctuation ΔV _PX of the pixel potential considering the parasitic capacitance between the pixel electrode and the signal line is expressed by the following equation. ΔV _PX = (Cds1 × ΔVsig 1 + Cds2 + ΔVsig 2) / (C _LC + C _S + Cgs + Cds1 + Cds2)

Therefore, the potential of the pixel electrode changes every time the potential of the signal line changes. The liquid crystal must basically be driven by an alternating current, and the potential of the pixel electrode, that is, the signal line potential must be inverted with respect to the counter electrode. Therefore ΔV
sig becomes maximum when the polarity of the signal line is reversed. The actual variation of the pixel potential changes depending on the driving method as follows.

First, FIG. 15 shows a change in pixel potential when all the signal lines have the same polarity with respect to the counter electrode and the polarities are inverted every frame (frame inversion).
The polarities of the two signal lines forming the electrostatic capacitances Cds1 and Cds2 are inverted in the same direction. In this case, of course, the potential change of the signal line when reversing every frame is the largest, and the time until the signal line is reversed after writing a pixel is different depending on the top and bottom of the screen (signal line direction). There is a difference in voltage, and a difference in brightness appears in the vertical direction. Also Cds1 +
The variation of Cds2 causes a loss of uniformity even in the horizontal direction of the screen.

FIG. 16 shows a change in pixel potential when adjacent signal lines have opposite polarities and the polarities are inverted for each frame (signal line inversion). The polarities of the two signal lines forming Cds1 and Cds2 are inverted in opposite directions. In this case, it can be seen that the fluctuation of the pixel potential can be suppressed to some extent as compared with the case of the frame inversion, because the influences from the two signal lines are canceled out. However, if the values of Cds1 and Cds2 are significantly different, the effect is reduced.

FIG. 17 shows changes in pixel potential when adjacent signal lines have opposite polarities and the polarities are inverted every scan (signal line / scan line inversion). Cds1, Cds
The polarities of the two signal lines forming 2 are reversed in the opposite direction for each scanning. In this case, the polarity of the signal line is inverted every scan, and the pixel potential fluctuates greatly, but the liquid crystal display during the holding time is determined by a certain effective voltage. There is no difference in brightness in the vertical direction. However, if Cds1 and Cds2 are significantly different, the potential fluctuation during the holding time is large, and further Cds1 and Cds2
The variation of ds2 causes the loss of uniformity. Further, in this driving method, the signal line driving circuit becomes expensive.

In recent years, the area occupied by one pixel has become smaller due to the increase in area and higher definition of liquid crystal displays. Therefore, when the liquid crystal capacitance (C _LC ) and the auxiliary capacitance (C _S ) become small and the distance between the signal line and the pixel electrode becomes small, the parasitic capacitance between the pixel electrode and the signal line, which has not been considered so far, becomes relatively large. The larger the effect, the greater the impact on the screen. Also, due to manufacturing problems, for example, the size of the transistor cannot be less than a certain size due to the resolving power of the exposure machine and the mask alignment accuracy, so the area occupied by the transistor in one pixel becomes large, and the signal line on the left and right And the contact length of the pixel electrode has changed, Cds1,
The difference in the size of Cds2 causes deterioration of the display image and loss of uniformity.

[0012]

As described above, in the conventional liquid crystal display device using the thin film transistor array,
The variation in the parasitic capacitance between the pixel electrode and the signal line has been a factor causing deterioration of image quality and deterioration of uniformity.

The present invention has been made in consideration of the above circumstances. An object of the present invention is to eliminate variations in parasitic capacitance between the pixel electrode and the signal line and to prevent deterioration of image quality on the screen. It is an object of the present invention to provide a liquid crystal display device that can suppress and improve the uniformity.

[0014]

The essence of the present invention is to equalize the electrostatic capacitance between the pixel electrode and two adjacent signal lines.

That is, according to the present invention, a plurality of signal lines arranged in the row direction or the column direction, a plurality of scanning lines arranged in a direction orthogonal to these signal lines, and a signal line and a scanning line are surrounded. In a liquid crystal display device including a pixel electrode arranged in each region and a thin film transistor connected between the pixel electrode and a signal line and having a gate electrode connected to a scanning line, the pixel electrode is adjacent to the pixel electrode The distance between the two signal lines is made different, or a capacitance adjusting portion for the signal line is provided in a part of the pixel electrode, so that the static electricity between the pixel electrode and the two signal lines adjacent to the pixel electrode is reduced. The electric capacities are made equal.

[0016]

When a thin film transistor is formed for each pixel,
It is desirable to form the pixel electrode while avoiding the transistor formation region so that the pixel electrode does not overlap with the thin film transistor. Generally, the thin film transistor is formed at a corner portion of a region surrounded by the signal line and the scan line. In this case, the lengths of the two signal lines adjacent to the pixel electrode and the proximity portion of the pixel electrode are different from each other, and the distance between the pixel electrode and the two signal lines adjacent thereto is different from the conventional one. Are equal,
The capacitance between them will be different.

According to the present invention, even if the lengths of the adjacent sides of the pixel electrode and the two signal lines are different from each other due to the formation of the thin film transistor, the distance between the pixel electrode and the two signal lines adjacent thereto is reduced. By making the distance different, that is, by reducing the proximity distance in the presence of the thin film transistor, it is possible to equalize the respective capacitances between the pixel electrode and the signal line adjacent to the electrode. Therefore, it is possible to eliminate the variation in the parasitic capacitance between the two signal lines adjacent to the pixel electrode and improve the uniformity of the image.

Further, by providing a capacitance adjusting portion for the signal line on a part of the pixel electrode, even if the electrode arrangement is changed due to the misalignment of the mask when forming the pixel electrode and the signal line, this is automatically adjusted. It is possible to eliminate the change in the electrostatic capacity by correcting the change. Therefore, it is possible to form a liquid crystal display device having higher image quality than the conventional technique.

[0019]

The details of the present invention will be described below with reference to the illustrated embodiments.

FIG. 1 is a plan view showing a one-pixel configuration of a liquid crystal display according to the first embodiment of the present invention. In the figure, 1 is a pixel electrode which constitutes one pixel of a liquid crystal display, 2
Is a signal line, 3 is a gate line (scanning line), 4 is a thin film transistor which is connected between the pixel electrode 1 and the signal line 2 and is turned on / off by the gate line, and 5 is an auxiliary capacitance electrode.

The basic structure is the same as the conventional device,
The device of this embodiment is different from the conventional device in that the distances da and db between the pixel electrode 1 and the two signal lines 2 adjacent thereto are different. That is, in the pixel electrode 1, the lengths of sides adjacent to the signal line are different from La and Lb (La> Lb) due to the formation of the thin film transistor 4, and if da and db are the same distance, the pixel electrode 1 And two signal lines adjacent to each other have different capacitances. Therefore, in this embodiment, the distance da is made longer than db so that the respective capacitances become equal.

The above liquid crystal display is constructed as follows. First, a Mo—Ta alloy having a thickness of 200 nm is formed on a glass substrate and patterned to form a gate line and a gate electrode. Subsequently, SiOx having a thickness of 300 nm and SiNx having a thickness of 50 nm are formed as a first insulating film, a-Si having a thickness of 50 nm is continuously formed, and SiN is used as a protective film.
x is formed by a 150 nm plasma CVD method.

Next, SiNx of the protective film is patterned into an island shape, and n ⁺ is doped with impurities such as phosphorus which are ohmic contact layers of the source and drain regions. a-Si is 5
After forming 0 nm, the a-Si layer is patterned into an island shape. Further, ITO is formed to a thickness of 100 nm and patterned into an island shape to form a pixel electrode, and then SiOx which is the first insulating film on the terminal portion of the gate electrode is removed by etching.

[0024] accordingly After, n Cr as the source and drain electrode metal, Al and each 50,350nm formation, to form a signal line and the source-drain electrodes, the source and drain electrode metal as a mask ⁺ The a-Si is removed by etching to electrically separate the source / drain electrode metals to form a thin film transistor array.

Here, the shapes of ITO which is the pixel electrode 1 and Cr and Al which are the signal lines 2 intentionally change the gap between the adjacent portions to the left and right, and the pixel electrode 1 and the two adjacent to it. The electrostatic capacitances between the signal lines 2 are made equal.
In this case, for example, when (La−Lb) / (La + Lb) ≧ 0.1, a remarkable effect was obtained by setting da ≧ db × 1.5.

As described above, according to this embodiment, by forming the thin film transistor 4, the pixel electrode 1 close to the signal line 2 is formed.
When the lengths La and Lb of each side are different (La> Lb), the distance da toward La is longer than the distance db toward Lb. It is possible to equalize the respective capacitances between the two signal lines 2 adjacent to this. Therefore, it is possible to prevent the deterioration of the image quality and the deterioration of the uniformity due to the variation of the parasitic capacitance, and it is possible to display a high quality image. In particular, when it is applied to an active matrix type liquid crystal display, it has a great effect on the uniformity of display. FIG. 2 is a plan view showing the configuration of the main part of the second embodiment of the present invention. The same parts as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

The difference of this embodiment from the first embodiment described above is that the distance between the pixel electrode and the signal line is partially changed on the side where the thin film transistor is not formed. That is, on the side of the pixel electrode 1 where the thin film transistor 4 is not formed, the distance da ′ to the signal line 2 is longer than da (da = db) in the portion of length La ′. In this case, for example, in the case of (La-Lb) / (La + Lb) ≧ 0.1, a remarkable effect was obtained when La−La ′ ≦ Lb da ′ ≧ da × 1.4.

FIG. 3 is a plan view showing the structure of the main part of the third embodiment of the present invention. In this case, the electrostatic capacitance is made equal by providing a protruding portion on the signal line 2 and making the lengths of the portions where the pixel electrode 1 and the two signal lines 2 are adjacent to each other equal. Also in this case, for example, when (La−Lb) / (La + Lb) ≧ 0.1, a remarkable effect was obtained by setting (La−Lb−Lb ′) / (La + Lb) ≦ 0.1. Further, this protruding portion could be used as a light shield or a repair portion for disconnection of a signal line.

It goes without saying that there is an effect even if the above-mentioned three embodiments deviate from the above formulas. Furthermore, it is also possible to use these three embodiments in combination as appropriate. FIG. 4 is a plan view showing the configuration of the main part of the fourth embodiment of the present invention. The same parts as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

In this embodiment, ITO which is the pixel electrode 1 is used.
The shape of Cr and Al that are the signal lines 2 is designed in the same manner as in the previous embodiment so that the capacitance between the pixel electrode 1 and two adjacent signal lines 2 is equal. A correction portion 7 having an interdigital electrode shape is formed from a part of the pixel electrode 1 and a wiring connected to the signal line 2. In the correction portion 7, when the pixel electrode 1 approaches the signal line direction in the gap between the pixel electrode 1 and the signal line 2, the pixel electrode 1 and the signal line 2 (wiring) are separated from each other. Therefore, the change in the electrostatic capacitance between the pixel electrode 1 and the signal line 2 due to the positional displacement between the pixel electrode 1 and the signal line 2 is corrected and kept constant. In the present embodiment, in the correction portion 7, the distance between the pixel electrode 1 and the signal line 2 is shorter than the distance between the main signal line 2 and the pixel electrode 1.

With such a configuration, it is needless to say that the capacitances between the pixel electrode 1 and the two signal lines 2 adjacent to the pixel electrode 1 can be equalized, as in the previous embodiment. It is possible to prevent the capacitance from changing due to the mask misalignment between the signal line 2 and the signal line 2, and it is possible to obtain a higher quality liquid crystal image.

5 to 7 are plan views showing the construction of the essential parts of the fifth to seventh embodiments of the present invention. These embodiments are basically the same as the fourth embodiment. In the fifth embodiment shown in FIG. 5, the correction portion 7 is formed near the transistor 4. Also in the sixth embodiment shown in FIG. 6, the correction portion 7 is formed near the transistor 4. Further, in the seventh embodiment shown in FIG. 7, the correction portion 7 is formed on the auxiliary capacitance electrode 5. That is, the formation position of the portion to be corrected is
Considering the overlay accuracy of the array substrate and the counter substrate, in order to improve the aperture ratio in a display, it is desirable to be near a thin film transistor, a gate line, a signal line, or on a C _S electrode. FIG. 8 is a plan view showing the configuration of the essential parts of the eighth embodiment of the present invention. The same parts as those in FIG. 4 are designated by the same reference numerals, and detailed description thereof will be omitted.

The difference between this embodiment and the fourth embodiment is that the pixel electrode 1 and the signal line 2 are formed so as to partially overlap each other in the correction portion 7, and correction is performed with a smaller area. is there. In addition, it is possible to significantly reduce a short circuit defect due to the signal line and the pixel electrode. Specifically, it is formed as follows.

First, 300 nm of Ta is formed on a glass substrate and patterned to form a gate line and a gate electrode. Subsequently, the surface layer of Ta, which is the gate electrode, is anodized to TaOx, and the first Si is used as an insulating film.
Ox is formed to 170 nm. Then IT on SiOx
After forming O to a thickness of 100 nm to form a pixel electrode by patterning in an island shape, second SiOx is formed to a thickness of 170 nm and SiN.
x is formed to a thickness of 50 nm, a-Si is formed to a thickness of 50 nm, and SiNx is formed to a protective film by plasma CVD of 150 nm. Then, SiNx of the protective film is patterned into an island shape, and n ⁺ is doped with impurities such as phosphorus, which is an ohmic contact layer of the source / drain regions. a-Si 50nm
After the formation, the a-Si layer is patterned into an island shape.

Next, together with the first SiOx on the pixel electrode, the first and second SiOx on the terminal portion of the gate electrode.
Are simultaneously removed by etching. Then, similarly to the first embodiment, the signal line and the source / drain electrodes are formed, and n ⁺ The thin film transistor array is completed by selectively etching a-Si.

FIG. 9 is a plan view showing the structure of the essential part of the ninth embodiment of the present invention. FIG. 9A is an enlarged view of one pixel portion, and FIG. 9B is an enlarged view of the correction portion of FIG. There is. The same parts as those in FIG. 8 are designated by the same reference numerals, and detailed description thereof will be omitted.

This embodiment is basically the same as the eighth embodiment, but the shape of the overlapping portion of the pixel electrode 1 and the signal line 2 in the correction portion 7 is particularly devised. That is, the hypotenuse is formed in a part of the signal line 2 in the correction portion 7 so that the capacitance change due to the shift between the pixel electrode 1 and the signal line 2 is changed by the shift shift. Therefore, in this embodiment, the correction range in the correction portion 7 can be widened. Further, it is possible to correct the capacitance change due to the mask misalignment between the pixel electrode 1 and the signal line 2 with a smaller area.

10 to 12 are views showing the construction of the essential parts of the tenth to twelfth embodiments of the present invention. These examples
Basically, it is similar to the ninth embodiment. In the tenth embodiment shown in FIG. 10, changes in the electrostatic capacitances of the pixel electrodes 1 and the signal lines 2 are corrected and kept constant even with respect to displacement in the vertical direction. In the eleventh embodiment shown in FIG. 11, a plurality of hypotenuses are provided to widen the correction range.

The twelfth embodiment shown in FIG. 12 is an example in which an interlayer short circuit is taken at the overlapping portion of the pixel electrode 1 and the signal line 2. Note that FIG. 12A is a plan view and FIG.
FIG. 7A is a sectional view taken along the line AA ′ in (a).

In the eighth embodiment, the overlapping portion of the signal line and the pixel electrode is insulated by 170 μm of SiOx.
Insulating layer of the signal line due to defects such as pinholes
A slight short circuit between pixel electrodes occurred. In this embodiment, by using two layers of SiOx 170 μm and TaOx anodic oxide film as the insulating film in the overlapping portion, it was possible to almost eliminate defects due to interlayer short circuit.

The present invention is not limited to the above-described embodiments, and various modifications can be carried out without departing from the scope of the invention. For example, the transistor structure, film material, array pattern, etc. described in the embodiments are merely examples, and can be appropriately changed according to the specifications. Also,
In the embodiment, the position shift direction has been described assuming a certain position direction, but it is needless to say that it is possible to correct shifts in all the left, right, up, and down directions.

[0042]

As described above, according to the present invention, the electrostatic capacitance between the pixel electrode and the two signal lines adjacent to the pixel electrode is made equal, so that the variation in the parasitic capacitance between the pixel electrode and the signal line. Therefore, it becomes possible to realize a liquid crystal display device capable of suppressing the deterioration of the image quality on the screen and improving the uniformity. In addition, by providing a capacitance adjusting portion for the signal line in a part of the pixel electrode, the change in the electrode arrangement due to the misalignment of the mask when forming the pixel electrode and the signal line is automatically corrected to adjust the capacitance. You can eliminate the change,
This makes it possible to realize a liquid crystal display device with higher image quality.

[Brief description of drawings]

FIG. 1 is a plan view showing a one-pixel configuration of a liquid crystal display according to a first embodiment,

FIG. 2 is a plan view showing the configuration of the main part of the second embodiment,

FIG. 3 is a plan view showing a configuration of a main part of a third embodiment,

FIG. 4 is a plan view showing the configuration of the main part of a fourth embodiment,

FIG. 5 is a plan view showing the main configuration of the fifth embodiment,

FIG. 6 is a plan view showing the configuration of the main part of a sixth embodiment,

FIG. 7 is a plan view showing the main configuration of a seventh embodiment,

FIG. 8 is a plan view showing the configuration of the main parts of an eighth embodiment,

FIG. 9 is a plan view showing the main configuration of a ninth embodiment,

FIG. 10 is a plan view showing the configuration of the main parts of the tenth embodiment,

FIG. 11 is a plan view showing the configuration of the main parts of the eleventh embodiment,

FIG. 12 is a plan view and a sectional view showing the configuration of the essential parts of the eleventh embodiment;

FIG. 13 is an equivalent circuit diagram of a thin film transistor array,

FIG. 14 is a plan view showing a configuration example of a thin film transistor array,

FIG. 15 is a characteristic diagram showing changes in pixel potential in the case of frame inversion.

FIG. 16 is a characteristic diagram showing a change in pixel potential in the case of signal line inversion,

FIG. 17 is a characteristic diagram showing changes in pixel potential in the case of signal line / scan line inversion.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Pixel electrode, 2 ... Signal line, 3 ... Scan line (gate line), 4 ... Thin film transistor, 5 ... Auxiliary capacity electrode, 7 ... Correction part.

Claims (1)

[Claims] 1. A plurality of signal lines arranged in a row direction or a column direction, a plurality of scanning lines arranged in a direction orthogonal to the signal lines, and a region surrounded by the signal lines and the scanning lines. In a liquid crystal display device, each of which is provided with a pixel electrode and a thin film transistor connected between the pixel electrode and a signal line and having a gate electrode connected to the scanning line, wherein the pixel electrode and the electrode are adjacent to each other. The distance between the two signal lines is different, or a capacitance adjusting part for the signal line is provided in a part of the pixel electrode, and
A liquid crystal display device, wherein each of the signal lines has an equal capacitance.