JPH0578939B2 - - Google Patents

Info

Publication number
JPH0578939B2
JPH0578939B2 JP59149586A JP14958684A JPH0578939B2 JP H0578939 B2 JPH0578939 B2 JP H0578939B2 JP 59149586 A JP59149586 A JP 59149586A JP 14958684 A JP14958684 A JP 14958684A JP H0578939 B2 JPH0578939 B2 JP H0578939B2
Authority
JP
Japan
Prior art keywords
sio
uneven substrate
silicone resin
temperature
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP59149586A
Other languages
Japanese (ja)
Other versions
JPS6129153A (en
Inventor
Shunichi Fukuyama
Yasuhiro Yoneda
Masashi Myagawa
Kota Nishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59149586A priority Critical patent/JPS6129153A/en
Publication of JPS6129153A publication Critical patent/JPS6129153A/en
Publication of JPH0578939B2 publication Critical patent/JPH0578939B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC

Description

【発明の詳細な説明】[Detailed description of the invention]

産業上の利用分野 本発明はエレクトロニクスデバイスにおける凹
凸基板の平坦化方法に係り、特にIC、LSI、磁気
バブルメモリデバイス等の微細パターンを有する
デバイスの層間絶縁の方法に関するものである。 従来の技術 従来上記の微細パターンを有するデバイスの層
間絶縁方法は、Siを熱酸化することによつて得ら
れるSiO2、シラン系ガスを用いた化学的気相成
長(CVD)法によつて得られるSiO2系絶縁材料、
あるいはポリイミド系樹脂、あるいはシリコーン
樹脂等の有機系絶縁材料を用いて行なわれてい
る。しかしながら400〜1000℃の温度における耐
熱性の問題、及び基板との密着性、絶縁不良で生
じる電食性、あるいは1.0μm以上の厚膜の形成性
等における信頼性の問題においてそれぞれ一長一
短があり、良好な層間絶縁法が要望されている。 本発明で使用する絶縁材料に最も近いと思われ
る従来の絶縁材料としてポリジアルコキシシラン
がある。ポリジアルコキシシランは一般式
FIELD OF INDUSTRIAL APPLICATION The present invention relates to a method for flattening an uneven substrate in an electronic device, and particularly to a method for interlayer insulation of devices having fine patterns such as ICs, LSIs, and magnetic bubble memory devices. Conventional technology The interlayer insulation method for devices having the above-mentioned fine patterns conventionally uses SiO 2 obtained by thermal oxidation of Si, and chemical vapor deposition (CVD) method using silane-based gas. SiO2 -based insulating material,
Alternatively, organic insulating materials such as polyimide resin or silicone resin are used. However, each has advantages and disadvantages in terms of heat resistance at temperatures between 400 and 1000℃, adhesion to the substrate, electrolytic corrosion caused by poor insulation, and reliability in forming thick films of 1.0 μm or more. There is a need for a reliable interlayer insulation method. Polydialkoxysilane is a conventional insulating material that is considered to be closest to the insulating material used in the present invention. Polydialkoxysilane has the general formula

【式】で示され、熱分解の後SiO2に 変化する。この一般式中でR′は一価の炭化水素、
例えばCH3、C2H5等や水素を示す。一般に
OR′はアルコキシとOHの混合物である。このア
ルコキシが熱分解あるいは縮重合することによつ
て揮発する際、ポリマに与える歪とピンホールの
ため0.2〜0.5μm以上の膜厚を有する絶縁膜を形
成するとクラツクが入り、またそれ以下の薄膜で
も電食不良を引き起す。 発明が解決しようとする問題点 以上の点を鑑みて凹凸基板の平坦化材料に有効
な性質としては以下の2つの点が考えられる。 (1) 全く熱分解揮発物を生成しない材料、この性
質を有する材料はSiO、及びSiO2の1分子づつ
が遊離した状態で集合しているものであるが現
実的でない。 (2) 熱分解温度が高く、且つ熱分解揮発物の生成
が少ないものでその抜け穴を何らかの方法で埋
めることが可能な材料、 本発明ではこの(2)の材料の性質を有する材料を
見出そうとするものである。 本発明の目的は凹凸基板上に塗布形成した際に
ピンホール、クラツク等を発生することなしに厚
膜形成が可能な緻密な平坦化機能を有する、凹凸
基板を平坦化する方法を提供することである。 問題点を解決するための手段 上記問題点は本発明によれば 一般式:R3−SiO(―CH3SiO1.5o――SiR3 (上記式中RはCH3、C(CH33、C2H5もしく
はC6H5である。)で示される重量平均分子量:
25000以上のシリル化ポリメチルシルセスキオキ
サン樹脂を凹凸基板上に形成し、該シリコーン樹
脂を加熱流動させることを特徴とする凹凸基板の
平坦化方法によつて達成される。 作 用 本発明によれば該シリコーン樹脂の流動温度が
重量平均分子量25000〜50000で300〜400℃である
ために該シリコン樹脂の熱硬化を350〜400℃で行
うことにより硬化の際に発生する熱分解生成物に
よるピンホール及び歪を緩和することが出来る。
また、該シリコーン樹脂が流動するため凹凸基板
は、完全に平坦化できる。更に、本発明に用いら
れるシリコーン樹脂はポリメチルシルセスキオキ
サン(PMSS)が好ましいが該PMSSは室温で固
体であり、例えばスピンコート等の回転塗布法を
用いて凹凸基板に塗布する時はトルエン、キシレ
ン、等の芳香族系の有機溶剤に溶解して用いる。
PMSSの膜厚制御は重量平均分子量、有機溶剤の
種類、濃度、回転数によつて可能である。 シリル化ポリシルセスキオキサンを絶縁膜とし
て用いると溶融平坦化により下地の平坦化能力
に優れ、比誘電率εが約3.0と低誘電率の膜が
得られ(SiO2:ε=4.0)、架橋密度が低いので
クラツクが生じにくく、厚膜で使用可能である。 実施例 以下本発明の実施例を説明する。 トリクロルメチルシラン(TCMS)をメチル
イソブチルケトン(MIBK)中で水を用いて約5
時間重合させ、トリメチルクロルシラン
(TMCS)でシリル化した重量平均分子量約
30000のPMSSをトルエンに溶解し、20重量パー
セントの樹脂液を作製した。 次にシリコーン基板上に形成された厚さ0.9μ
m、最小線幅3μm、最小線間隔2μmのアルミニ
ウム配線上に、上記の樹脂液を2500rpm、40秒の
条件で回転塗布し、80℃30分間の溶剤乾燥後、窒
素気流中、350℃の温度で60分間熱処理を行なつ
た(該温度は350〜400℃が好ましい)。上記アル
ミ配線上では0.6μmスペース部では1.5μmの膜厚
が確保され、段差は0.05μmとほぼ平坦化が達成
された。 このようにして形成されたPMSS平坦膜上に
PSGを公知の方法で形成し、次にスルーホール
を形成後、二層目のアルミニウム配線を形成し、
更に保護層として、1.3μmの膜厚のPSG層を形成
した。次に電極取り出し用窓開けを行なつてバイ
ポーラ素子装置を得た。この素子は空気中500℃
の温度で1時間の加熱試験−65°←→150℃の繰り返
し10回の熱衝撃試験、85℃の温度で90%RHガス
下で6Vの印加電圧、1000時間の試験後もその絶
縁性その他の異常は発生しなかつた。 比較例 シリル化していないポリメチルシルセスオキサ
ンを20wt%の樹脂液として実施例と同様の基板
上に2500rpm、40秒の条件で回転塗布し、80℃、
30分の溶剤乾燥、350℃、60分間の熱処理を行な
つた。上記シリコーン樹脂の膜は、アルミ配線上
でクラツクが発生した。また、1.0μm段差上で
0.2μmの段差が残された。 発明の効果 以上説明したように本発明によれば凹凸基板の
平坦化を歪がなく、且つ耐熱性、信頼性よく形成
することができる。
It is represented by the formula and changes to SiO 2 after thermal decomposition. In this general formula, R′ is a monovalent hydrocarbon,
For example, it represents CH 3 , C 2 H 5 , etc., and hydrogen. in general
OR′ is a mixture of alkoxy and OH. When this alkoxy volatilizes through thermal decomposition or polycondensation, it causes strain and pinholes on the polymer, causing cracks when forming an insulating film with a thickness of 0.2 to 0.5 μm or more, and forming a thin film with a thickness of 0.2 to 0.5 μm or more. However, it causes electrolytic corrosion defects. Problems to be Solved by the Invention In view of the above points, the following two points can be considered as effective properties for a flattening material for an uneven substrate. (1) A material that does not generate any thermal decomposition volatiles, a material that has this property, is one in which each molecule of SiO and SiO 2 is aggregated in a free state, but this is not realistic. (2) A material that has a high pyrolysis temperature and produces little pyrolysis volatiles, which can fill the loophole in some way.The present invention has found a material that has the properties of the material in (2). This is what we are trying to do. An object of the present invention is to provide a method for planarizing an uneven substrate, which has a precise planarization function that allows a thick film to be formed without generating pinholes, cracks, etc. when coating is formed on an uneven substrate. It is. Means for Solving the Problems According to the present invention, the above problems can be solved by the general formula: R 3 --SiO(-CH 3 SiO 1.5 ) o --SiR 3 (in the above formula, R is CH 3 , C(CH 3 ) 3 , C 2 H 5 or C 6 H 5 ):
This is achieved by a method for planarizing an uneven substrate, which is characterized by forming a silylated polymethyl silsesquioxane resin of 25,000 or more on an uneven substrate, and heating and fluidizing the silicone resin. Effect According to the present invention, since the flow temperature of the silicone resin is 300 to 400°C with a weight average molecular weight of 25,000 to 50,000, heat curing of the silicone resin is performed at 350 to 400°C, so that the flow temperature occurs during curing. Pinholes and distortion caused by thermal decomposition products can be alleviated.
Moreover, since the silicone resin flows, an uneven substrate can be completely flattened. Furthermore, the silicone resin used in the present invention is preferably polymethylsilsesquioxane (PMSS), which is solid at room temperature. It is used by dissolving it in an aromatic organic solvent such as , xylene, etc.
PMSS film thickness can be controlled by controlling the weight average molecular weight, type of organic solvent, concentration, and rotation speed. When silylated polysilsesquioxane is used as an insulating film, it has excellent ability to flatten the underlying layer through melting and planarization, and a film with a low relative dielectric constant ε of approximately 3.0 can be obtained (SiO 2 :ε=4.0). Since the crosslinking density is low, cracks are less likely to occur and it can be used in thick films. Examples Examples of the present invention will be described below. Trichloromethylsilane (TCMS) was dissolved in methyl isobutyl ketone (MIBK) using water for approximately 5 minutes.
Time-polymerized and silylated with trimethylchlorosilane (TMCS), weight average molecular weight approx.
30,000 PMSS was dissolved in toluene to prepare a 20 weight percent resin solution. Next, a thickness of 0.9μ was formed on a silicone substrate.
The above resin solution was spin-coated on aluminum wiring with a minimum line width of 3 μm and a minimum line spacing of 2 μm at 2500 rpm for 40 seconds, and after drying the solvent at 80°C for 30 minutes, it was applied at a temperature of 350°C in a nitrogen stream. Heat treatment was performed for 60 minutes at a temperature of 350 to 400°C. On the above aluminum wiring, a film thickness of 1.5 μm was secured in the 0.6 μm space, and the level difference was 0.05 μm, making it almost flat. On the PMSS flat film formed in this way
PSG is formed by a known method, then through holes are formed, and a second layer of aluminum wiring is formed.
Furthermore, a PSG layer with a thickness of 1.3 μm was formed as a protective layer. Next, a window for taking out the electrodes was opened to obtain a bipolar element device. This element is heated to 500℃ in air.
Thermal shock test for 1 hour at a temperature of -65°←→150°C, 6V applied voltage under 90% RH gas at a temperature of 85°C, and its insulation properties after 1000 hours of testing. No abnormalities occurred. Comparative example Non-silylated polymethylsilsesoxane was spin-coated as a 20wt% resin liquid onto the same substrate as in the example at 2500 rpm for 40 seconds, and then heated at 80°C.
Solvent drying for 30 minutes and heat treatment at 350°C for 60 minutes were performed. Cracks occurred on the aluminum wiring in the silicone resin film. Also, on a 1.0μm step
A 0.2 μm step was left. Effects of the Invention As described above, according to the present invention, an uneven substrate can be flattened without distortion, and with good heat resistance and reliability.

Claims (1)

【特許請求の範囲】 1 一般式:R3−SiO(―CH3SiO1.5o――SiR3 (上記式中RはCH3、C(CH33、C2H5もしく
はC6H5である。)で示される重量平均分子量
25000以上のシリル化ポリメチルシルセスキオキ
サン樹脂を凹凸基板上に形成し、該シリコーン樹
脂を加熱流動させることを特徴とする凹凸基板の
平坦化方法。 2 前記加熱を350℃以上の温度で行なうことを
特徴とする特許請求の範囲第1項記載の方法。
[Claims] 1 General formula: R 3 −SiO(—CH 3 SiO 1.5 ) o —SiR 3 (In the above formula, R is CH 3 , C(CH 3 ) 3 , C 2 H 5 or C 6 H Weight average molecular weight expressed as 5 )
1. A method for planarizing an uneven substrate, comprising forming a silylated polymethylsilsesquioxane resin of 25,000 or more on an uneven substrate, and heating and fluidizing the silicone resin. 2. The method according to claim 1, wherein the heating is performed at a temperature of 350°C or higher.
JP59149586A 1984-07-20 1984-07-20 Flattening method of irregular surface substrate Granted JPS6129153A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59149586A JPS6129153A (en) 1984-07-20 1984-07-20 Flattening method of irregular surface substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59149586A JPS6129153A (en) 1984-07-20 1984-07-20 Flattening method of irregular surface substrate

Publications (2)

Publication Number Publication Date
JPS6129153A JPS6129153A (en) 1986-02-10
JPH0578939B2 true JPH0578939B2 (en) 1993-10-29

Family

ID=15478436

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59149586A Granted JPS6129153A (en) 1984-07-20 1984-07-20 Flattening method of irregular surface substrate

Country Status (1)

Country Link
JP (1) JPS6129153A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR900008647B1 (en) * 1986-03-20 1990-11-26 후지쓰 가부시끼가이샤 A method for manufacturing three demensional i.c.
JPH02106948A (en) * 1988-10-17 1990-04-19 Fujitsu Ltd Manufacture of semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5760330A (en) * 1980-09-27 1982-04-12 Fujitsu Ltd Resin composition
JPS5957437A (en) * 1982-09-28 1984-04-03 Fujitsu Ltd Forming method for silicon oxide film

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5760330A (en) * 1980-09-27 1982-04-12 Fujitsu Ltd Resin composition
JPS5957437A (en) * 1982-09-28 1984-04-03 Fujitsu Ltd Forming method for silicon oxide film

Also Published As

Publication number Publication date
JPS6129153A (en) 1986-02-10

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