JPH057663B2 - - Google Patents
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- Publication number
- JPH057663B2 JPH057663B2 JP1056204A JP5620489A JPH057663B2 JP H057663 B2 JPH057663 B2 JP H057663B2 JP 1056204 A JP1056204 A JP 1056204A JP 5620489 A JP5620489 A JP 5620489A JP H057663 B2 JPH057663 B2 JP H057663B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- metal electrode
- voltage source
- dielectric enclosure
- testing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000002184 metal Substances 0.000 claims description 46
- 239000004065 semiconductor Substances 0.000 claims description 46
- 238000012360 testing method Methods 0.000 claims description 22
- 239000003990 capacitor Substances 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 13
- 238000010998 test method Methods 0.000 claims description 6
- 230000015556 catabolic process Effects 0.000 description 13
- 238000010586 diagram Methods 0.000 description 5
- 239000004020 conductor Substances 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
Description
【発明の詳細な説明】
（産業上の利用分野）
この発明は半導体装置の試験方法に関し、詳し
くは、誘電体包囲容器を有する半導体装置の静電
気破壊現象を正しくモニターするための半導体装
置の静電気破壊試験方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method for testing semiconductor devices, and more particularly, to a test method for electrostatic breakdown of semiconductor devices for correctly monitoring electrostatic breakdown phenomena in semiconductor devices having a dielectric enclosure. It concerns the test method.
（従来の技術）
上記試験方法の従来例の一つとして特開昭57−
81577号公報に開示されるものがある。それは、
第３図に示すように、被試験半導体装置１の誘電
体包囲容器２に接する電極３とこれに直結される
直流電源４により前記誘電体包囲容器２の表面に
所定の電荷を帯電させ、それを、スイツチ５の閉
成にともない前記半導体装置１の入出力端子６を
経由して放電させるものであり、その後、その放
電によつて半導体装置１に破壊が生じたか否か適
宜な手段で確認するものである。(Prior art) As one of the conventional examples of the above test method,
There is one disclosed in Publication No. 81577. it is,
As shown in FIG. 3, the surface of the dielectric envelope 2 is charged with a predetermined charge by an electrode 3 in contact with the dielectric envelope 2 of the semiconductor device under test 1 and a DC power supply 4 directly connected to the electrode 3. is caused to discharge via the input/output terminal 6 of the semiconductor device 1 as the switch 5 is closed, and then it is confirmed by appropriate means whether or not the semiconductor device 1 has been destroyed by the discharge. It is something to do.
この静電気破壊試験方法によれば、人体放電法
やチヤージデバイス法に比較して実用条件に近い
試験ができる。 According to this electrostatic breakdown test method, it is possible to perform tests closer to practical conditions than the human body discharge method or the charge device method.
（発明が解決しようとする課題）
しかるに、上記試験方法では、半導体装置の近
傍に存在する静電気帯電物体によつて引き起され
る静電気破壊現象については試験することができ
なかつた。すなわち、半導体装置に摩擦帯電が生
じていなくても、該半導体装置の近傍に静電気帯
電物体があると、半導体装置と帯電物体との間の
静電気容量を介して半導体装置の電位を上昇さ
せ、この状態で半導体装置の入出力端子が他の接
地金属などに接触すると、やはり放電現象が起
り、半導体装置内に放電電流が流入し、半導体装
置内部が破壊されるが、このような静電気破壊は
上記従来の方法では試験できない。(Problems to be Solved by the Invention) However, with the above test method, it was not possible to test the electrostatic breakdown phenomenon caused by electrostatically charged objects existing in the vicinity of the semiconductor device. In other words, even if a semiconductor device is not triboelectrically charged, if there is an electrostatically charged object in the vicinity of the semiconductor device, the potential of the semiconductor device will increase through the electrostatic capacitance between the semiconductor device and the charged object, and this will increase the potential of the semiconductor device. If the input/output terminals of a semiconductor device come into contact with another grounded metal, etc., a discharge phenomenon will occur, and a discharge current will flow into the semiconductor device, destroying the inside of the semiconductor device. It cannot be tested using traditional methods.
この発明は上記の点に鑑みなされたもので、半
導体装置の近傍に存在する静電気帯電物体によつ
て引き起される静電気破壊現象を正確に試験する
ことができる半導体装置の試験方法を提供するこ
とを目的とする。 The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor device testing method that can accurately test the electrostatic breakdown phenomenon caused by an electrostatically charged object existing in the vicinity of a semiconductor device. With the goal.
さらに、この発明は、実際上起り得る半導体装
置の局部的帯電を考慮して上記静電気帯電物体に
よる静電気破壊現象を試験できる半導体装置の試
験方法を提供することを目的とする。 A further object of the present invention is to provide a method for testing a semiconductor device that can test the electrostatic breakdown phenomenon caused by the electrostatically charged object, taking into account local charging of the semiconductor device that may actually occur.
（課題を解決するための手段）
この発明では、帯電手段を次の通りとする。す
なわち、被試験半導体装置の誘電体包囲容器の一
主表面ほぼ全域と接触する金属電極と、直流電圧
源と、一端が前記金属電極に接続され、他端が前
記直流電圧源の電源電位側に接続されたコンデン
サとからなるものとする。(Means for Solving the Problems) In the present invention, the charging means is as follows. That is, a metal electrode that contacts almost the entire main surface of the dielectric enclosure of the semiconductor device under test, a DC voltage source, one end of which is connected to the metal electrode, and the other end of which is connected to the power supply potential side of the DC voltage source. It shall consist of a connected capacitor.
また、この発明では帯電手段を次の通りともす
る。すなわち、被試験半導体装置の誘電体包囲容
器の選択された表面と接触する第１金属電極と、
残余の選択された表面と接触し且つ前記第１金属
電極と所定の間隔をもつて配置された第２金属電
極と、この第２金属電極に基準電位側が接続され
た直流電圧源と、一端が前記第１金属電極に他端
が前記直流電圧源の電源電息側に接続されたコン
デンサとからなるものとする。 Further, in the present invention, the charging means is as follows. That is, a first metal electrode in contact with a selected surface of a dielectric enclosure of a semiconductor device under test;
a second metal electrode in contact with the remaining selected surface and disposed at a predetermined distance from the first metal electrode; a DC voltage source having a reference potential side connected to the second metal electrode; The first metal electrode includes a capacitor whose other end is connected to the power supply side of the DC voltage source.
（作用）
上記方法では、直流電圧源により、コンデンサ
を通して、金属電極が接する誘電体包囲容器表面
が所定電位に上昇する。これは、半導体装置の近
傍に静電気帯電物体が存在して、この帯電物体に
より、該物体と半導体装置間の静電気容量を介し
て半導体装置の電位を上昇させる場合と等価とな
る。したがつて、その状況下の静電気破壊現象を
試験できる。(Function) In the above method, the surface of the dielectric envelope in contact with the metal electrode is raised to a predetermined potential through a capacitor by a DC voltage source. This is equivalent to the case where an electrostatically charged object exists near the semiconductor device, and this charged object increases the potential of the semiconductor device via the electrostatic capacitance between the object and the semiconductor device. Therefore, the electrostatic breakdown phenomenon under that situation can be tested.
また、金属電極を第１金属電極と第２金属電極
に分割して第１金属電極にのみコンデンサを接続
すれば、第１金属電極が接する誘電体包囲容器表
面のみ局部的に電位を上昇させることができる。
すなわち、誘電体包囲容器は絶縁体であるため、
帯電させた場合、帯電分布をもち、抵抗体あるい
は導体のように均一帯電分布とはならない。上記
のように金属電極を分割した場合は、上記帯電分
布すなわち局部的帯電まで考慮して、半導体装置
近傍の静電気帯電物体により引き起される静電気
破壊現象を試験できる。 Furthermore, if the metal electrode is divided into a first metal electrode and a second metal electrode and a capacitor is connected only to the first metal electrode, the potential can be locally increased only on the surface of the dielectric enclosure that the first metal electrode contacts. I can do it.
In other words, since the dielectric enclosure is an insulator,
When charged, it has a charge distribution, and unlike a resistor or a conductor, it does not have a uniform charge distribution. When the metal electrode is divided as described above, it is possible to test the electrostatic breakdown phenomenon caused by electrostatically charged objects in the vicinity of the semiconductor device, taking into consideration the above-mentioned charge distribution, that is, even local charging.
（実施例）
以下この発明の実施例を図面を参照して説明す
る。(Example) Examples of the present invention will be described below with reference to the drawings.
第１図はこの発明の第１の実施例を示す構成図
である。この図において、１０は帯電手段、１１
は静電気破壊を生じていないことを確認した半導
体装置、１１ａは半導体装置１１のパツケージ
（誘導体包囲容器）表面、１１ｂは半導体装置１
１の入出力端子、１２は電気的短絡か開放かを決
定する手段としてのスイツチ（スイツチ手段）、
１３は被放電物体の等価インピーダンス手段（負
荷手段）をそれぞれ示している。スイツチ１２と
等価インピーダンス手段１３は半導体装置１１の
入出力端子１１ｂとGND電位（後述直流電圧源
の基準電位）間に直列接続される。また、帯電手
段１０は次のように構成される。すなわち、パツ
ケージ表面１１ａのほぼ全域に接する金属電極１
０ａと、直流電圧源（可変電圧源）１０ｂと、一
端が前記金属電極１０ａに接続され他端が前記直
流電圧源１０ｂの電源電位側に接続されたコンデ
ンサCXからなる。 FIG. 1 is a block diagram showing a first embodiment of the present invention. In this figure, 10 is a charging means, 11
11a is the package (dielectric enclosure) surface of the semiconductor device 11, and 11b is the semiconductor device 1 that has been confirmed to have no electrostatic damage.
1 is an input/output terminal, 12 is a switch (switch means) as a means for determining whether to electrically short circuit or open;
Reference numeral 13 indicates equivalent impedance means (load means) of the object to be discharged. The switch 12 and the equivalent impedance means 13 are connected in series between the input/output terminal 11b of the semiconductor device 11 and the GND potential (reference potential of a DC voltage source to be described later). Further, the charging means 10 is configured as follows. That is, the metal electrode 1 is in contact with almost the entire surface of the package surface 11a.
0a, a DC voltage source (variable voltage source) 10b, and a capacitor CX whose one end is connected to the metal electrode 10a and the other end is connected to the power supply potential side of the DC voltage source 10b.
この第１の実施例では、直流電圧源１０ｂによ
り、コンデンサCXを通して、金属電極１０ａが
接するパツケージ表面１１ａが所定電位に上昇す
る。これは、半導体装置の近傍に静電気帯電物体
が存在して、この帯電物体により、該物体と半導
体装置間の静電気容量を介して半導体装置の電位
を上昇させる場合と等価となる。 In this first embodiment, a DC voltage source 10b raises the package surface 11a, which is in contact with the metal electrode 10a, to a predetermined potential through the capacitor CX . This is equivalent to the case where an electrostatically charged object exists near the semiconductor device, and this charged object increases the potential of the semiconductor device via the electrostatic capacitance between the object and the semiconductor device.
したがつて、上記のように電位上昇させた状態
で、次にスイツチ１２を閉成して、パツケージ表
面１１ａの電荷を入出力端子１１ｂを通して放電
させ、その後、半導体装置１１が破壊を生じてい
るか例えば入出力リークチエツク法で確認するこ
とにより、前記静電気帯電物体による静電気破壊
現象をモニターできる。 Therefore, with the potential raised as described above, the switch 12 is then closed to discharge the charge on the package surface 11a through the input/output terminal 11b, and then it is determined whether the semiconductor device 11 is damaged. For example, by checking with an input/output leak check method, it is possible to monitor the electrostatic breakdown phenomenon caused by the electrostatically charged object.
ところで、半導体装置の誘電体パツケージは絶
縁体であるため、帯電させた場合、帯電分布をも
ち、抵抗体あるいは導体のように均一帯電分布と
はならない。第２図の第２の実施例は、この帯電
分布すなわち局部的帯電まで考慮して前記静電気
帯電物体による静電気破壊現象をモニターしよう
とするものである。 By the way, since the dielectric package of a semiconductor device is an insulator, when it is charged, it has a charge distribution, and unlike a resistor or a conductor, it does not have a uniform charge distribution. The second embodiment shown in FIG. 2 is intended to monitor the electrostatic breakdown phenomenon caused by the electrostatically charged object by taking into account this charge distribution, that is, even local charging.
そこで、この第２の実施例では、金属電極が第
１金属電極１０ｅと第２金属電極１０ｆからな
る。第１金属電極１０ｅは、パツケージ表面１０
ａの選択された部分と接触し、第２金属電極１０
ｆは残余の選択されたパツケージ表面１１ａと接
触する。また、第２金属電極１０ｆはGND電位
（直流電圧源１０ｂの基準電位）に接続されるも
のとする。一方、第１金属電極１０ｅにコンデン
サCXの一端が接続され、このコンデンサCXの他
端が直流電圧源１０ｂの電源側電位に接続される
ものとする。その他は第１の実施例と同一であ
り、同一部分には同一符号を付して説明を省略す
る。 Therefore, in this second embodiment, the metal electrode consists of a first metal electrode 10e and a second metal electrode 10f. The first metal electrode 10e is connected to the package surface 10.
in contact with a selected portion of the second metal electrode 10
f contacts the remaining selected package surface 11a. Further, it is assumed that the second metal electrode 10f is connected to the GND potential (the reference potential of the DC voltage source 10b). On the other hand, it is assumed that one end of the capacitor CX is connected to the first metal electrode 10e, and the other end of the capacitor CX is connected to the power supply side potential of the DC voltage source 10b. The rest is the same as the first embodiment, and the same parts are given the same reference numerals and the explanation will be omitted.
この第２の実施例では、第１金属電極１０ｅが
接するパツケージ表面１１ａのみ局部的に、直流
電圧源１０ｂによりコンデンサCXを通して所定
電位に上昇できる。したがつて、局部的帯電を考
慮して静電気帯電物体による静電気破壊現象をモ
ニターできる。 In this second embodiment, only the package surface 11a in contact with the first metal electrode 10e can be locally raised to a predetermined potential through the capacitor CX by the DC voltage source 10b. Therefore, it is possible to monitor the electrostatic breakdown phenomenon caused by an electrostatically charged object while taking local charging into consideration.
なお、第２図において、ｔで示される間隔は第
１金属電極１０ｅと第２金属電極１０ｆの距離を
表し、この距離によつて電極間パツケージ表面１
１ａの電位勾配を決定する。ただし、第１金属電
極１０ｅと第２金属電極１０ｆの間で放電が発生
しないように、印加される電圧値に応じてｔの最
小値は設定されるものである。 In FIG. 2, the interval indicated by t represents the distance between the first metal electrode 10e and the second metal electrode 10f.
Determine the potential gradient of 1a. However, the minimum value of t is set according to the applied voltage value so that no discharge occurs between the first metal electrode 10e and the second metal electrode 10f.
（発明の効果）
以上詳細に説明したように、この発明の方法に
よれば、直流電圧源をコンデンサを通して半導体
装置誘電体包囲容器表面の金属電極に接続するこ
とにより、半導体装置の近傍に存在する静電気帯
電物体によつて引き起される静電気破壊現象を正
確に試験することができる。しかも、金属電極を
第１金属電極と第２金属電極に分割して第１金属
電極にコンデンサを接続することにより、局部的
に帯電する場合すなわち帯電分布を有する場合を
も考慮して、前記静電気帯電物体による静電気破
壊現象を試験できる。(Effects of the Invention) As explained in detail above, according to the method of the present invention, by connecting a DC voltage source to a metal electrode on the surface of a semiconductor device dielectric enclosure through a capacitor, The electrostatic breakdown phenomenon caused by electrostatically charged objects can be accurately tested. Furthermore, by dividing the metal electrode into a first metal electrode and a second metal electrode and connecting a capacitor to the first metal electrode, the static electricity Can test electrostatic breakdown phenomena caused by charged objects.
第１図はこの発明の半導体装置の試験方法の第
１の実施例を示す構成図、第２図はこの発明の第
２の実施例を示す構成図、第３図は従来の方法を
示す構成図である。
１０……帯電手段、１０ａ……金属電極、１０
ｂ……直流電圧源、１０ｅ……第１金属電極、１
０ｆ……第２金属電極、１１……半導体装置、１
１ａ……パツケージ表面、１１ｂ……入出力端
子、１２……スイツチ、１３……等価インピーダ
ンス手段。
FIG. 1 is a block diagram showing a first embodiment of the semiconductor device testing method of the present invention, FIG. 2 is a block diagram showing a second embodiment of the present invention, and FIG. 3 is a block diagram showing a conventional method. It is a diagram. 10...Charging means, 10a...Metal electrode, 10
b...DC voltage source, 10e...First metal electrode, 1
0f...Second metal electrode, 11...Semiconductor device, 1
1a... Package surface, 11b... Input/output terminal, 12... Switch, 13... Equivalent impedance means.
Claims (1)
電位源との間にスイツチ手段と負荷手段を直列に
接続し、前記スイツチ手段を開路にした状態で前
記被試験半導体装置の誘電体包囲容器に所定の電
荷を帯電させた後、この帯電を付勢したまま前記
スイツチ手段を閉路することにより前記誘演体包
囲容器に蓄積された電荷を前記入力又は出力端子
を経由して放電させるようにした半導体装置の試
験方法において、 前記誘電体包囲容器に所定の電荷を帯電させる
手段は、前記誘電体包囲容器の一主表面ほぼ全域
と接触する金属電極と、直流電圧源と、一端が前
記金属電極に接続され、他端が前記直流電圧源の
電源電位側に接続されたコンデンサとからなるこ
とを特徴とする半導体装置の試験方法。 ２ 前記直流電圧源は可変電圧源であるこことを
特徴とする特許請求の範囲第１項記載の半導体装
置の試験方法。 ３ 被試験半導体装置の入力又は出力端子と基準
電位源との間にスイツチ手段と負荷手段を直列に
接続し、前記スイツチ手段を開路にした状態で前
記被試験半導体装置の誘電体包囲容器に所定の電
荷を帯電させた後、この帯電を付勢したまま前記
スイツチ手段を閉路することにより前記誘電体包
囲容器に蓄積された電荷を前記入力又は出力端子
を経由して放電させるようにした半導体装置の試
験方法において、 前記誘電体包囲容器に所定の電荷を帯電させる
手段は、前記誘電体包囲容器の選択された表面と
接触する第１金属電極と、残余の選択された表面
と接触し且つ前記第１金属電極と所定の間隔をも
つて配置された第２金属電極と、この第２金属電
極に基準電位側が接続された直流電圧源と、一端
が前記第１金属電極に他端が前記直流電圧源の電
源電位側に接続されたコンデンサとからなること
を特徴とする半導体装置の試験方法。 ４ 前記直流電圧源は可変電圧源であることを特
徴とする特許請求の範囲第３項記載の半導体装置
の試験方法。[Claims] 1. A switch means and a load means are connected in series between an input or output terminal of the semiconductor device under test and a reference potential source, and the semiconductor device under test is operated with the switch means in an open circuit. After charging the dielectric enclosure with a predetermined charge, the switch means is closed while this charge is energized, thereby transferring the electric charge accumulated in the dielectric enclosure via the input or output terminal. In the method for testing a semiconductor device in which discharge is caused, the means for charging the dielectric enclosure with a predetermined charge includes a metal electrode in contact with almost the entire main surface of the dielectric enclosure, a DC voltage source, A method for testing a semiconductor device, comprising a capacitor having one end connected to the metal electrode and the other end connected to the power supply potential side of the DC voltage source. 2. The method for testing a semiconductor device according to claim 1, wherein the DC voltage source is a variable voltage source. 3. A switch means and a load means are connected in series between the input or output terminal of the semiconductor device under test and a reference potential source, and the switch means is placed in a dielectric enclosure of the semiconductor device under test in an open state. After the semiconductor device is charged with an electric charge, the electric charge accumulated in the dielectric enclosure is discharged via the input or output terminal by closing the switch means while the electric charge is energized. In the test method, the means for charging the dielectric enclosure with a predetermined charge includes a first metal electrode in contact with a selected surface of the dielectric enclosure, and a first metal electrode in contact with a remaining selected surface of the dielectric enclosure; a second metal electrode disposed at a predetermined distance from the first metal electrode; a DC voltage source whose reference potential side is connected to the second metal electrode; one end of the DC voltage source connected to the first metal electrode and the other end of the DC voltage source A method for testing a semiconductor device, comprising a capacitor connected to the power supply potential side of a voltage source. 4. The method for testing a semiconductor device according to claim 3, wherein the DC voltage source is a variable voltage source.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1056204A JPH01272984A (en) | 1989-03-10 | 1989-03-10 | Testing method for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1056204A JPH01272984A (en) | 1989-03-10 | 1989-03-10 | Testing method for semiconductor device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58180838A Division JPS6073375A (en) | 1983-09-30 | 1983-09-30 | Method of testing semiconductor apparatus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01272984A JPH01272984A (en) | 1989-10-31 |
| JPH057663B2 true JPH057663B2 (en) | 1993-01-29 |
Family
ID=13020588
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1056204A Granted JPH01272984A (en) | 1989-03-10 | 1989-03-10 | Testing method for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01272984A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008096129A (en) * | 2006-10-06 | 2008-04-24 | Fujitsu Ltd | Apparatus for measuring potential gradient, and electronic device process evaluating apparatus |
-
1989
- 1989-03-10 JP JP1056204A patent/JPH01272984A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01272984A (en) | 1989-10-31 |
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