JPH0575657A - Fsk communication demodulator - Google Patents

Abstract

PURPOSE:To reduce a chip area by calculating a time up to a change point of a demodulation signal by an approximation arithmetic circuit thereby forming the demodulator with a small circuit. CONSTITUTION:An arithmetic circuit 300 resulting from checking a calculating system for demodulation in the FSK communication and implementing the demodulation by an approximation equation is incorporated in place of a table employing a storage device such as a ROM. That is, the FSK communication demodulator is provided with the arithmetic operation circuit 300, in which a time iota up to a change point of a demodulation signal is obtained by an approximated equation as iota=T when a 1st signal is changed into a 2nd signal and iota=C-2XT when the 2nd signal is changed into the 1st signal, where T is a modulation signal pulse width and C is a constant depending on the carrier frequency of the 1st and 2nd signals when a ratio of a carrier frequency of the 1st signal to a carrier frequency of the 2nd signal is 6:11.

Description

Detailed Description of the Invention

[0001]

The present invention relates to FSK (Frequency Shi
The present invention relates to an FSK communication demodulator which has an approximate arithmetic circuit and is suitable for an LSI using a gate array or the like.

[0002]

2. Description of the Related Art Generally, in FSK communication, when a communication signal is "1" as shown in FIG. 4, a carrier frequency is 2200 Hz for a communication signal having a baud rate of 1200 bps.
In addition, when the communication signal is "0", the carrier frequency is 12
A modulation method in which the phase is set to 00 Hz and the phase is continuous at the change point of the carrier frequency is often used. Conventionally, an analog method such as passing through an edge detector and then passing through a low-pass filter has been used as a demodulation method of the modulated signal shown in FIG. 4, but recently, after the modulated signal is A / D converted, a digital signal is obtained. A method of demodulating by processing is also used. As an example of the latter method, as shown in FIG.
The change points of the communication signal, that is, the frequency change points a, b, c, and d of the modulation signal are detected from the modulation signal, and from the edges of the modulation signal pulses T0 to T3 including the frequency change points, τ0 to τ3 respectively for a certain time. After that, the output demodulation signal is changed. There is an example as shown in FIG. 6 as a demodulator that realizes the above-described demodulation method. In FIG. 6, the modulation signal 10
0 is converted into a digital signal by the A / D converter 1, the change point of the modulation signal 100 is detected by the edge detector 2, the modulation signal pulse width is measured by the counter 3 by this change point signal, and the result is held in the latch 4. The signal change point detector 5 inputs only the modulated signal pulses T0 to T3 in FIG. 5 as an address to a table 6 using a storage device such as a ROM, and the time data τ0 to τ3 in FIG. By setting the point of changing the demodulated signal obtained by setting the time data in the counter 9 and counting down, and the control signal for switching the demodulated signal from the signal change point detector 5 to "0" or "1",
The flip-flop circuit 7 and the latch 8 are controlled to output the demodulation signal 200. Reference numeral 110 is a sample clock used for the A / D converter 1, the counters 3 and 9, and the like.

[0003]

However, in the configuration of FIG. 6, a large memory device is required to increase the sampling frequency or to demodulate accurately, so that when a gate array or the like is used for LSI. It was a cause of the large chip area. Also, if the carrier frequency changes, the data in the table must be changed. Therefore, an object of the present invention is to include a table using a storage device such as a ROM, reduce the chip area to be miniaturized when the LSI is formed by a gate array, etc. It realizes a demodulator capable of supporting the carrier frequencies of.

[0004]

In order to achieve such an object, in the present invention, a calculation method for demodulation of FSK communication is examined, and an arithmetic circuit for performing demodulation by an approximate equation is used as the RO circuit.
It is installed instead of a table using a storage device such as M.

[0005]

A modulation signal pulse width T including a frequency change point is examined by using a calculation circuit instead of a table using a storage device such as a ROM for studying a calculation method of demodulation of FSK communication and performing demodulation by an approximate expression. Is input to the arithmetic circuit for demodulating by an approximate expression, the time τ to the change point of the demodulated signal is obtained, and the demodulated signal is created.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the drawings.
FIG. 1 shows an embodiment of an FSK demodulator for demodulating the modulated signal shown in FIG. In FIG. 1, 1 to 5, 7 to 9,
Reference numerals 100, 101 and 200 are the same as those in FIG.
Reference numeral 10 is a shifter for doubling the input data, 11 is a subtracter for subtracting the output of the doubled shifter 10 from an external input constant 102, and 12 is a latch 4 by a control signal from the signal change point detector 5. Is a multiplexer that switches the output of the counter and the output of the subtractor 11 and inputs it to the counter 9. Reference numeral 300 is an arithmetic circuit including a shifter 10, a subtractor 11, and a multiplexer 12. Reference numeral 103 is an output signal of the edge detector, 104 is a switching control signal of the demodulation signal, and 105 is a signal indicating the timing of the edge of the modulation signal pulse width including the frequency change point.

The operation of FIG. 1 will be described with reference to the timing chart of FIG. An input edge of the modulated signal 100 is detected by the A / D converter 1 and the edge detector 2, and the signal 10
It is output as 3. The sample clock 101 between the pulses of the signal 103 is counted by the counter 3 and latched by the latch 4. This data is input to the signal change point detector 5, and a pulse is sent to the signal 105 at the timing of the edge of the modulation signal pulse end including the frequency change point, and the communication signal is
When switching from 0 "to" 1 ", a pulse is output to the signal 104 at the same timing as the signal 105. One of the two types of data that is approximately calculated by the arithmetic circuit 300 is selected by the signal 104, and the signal 105 is used. Only the data of the modulated signal pulse including the frequency change point is loaded into the counter 9 and the signal 104 is set in the flip-flop circuit 7. When the down-counting is completed, the data of the flip-flop circuit 7 is latched by the latch 8. Then, the demodulated signal 200 is output.

In the arithmetic circuit 300, the time τ to the change point of the demodulated signal is obtained by the approximation formula described below. In FIG. 3, the carrier frequency representing the signal “0” is f
When the frequency of the carrier representing 0 and the signal “1” is f1 and the communication rate is f0, the phase is continuous at the change point of the communication signal, and therefore the following formula is established. f1 x T0 + f0 x T1 = 1/2 ... (1) f0 x T2 + f1 x T3 = 1/2 ... (2) f1 x T4 + f0 x T5 = 1/2 ... (3) where Ta = As T2 + T3, T2 is calculated from equation (2) and substituted into it. Ta = 1 / (2 × f0) + T3 × (f0−f1) / f0 ∴T3 = −1 / (2 (f0−f1)) + Ta × f0 / (f0−f1) (4) On the other hand, assuming that Tb = T4 + T5, and obtaining T4 from the equation (3) and substituting this, Tb = 1 / (2 × f1) + T5 × (f1−f0) / f1∴T5 = −1 / (2 (f1−f0)) + Tb × f1 / (f1−f0) (5)

From FIG. 3, T3 + τ1 and T5 + τ2 must be constant values, and if this is C0 and the carrier frequencies are f0 = 1200 and f1 = 2200, equations (4) and (5) are as follows. become that way. τ1 = C0−1 / 2000 + 1.2 × (T2 + T3) τ2 = C0 + 1 / 2000−2.2 × (T4 + T5) where C0 = 1/2000 is approximated for simplicity, τ1 = (T2 + T3) (6) ) Τ2 = C−2 × (T4 + T5) (7) However, in this case, C = 1/1000. Becomes τ
1 is τ when the communication signal changes from "0" to "1"
2 is the time to the change point of the demodulation signal when the communication signal changes from "1" to "0", while "T2 + T3"
And "T4 + T5" are the modulation signal pulse widths including the frequency change points immediately before the time points τ1 and τ2 to the change point of the demodulated signal, respectively. Therefore, when the modulation signal pulse width including the frequency change point is T, the communication signal changes from "0" to "
When it changes to 1 ”, τ = T, the communication signal changes from“ 1 ”to“
When changing to 0 ″, the time τ to the change point of the demodulated signal can be obtained by the calculation τ = C−2 × T.

Although it is assumed that f0 = 1200 and f1 = 2200 in the description of the approximate expressions (6) and (7), the ratio of f0 to f1 is, for example, f0 = 240.
0, f1 = 4400, such as 6:11
If so, the approximation formula is the same except for the constant C. Therefore, the constant C, that is, the external input constant 102 is set to f0 and f.
By adjusting according to No. 1, it becomes possible to demodulate modulated signals of different carrier frequencies with the configuration of the embodiment of FIG.

[0011]

As is clear from the above description,
The present invention has the following effects. That is, since the time τ from the modulation signal pulse width T including the frequency change point to the change point of the demodulated signal can be approximated by a simple approximation formula, the approximate calculation circuit can be realized very simply. Further, by calculating the time τ to the change point of the demodulated signal by the approximate calculation circuit, the demodulator can be configured with a small circuit without including a table using a storage device such as a ROM. As a result, the chip area can be reduced, so that LSIs such as gate arrays can be used.
It becomes easy to convert. Furthermore, by adjusting the external input constant 102, it is possible to demodulate modulated signals of different carrier frequencies with the same configuration.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of an FSK communication demodulator according to the present invention.

FIG. 2 is a timing diagram showing an operation example of the communication demodulator of FIG. 1 according to the present invention.

FIG. 3 is a timing diagram for explaining an approximate calculation of the communication demodulator of FIG. 1 according to the present invention.

FIG. 4 is a timing diagram showing an example of a modulation signal of conventional FSK communication.

FIG. 5 is a timing diagram showing an operation example of a conventional communication demodulator for FSK communication.

FIG. 6 is a configuration diagram showing an embodiment of a communication demodulator for conventional FSK communication.

[Explanation of symbols]

 1 A / D converter 2 Edge detector 3,9 Counter 4,8 Latch 5 Signal change point detector 6 Table 7 Flip-flop circuit 10 Shifter 11 Subtractor 12 Multiplexer 100 Modulation signal 101 Sample clock 102 Constant 103, 104, 105 signal 200 demodulated signal 300 arithmetic circuit T modulated signal pulse width including frequency changing point τ time to changing point of demodulated signal C constant determined uniquely from two types of carrier frequencies

Claims (1)

[Claims] 1. A modulated signal is composed of two types of carrier frequencies, the carrier frequency is switched at a signal change point of a binary communication signal which is an original signal, and the phase is continuous at the change point of the carrier frequency. FSK communication in which the FSK communication signal is demodulated by changing the demodulated signal after a time τ uniquely determined from the modulation signal pulse width T from the end of the modulation signal pulse width T including the carrier frequency change point. In the demodulator, when the ratio of the carrier frequency of the first signal and the carrier frequency of the second signal is 6:11, from the modulated signal pulse width T and the carrier frequencies of the first and second signals, From the uniquely determined constant C, when the time τ changes from the first signal to the second signal, τ =
T, when changing from the second signal to the first signal, τ =
An FSK communication demodulator having an arithmetic circuit for obtaining an approximate expression of C-2 × T.