JPH0575240A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPH0575240A
JPH0575240A JP23281591A JP23281591A JPH0575240A JP H0575240 A JPH0575240 A JP H0575240A JP 23281591 A JP23281591 A JP 23281591A JP 23281591 A JP23281591 A JP 23281591A JP H0575240 A JPH0575240 A JP H0575240A
Authority
JP
Japan
Prior art keywords
solder resist
road map
pattern
printed wiring
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23281591A
Other languages
Japanese (ja)
Other versions
JP3010822B2 (en
Inventor
Kazutomo Higa
一智 比嘉
Akiko Tsujii
章子 辻井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP3232815A priority Critical patent/JP3010822B2/en
Publication of JPH0575240A publication Critical patent/JPH0575240A/en
Application granted granted Critical
Publication of JP3010822B2 publication Critical patent/JP3010822B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To improve adhesion between a solder resist and a road map and to restrain the road map from peeling off by forming the road map on a roughened solder resist. CONSTITUTION:A mask film 14 is manufactured, which is provided with photographic density difference to increase photographic density in the order of a background part 15, a road map pattern 16 and a solder resist pattern 17. The manufactured mask film 14 is vacuum-adhered onto a photosensitive solder resist ink 13a, exposed for ultraviolet hardening and developed. In a part corresponding to the road map pattern 16, photographic density of the road map pattern 16 is lower than that of the resist pattern 17 and higher than that of other exposed parts. Therefore, it is half-exposed and a surface thereof is roughened. An alkali development type photosensitive road map 18 is applied to a roughened part 18 of a solder resist 13b by a method such as screen print, set to touch and heated. Thereby, a printed wiring board wherein the solder resist 13b and the road map 18 are formed can be acquired.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、パーソナルコンピュー
タやワードプロセッサなどの各種電子機器に使用される
プリント配線板の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board used in various electronic devices such as personal computers and word processors.

【0002】[0002]

【従来の技術】近年、各種電子機器に数多く使用されて
いるプリント配線板は、電子機器の小型・軽量化や多機
能化に伴い、配線の高密度化や電子部品の表面実装化が
著しく、絶縁基板上に形成される導体パターンやランド
はますます狭ピッチ化,細線化,小形状化している。
2. Description of the Related Art In recent years, printed wiring boards, which are widely used in various electronic devices, are remarkably increased in wiring density and surface mounting of electronic components due to downsizing, weight reduction and multifunction of electronic devices. Conductor patterns and lands formed on insulating substrates are becoming narrower in pitch, thinner, and smaller.

【0003】そのため、はんだ不要部分のはんだ付着の
防止、導体パターンの酸化に対する保護、絶縁性の維持
やはんだ付け性の向上などの目的で、プリント配線板上
に形成されるソルダレジストやロードマップも高解像
度,高位置精度および高品質が要求されており、その形
成方法もスクリーン印刷法からマスクフィルムによる写
真現像法に代わりつつある。
Therefore, a solder resist and a road map formed on a printed wiring board are also used for the purpose of preventing solder from adhering to unnecessary portions of the solder, protecting the conductor pattern against oxidation, maintaining insulation and improving solderability. High resolution, high positional accuracy and high quality are required, and the forming method is changing from the screen printing method to the photographic developing method using a mask film.

【0004】以下に、従来のプリント配線板の製造方法
について説明する。図2は従来のプリント配線板の写真
現像法によるソルダレジストおよびロードマップ形成の
製造過程を示すものである。まず、図2において、1は
絶縁基板、2はこの絶縁基板1の片面に所定の配線パタ
ーンで形成した導体パターン、3aはこの導体パターン
を覆うように絶縁基板1の片面全体に形成した感光性ソ
ルダレジストインキ、3bはこの感光性ソルダレジスト
インキ3aの所定の部分を露光・現像することにより形
成したソルダレジスト、4はソルダレジスト形成用マス
クフィルム、5aは上記ソルダレジスト3b上に形成し
た感光性ロードマップインキ、5bはこの感光性ロード
マップインキ5aの所定の部分を露光・現像することに
より形成したロードマップ、6はロードマップ形成用マ
スクフィルムである。
A conventional method for manufacturing a printed wiring board will be described below. FIG. 2 shows a conventional manufacturing process of forming a solder resist and a road map by a photo-developing method of a printed wiring board. First, in FIG. 2, 1 is an insulating substrate, 2 is a conductor pattern formed on one surface of the insulating substrate 1 with a predetermined wiring pattern, and 3a is a photosensitive layer formed on one entire surface of the insulating substrate 1 so as to cover the conductor pattern. Solder resist ink, 3b is a solder resist formed by exposing and developing a predetermined portion of the photosensitive solder resist ink 3a, 4 is a solder resist forming mask film, and 5a is a photosensitive film formed on the solder resist 3b. Roadmap ink, 5b is a roadmap formed by exposing and developing a predetermined portion of the photosensitive roadmap ink 5a, and 6 is a roadmap forming mask film.

【0005】以上のように構成されたプリント配線板の
ソルダレジストおよびロードマップの形成について、以
下に説明する。
The formation of the solder resist and the road map of the printed wiring board constructed as described above will be described below.

【0006】まず、所定の大きさに切断した銅張積層板
(図示せず)にスクリーン印刷法や写真現像法などでエ
ッチングレジストを形成した後、塩化第2銅などの溶液
を用いたエッチングにより、導体パターン2を形成し、
その後エッチングレジストを剥離する。
First, an etching resist is formed on a copper clad laminate (not shown) cut into a predetermined size by a screen printing method or a photo-developing method, and then etching is performed using a solution of cupric chloride or the like. , Forming the conductor pattern 2,
After that, the etching resist is removed.

【0007】その後、図2(a)に示すように、絶縁基
板1上に導体パターン2が形成されたプリント配線板に
感光性ソルダレジストインキ3aを塗布し、熱風などに
より指触乾燥を行う。
After that, as shown in FIG. 2A, a photosensitive solder resist ink 3a is applied to a printed wiring board having a conductor pattern 2 formed on an insulating substrate 1 and dried by touching with hot air.

【0008】次に、図2(b)に示すように、ソルダレ
ジスト形成用マスクフィルム4を指触乾燥させた感光性
ソルダレジストインキ3a面に密着させ、紫外線露光し
た後、図2(c)のように、未露光部分を所定の現像液
で現像・除去し、ソルダレジスト3bを形成する。
Next, as shown in FIG. 2B, the solder resist forming mask film 4 is brought into close contact with the surface of the photosensitive solder resist ink 3a, which has been dried by touch with the finger, and is exposed to ultraviolet rays. As described above, the unexposed portion is developed and removed with a predetermined developing solution to form the solder resist 3b.

【0009】その後、図2(d)に示すように、感光性
ロードマップインキ5aをソルダレジスト3b上にロー
ドマップ5b形成に必要な部分よりやや広い範囲に塗布
し、同様に指触乾燥を行う。その後、図2(e)に示す
ように、ロードマップ形成用マスクフィルム6を指触乾
燥させたロードマップインキ5a面に密着させ、紫外線
露光した後、図2(f)のように、未露光部分を所定の
現像液で現像・除去する。
Thereafter, as shown in FIG. 2 (d), the photosensitive roadmap ink 5a is applied on the solder resist 3b in an area slightly wider than the area necessary for forming the roadmap 5b, and the touch-sensitive drying is similarly performed. .. After that, as shown in FIG. 2E, the roadmap forming mask film 6 is brought into close contact with the surface of the roadmap ink 5a that has been touch-dried, and after UV exposure, unexposed as shown in FIG. The part is developed and removed with a predetermined developing solution.

【0010】その後、ソルダレジスト3bおよびロード
マップ5bの絶縁基板や導体パターンへの接着性や硬度
などを向上させるために熱風などで再度処理し、ソルダ
レジスト3bおよびロードマップ5bをプリント配線板
上に形成する。
After that, the solder resist 3b and the road map 5b are treated again with hot air or the like in order to improve the adhesion and hardness of the solder resist 3b and the road map 5b to the insulating substrate and the conductor pattern. Form.

【0011】[0011]

【発明が解決しようとする課題】しかしながら上記の従
来の構成では、ソルダレジストおよびロードマップは高
解像性を有するものの、指触乾燥条件や現像条件の適正
範囲内においてもアンダーカット発生の危険性を有して
いる。
However, in the above-mentioned conventional structure, although the solder resist and the road map have high resolution, there is a risk of undercut occurrence even within the appropriate range of dry-to-touch conditions and development conditions. have.

【0012】すなわち、従来のスクリーン印刷法により
形成したロードマップの断面形状は、角のとれた台形状
であるのに対し、写真現像法により形成したロードマッ
プの断面形状はマスクフィルムの厚さや露光光源の平行
度などによる光の回折現象などにより矩形もしくは逆台
形となる。このため横方向からの外力に対してロードマ
ップは脆弱となり、プリント配線板の搬送や金型による
外形などの打ち抜き加工時などにロードマップのはがれ
が発生し、プリント配線板の製造工程の歩留りを著しく
悪化させていた。
That is, the cross-sectional shape of the road map formed by the conventional screen printing method is a trapezoid with sharp corners, whereas the cross-sectional shape of the road map formed by the photographic development method is the thickness of the mask film and the exposure. It becomes a rectangle or an inverted trapezoid due to the diffraction phenomenon of light due to the parallelism of the light source. For this reason, the roadmap becomes vulnerable to external force from the lateral direction, and the roadmap peels off during transportation of the printed wiring board or punching of the outer shape with a die, etc., which reduces the yield of the printed wiring board manufacturing process. It was significantly worse.

【0013】また、プリント配線板の製造工程途中では
がれが発生しなくても、電子機器の製造工程や市場にお
いて外力や振動などが加わった場合、はがれが発生し、
はんだ付け性を阻害させたり精密部品の機能に障害をも
たらすなどの問題点を有していた。
Further, even if peeling does not occur during the manufacturing process of the printed wiring board, peeling occurs when external force or vibration is applied in the manufacturing process of the electronic device or in the market.
There are problems such as impairing solderability and impairing the function of precision parts.

【0014】本発明はこのような従来の問題点を解決す
るもので、プリント配線板のロードマップのはがれを抑
制することを目的とする。
The present invention solves such conventional problems, and an object of the present invention is to suppress peeling of the road map of a printed wiring board.

【0015】[0015]

【課題を解決するための手段】この目的を達成するため
に本発明のプリント配線板の製造方法は、絶縁基板上に
導体パターンを形成する工程と、その導体パターンを覆
うように絶縁基板上に感光性ソルダレジストインキを塗
布・乾燥する工程と、その感光性ソルダレジストインキ
を背景部分,ロードマップパターン,ソルダレジストパ
ターンの順に写真濃度が大きくなるようにソルダレジス
トパターンおよびロードマップパターンを形成したマス
クフィルムで露光・現像する工程と、その工程において
粗化されたソルダレジスト上のロードマップパターン部
分にロードマップを形成する工程の構成を有している。
To achieve this object, a method of manufacturing a printed wiring board according to the present invention comprises a step of forming a conductor pattern on an insulating substrate, and a step of forming the conductor pattern on the insulating substrate so as to cover the conductor pattern. A mask on which a solder resist pattern and a roadmap pattern are formed such that the photosensitive solder resist ink is applied and dried, and the photosensitive solder resist ink has a background portion, a roadmap pattern, and a solder resist pattern in order of increasing photographic density. It comprises a process of exposing and developing with a film and a process of forming a road map on the road map pattern portion on the solder resist roughened in the process.

【0016】[0016]

【作用】背景部分,ロードマップパターン,ソルダレジ
ストパターンの順に写真濃度が大きくなるようにソルダ
レジストパターンおよびロードマップパターンを形成し
たマスクフィルムにより同時露光することにより、ソル
ダレジストのロードマップを形成する部分の表面が粗化
される。
[Function] A portion where a road map of the solder resist is formed by simultaneously exposing the mask film on which the solder resist pattern and the road map pattern are formed so that the photographic density increases in the order of the background portion, the road map pattern, and the solder resist pattern. Surface is roughened.

【0017】その後、ソルダレジスト表面の粗化された
部分にロードマップが形成され、これによりソルダレジ
ストとロードマップの密着性を著しく改善することがで
きる。
After that, a road map is formed on the roughened portion of the solder resist surface, whereby the adhesion between the solder resist and the road map can be remarkably improved.

【0018】[0018]

【実施例】以下本発明の一実施例について、図面を参照
しながら説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0019】図1(a),(b),(c),(d)は、
本発明の一実施例におけるプリント配線板の製造過程を
示すものである。図1において、11は絶縁基板、12
はこの絶縁基板1の片面に所定の配線パターンで形成し
た導体パターン、13aはこの導体パターン12を覆う
ように絶縁基板11の片面全体に形成した感光性ソルダ
レジストインキ、13bはこの感光性ソルダレジストイ
ンキ13aの所定の部分を露光・現像することにより形
成したソルダレジスト、14は写真濃度差を有するソル
ダレジスト形成用のマスクフィルムで、背景部分15,
ロードマップパターン16,ソルダレジストパターン1
7の順に写真濃度が大きくなるように、ロードマップパ
ターン16およびソルダレジストパターン17が形成さ
れている。18はロードマップで、上記ソルダレジスト
13b表面に形成された粗化部分19に形成されてい
る。
1 (a), (b), (c) and (d),
3 shows a process of manufacturing a printed wiring board according to an embodiment of the present invention. In FIG. 1, 11 is an insulating substrate, 12
Is a conductor pattern formed by a predetermined wiring pattern on one surface of the insulating substrate 1, 13a is a photosensitive solder resist ink formed on the entire one surface of the insulating substrate 11 so as to cover the conductor pattern 12, and 13b is this photosensitive solder resist. A solder resist formed by exposing and developing a predetermined portion of the ink 13a, 14 is a mask film for forming a solder resist having a photographic density difference, and a background portion 15,
Roadmap pattern 16, solder resist pattern 1
The road map pattern 16 and the solder resist pattern 17 are formed so that the photographic density increases in the order of 7. Reference numeral 18 is a road map, which is formed on the roughened portion 19 formed on the surface of the solder resist 13b.

【0020】以上のように構成されたプリント配線板の
ソルダレジストおよびロードマップ形成について、説明
する。
The formation of the solder resist and the roadmap of the printed wiring board having the above structure will be described.

【0021】はじめに、通常のプリント配線板の製造に
用いられるソルダレジストおよびロードマップ形成用マ
スクフィルムとして、ネガパターンを作成し準備する。
次に、ポリエステルフィルムに感光層の塗布された未露
光のフィルムにまず、ソルダレジスト形成用マスクフィ
ルムのネガパターンを密着させ、通常の露光条件にて露
光し、ついでロードマップ形成用マスクフィルムのネガ
パターンを同位置に密着させ、通常の露光量の約1/3
〜1/5の条件で露光し、通常条件にて現像を行い、本
発明で用いる背景部分15,ロードマップパターン1
6,ソルダレジストパターン17に順に写真濃度が大き
くなるように写真濃度差を有するマスクフィルム14を
作成する。
First, a negative pattern is prepared and prepared as a solder resist and a roadmap forming mask film used for manufacturing a usual printed wiring board.
Next, the negative pattern of the mask film for solder resist formation is first brought into close contact with the unexposed film having the photosensitive layer coated on the polyester film, exposed under normal exposure conditions, and then the negative of the mask film for roadmap formation. Align the pattern at the same position, about 1/3 of the normal exposure amount
Exposure under conditions of ⅕ and development under normal conditions, background portion 15 used in the present invention, roadmap pattern 1
6. A mask film 14 having a photographic density difference is formed so that the photographic density increases in order on the solder resist pattern 17.

【0022】次に、図1(a)に示すように、導体パタ
ーン12を形成した絶縁基板11上にスクリーン印刷法
やカーテンコーターなどの方法を用いてアルカリ現像型
の感光性ソルダレジストインキ13aを塗布し、80〜
85℃で15〜20分間塗膜を乾燥する。
Next, as shown in FIG. 1A, an alkali developing type photosensitive solder resist ink 13a is formed on the insulating substrate 11 on which the conductor pattern 12 is formed by a method such as a screen printing method or a curtain coater. Apply, 80 ~
Dry the coating at 85 ° C for 15-20 minutes.

【0023】次に図1(b)に示すように、上記の方法
で作成したマスクフィルム14を感光性ソルダレジスト
インキ13a上に真空密着し、400〜500mj/m2
露光量で紫外線硬化する。その後、図1(c)のよう
に、1wt%の炭酸ソーダの現像液でスプレー圧力1.5
〜2.0kg/cm2で45〜60秒の条件で現像する。現
像後、ソルダレジストパターン17に対応する部分は未
露光部となって全て溶解・除去され、またロードマップ
パターン16に対応する部分は、ロードマップパターン
16がソルダレジストパターン17より写真濃度が低
く、他の露光部分より濃度が高いことから、半露光状態
となり、表面は粗化する。
Next, as shown in FIG. 1 (b), the mask film 14 prepared by the above method is vacuum-adhered to the photosensitive solder resist ink 13a and UV-cured at an exposure dose of 400 to 500 mj / m 2. .. Then, as shown in FIG. 1C, a spray pressure of 1.5 wt.
Develop at -2.0 kg / cm 2 for 45-60 seconds. After the development, the portion corresponding to the solder resist pattern 17 becomes an unexposed portion and is completely dissolved and removed. Further, in the portion corresponding to the road map pattern 16, the road map pattern 16 has a lower photographic density than the solder resist pattern 17, Since the density is higher than that of the other exposed portions, it becomes a semi-exposed state and the surface is roughened.

【0024】その後、アルカリ現像型の感光性のロード
マップ18をスクリーン印刷などの方法でソルダレジス
ト13bの粗化部分18に塗布して指触乾燥させ、14
0〜150℃の雰囲気温度で40〜60分間加熱するこ
とにより、図1(d)のように、ソルダレジスト13b
とロードマップ18が形成された所望のプリント配線板
が得られる。
Thereafter, an alkali development type photosensitive road map 18 is applied to the roughened portion 18 of the solder resist 13b by a method such as screen printing and dried by touching with a finger.
By heating at an atmospheric temperature of 0 to 150 ° C. for 40 to 60 minutes, as shown in FIG.
A desired printed wiring board on which the road map 18 is formed can be obtained.

【0025】本実施例によるプリント配線板について、
ロードマップ18のソルダレジスト13bに対する密着
性を調べたところ、鉛筆硬度試験において6〜7Hとな
り、従来のロードマップ3〜4Hに対して改善された結
果を得ることができた。
Regarding the printed wiring board according to this embodiment,
When the adhesion of the roadmap 18 to the solder resist 13b was examined, it was 6 to 7H in the pencil hardness test, and it was possible to obtain an improved result as compared with the conventional roadmaps 3 to 4H.

【0026】なお、本実施例において、プリント配線板
の構造は片面プリント配線板としたが、両面や多層プリ
ント配線板としてもよい。また、感光性ソルダレジスト
インキ13aはアルカリ現像型としたが、溶剤現像型と
してもよく、さらにロードマップ18は感光性のアルカ
リ現像型としたが、スクリーン印刷用のUV硬化型や熱
硬化型としても同様な効果が得られる。
Although the structure of the printed wiring board is a single-sided printed wiring board in this embodiment, it may be a double-sided or multilayer printed wiring board. Further, although the photosensitive solder resist ink 13a is of the alkali development type, it may be of the solvent development type, and the road map 18 is of the photosensitive alkali development type, but may be of the UV curing type or the heat curing type for screen printing. Also has the same effect.

【0027】[0027]

【発明の効果】以上のように本発明は、粗化されたソル
ダレジスト上にロードマップが形成されるため、ソルダ
レジストとロードマップの密着性が著しく改善され、ロ
ードマップのはがれを抑制することが可能となり、これ
によってプリント配線板の製造工程の歩留りを向上させ
ることができるとともに、電子機器の信頼性を向上させ
るプリント配線板を実現できるものである。
As described above, according to the present invention, since the roadmap is formed on the roughened solder resist, the adhesion between the solder resist and the roadmap is remarkably improved, and the peeling of the roadmap is suppressed. This makes it possible to improve the yield of the manufacturing process of the printed wiring board and to realize the printed wiring board that improves the reliability of the electronic device.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)〜(d)は本発明の一実施例によるプリ
ント配線板の製造方法における要部工程の断面図
1A to 1D are cross-sectional views of a main process in a method for manufacturing a printed wiring board according to an embodiment of the present invention.

【図2】(a)〜(f)は従来のプリント配線板の製造
方法における要部工程の断面図
2 (a) to 2 (f) are cross-sectional views of a main process in a conventional method for manufacturing a printed wiring board.

【符号の説明】[Explanation of symbols]

11 絶縁基板 12 導体パターン 13a 感光性ソルダレジストインキ 13b ソルダレジスト 14 マスクフィルム 15 背景部分 16 ロードマップパターン 17 ソルダレジストパターン 18 ロードマップ 19 粗化部分 11 Insulating Substrate 12 Conductor Pattern 13a Photosensitive Solder Resist Ink 13b Solder Resist 14 Mask Film 15 Background Part 16 Roadmap Pattern 17 Solder Resist Pattern 18 Roadmap 19 Roughened Part

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】絶縁基板上に導体パターンを形成する工程
と、その導体パターンを覆うように絶縁基板上に感光性
ソルダレジストインキを塗布・乾燥する工程と、その感
光性ソルダレジストインキを背景部分,ロードマップパ
ターン,ソルダレジストパターンの順に写真濃度が大き
くなるようにソルダレジストパターンおよびロードマッ
プパターンを形成したマスクフィルムで露光・現像する
工程と、その工程において粗化されたソルダレジスト上
のロードマップパターン部分にロードマップを形成する
工程を有するプリント配線板の製造方法。
1. A step of forming a conductor pattern on an insulating substrate, a step of applying and drying a photosensitive solder resist ink on the insulating substrate so as to cover the conductor pattern, and a background portion of the photosensitive solder resist ink. , A process of exposing and developing with a mask film on which a solder resist pattern and a road map pattern are formed so that the photographic density increases in the order of the road map pattern and the solder resist pattern, and the road map on the solder resist roughened in the process A method for manufacturing a printed wiring board, comprising a step of forming a road map on a pattern portion.
JP3232815A 1991-09-12 1991-09-12 Manufacturing method of printed wiring board Expired - Fee Related JP3010822B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3232815A JP3010822B2 (en) 1991-09-12 1991-09-12 Manufacturing method of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3232815A JP3010822B2 (en) 1991-09-12 1991-09-12 Manufacturing method of printed wiring board

Publications (2)

Publication Number Publication Date
JPH0575240A true JPH0575240A (en) 1993-03-26
JP3010822B2 JP3010822B2 (en) 2000-02-21

Family

ID=16945212

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3232815A Expired - Fee Related JP3010822B2 (en) 1991-09-12 1991-09-12 Manufacturing method of printed wiring board

Country Status (1)

Country Link
JP (1) JP3010822B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010010325A (en) * 2008-06-26 2010-01-14 Elna Co Ltd Printed circuit board, and method of forming solder resist of printed circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010010325A (en) * 2008-06-26 2010-01-14 Elna Co Ltd Printed circuit board, and method of forming solder resist of printed circuit board

Also Published As

Publication number Publication date
JP3010822B2 (en) 2000-02-21

Similar Documents

Publication Publication Date Title
JP3019503B2 (en) Manufacturing method of printed wiring board
JP3031042B2 (en) Printed wiring board for surface mounting
JP2005142254A (en) Wiring board and manufacturing method therefor
US5316894A (en) Method of making printed wiring boards
JPH0575240A (en) Manufacture of printed wiring board
JP2586797B2 (en) Manufacturing method of printed wiring board
JP2900639B2 (en) Manufacturing method of printed wiring board
JP2006201434A (en) Photomask for exposure of solder resist and wiring substrate exposed using the same or method for producing the same
JPH04267397A (en) Manufacture of printed wiring board
JP2910261B2 (en) Printed wiring board and its manufacturing method
JP3010869B2 (en) Manufacturing method of printed wiring board
JP2897365B2 (en) Manufacturing method of wiring board
JP3019502B2 (en) Printed wiring board and its manufacturing method
JP3533682B2 (en) Manufacturing method of printed wiring board
JP3185345B2 (en) Printed circuit board manufacturing method
JP2587544B2 (en) Manufacturing method of printed wiring board
JPH05235523A (en) Manufacture of printed wiring board
JPH02144988A (en) Manufacture of wiring board with through hole
JP3755193B2 (en) Method and apparatus for manufacturing printed wiring board
JP2546935B2 (en) Method for manufacturing printed wiring board
JP3395223B2 (en) Manufacturing method of printed wiring board
JPH04277695A (en) Printed wiring board
JP2002111225A (en) Printed-wiring board, its manufacturing method, and photomask used therefor
JPH0927673A (en) Printed wiring board and manufacture thereof
JPS5821839B2 (en) printed board

Legal Events

Date Code Title Description
FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20071210

Year of fee payment: 8

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081210

Year of fee payment: 9

LAPS Cancellation because of no payment of annual fees