JPH0575163A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the drop of yield due to wiring discontinuity when electrode wiring is performed on a semiconductor single crystal formed in an island-shape on a substrate. CONSTITUTION:A base body composed of a nucleus-nonforming surface whose nucleus density is small and a nucleus-forming surface which is positioned to adjoin the non-nucleation surface and whose area is sufficiently small for a crystal to grow from a single nucleus and whose nucleus density is larger than that of the nucleus-nonforming surface and which is composed of non-single crystal materials are nucleus-forming processed so as to grow a semiconductor crystal which extends from a single nucleus on the nucleation surface, through the nucleus-forming surface, to the nucleus-nonforming surface, thus, an insulating film is formed on a semiconductor crystal. After a wiring electrode 14 is formed on it, a metallic film 16 is selectively formed only on the wiring electrode 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device which can be preferably applied to wiring of single crystal and polycrystal semiconductor elements formed in an island shape on an amorphous substrate. Regarding

[0002]

2. Description of the Related Art Conventionally, single crystal thin films used for semiconductor electronic devices, optical devices, etc. have been formed by epitaxial growth on a single crystal substrate. For example, it is known that Si, Ge, GaAs, etc. are epitaxially grown from a liquid phase, a vapor phase or a solid phase on a Si single crystal substrate (silicon wafer), and Ga is formed on the GaAs single crystal substrate.
It is known that single crystals of As, GaAlAs, etc. grow epitaxially. Using the semiconductor thin film thus formed, a semiconductor element, an integrated circuit, a semiconductor laser, a light emitting element such as an LED, or the like is manufactured.

Recently, research and development of ultra-high speed transistors using two-dimensional electron gas and superlattice elements using quantum wells have been actively conducted. What made these possible are, for example, ultra-high vacuum. It is a high-precision epitaxial technique such as MBE (Molecular Beam Epitaxy) and MOCVD (Metal Organic Chemical Vapor Deposition) used.

In such epitaxial growth on a single crystal substrate, it is necessary to match the lattice constant and the thermal expansion coefficient between the single crystal material of the substrate and the epitaxial growth layer. If this matching is insufficient, lattice defects develop in the epitaxial layer. In addition, the element forming the substrate may diffuse into the epitaxial layer.

As described above, it is understood that the conventional method for forming a single crystal thin film by epitaxial growth largely depends on the substrate material. Mathews et al. Are investigating the combination of substrate material and epitaxial growth layer (EPI
TAXIAL GROWTH. Academic Pr
ess. New York. 1975 ed. byJ.
W. Mathews).

Further, the size of the substrate is currently about 6 inches for a Si wafer, and GaAs. Larger sapphire substrates have been delayed. In addition, since the manufacturing cost of the single crystal substrate is high, the cost per chip is high.

As described above, in order to form a single crystal layer capable of producing a high quality device by the conventional method, the kind of substrate material is limited to an extremely narrow range.

On the other hand, research and development of a three-dimensional integrated circuit in which semiconductor elements are laminated in the direction normal to the substrate to achieve high integration and multi-functionalization have been actively conducted in recent years, and on a cheap glass. Research and development of large-area semiconductor devices such as solar cells in which elements are arranged in an array and switching transistors of liquid crystal pixels are becoming more and more active year by year.

What is common to both of these is that a technique for forming a semiconductor thin film on an amorphous insulator substrate and forming an electronic element such as a transistor on the semiconductor thin film is required. Among them, in particular, a technique for forming a high quality single crystal semiconductor layer on an amorphous insulator substrate has been desired.

Therefore, the present inventors have developed a selective nucleation method as a technique for growing a single crystal on this amorphous substrate (Japanese Patent Application Laid-Open No. 63-63119).
No. 237517, Japanese Patent Application Laid-Open No. 64-723, Japanese Patent Application Laid-Open No. 64-740). Here, the selective nucleation method includes an amorphous or polycrystalline non-nucleation surface with a small nucleation density and an area sufficiently small for single crystal growth to grow crystals. A single crystal is grown from a single nucleus by subjecting a substrate having a free surface, which is arranged adjacent to an amorphous or polycrystalline nucleation surface having a nucleation density higher than the density, to a crystal growth treatment. It is a thing.

A light emitting element (JP-A-63-239988, JP-A-1-51677), a solar cell (JP-A-1-51671) and the like are used as semiconductor elements using this selective nucleation method. Proposed. Hereinafter, a manufacturing process of a semiconductor device (light emitting element) using the selective nucleation method will be briefly described.

41 to 43 are schematic process diagrams showing a manufacturing process of a light emitting device using the selective nucleation method.

First, as shown in FIG. 41, a fine thin film to be a nucleation surface is formed on a substrate 202 on which a thin film to be a non-nucleation surface is deposited, and this thin film is subjected to crystal growth treatment to form a single nucleus. A single crystal 201 of one conductivity type is generated around this single nucleus, and a single crystal 200 of the opposite conductivity type is grown thereon.
To form. In the figure, X indicates one region in which a single crystal 201 of one conductivity type is formed with a single crystal 200 of the opposite conductivity type.

Next, as shown in FIG. 42, a flattening process is performed to remove parts of the single crystal 201 and the single crystal 200, and as shown in FIG. 43, an insulating film 205 is formed.
The wiring electrode 204 is formed. 42 and 43, only the X region of FIG. 41 is shown for simplification.

[0015]

In the conventional method of manufacturing a semiconductor device, the semiconductor single crystal 201 and the semiconductor single crystal 200 on the substrate grow in an island shape as shown in FIG. 41. Therefore, as shown in FIG. , Single crystal 200 even after planarization
Then, a portion 203 which is in contact with the base body 202 is likely to be shaded.

When the wiring electrode 204 is formed by vapor deposition or sputtering which has been conventionally used, a single crystal 200 is formed.
As shown in the region 206, the wiring electrode 204 becomes thin on the portion 203 where the base 202 and the base member 202 are in contact with each other, and disconnection easily occurs. This has been a cause of reduction in yield during device fabrication.

Therefore, in view of the above points, an object of the present invention is to provide a method of manufacturing a semiconductor device in which a junction of crystal islands can be wired without disconnection.

[0018]

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention comprises a non-nucleation surface having a low nucleation density and a non-nucleation surface disposed adjacent to the non-nucleation surface. A crystal forming treatment is performed on a substrate having an area sufficiently smaller than that of only nuclei for growing crystals and having a nucleation density higher than that of the non-nucleation surface and a nucleation surface formed of a non-single crystal material. To grow a semiconductor crystal extending from the single nucleus on the nucleation surface to the non-nucleation surface over the nucleation surface, and an insulating film is formed on the semiconductor crystal. After forming the wiring electrode, the metal film is selectively formed only on the wiring electrode.

Al is mainly used as a material for the wiring electrodes.
For forming these, a method of depositing an Al film on the entire surface of the sample and then performing etching to process it into a desired pattern is used.

The method for depositing the Al film in the present invention is MOC.
VD (Metal Organic CVD, Organometallic C
It is desirable to use the VD,) method.

As a method of forming an Al film by the MOCVD method, a method of dispersing organic aluminum in a carrier gas and transporting it to a heating substrate and thermally decomposing gas molecules on the substrate to form a film is used.

In the present invention, it is preferable to use the MOCVD method using organometallic aluminum.
In the method D, the film grows due to the surface reaction on the surface of the substrate, and therefore the surface coverage with respect to the unevenness such as the stepped portion of the surface is good. Therefore, the disconnection at the stepped portion between the semiconductor crystal and the substrate which occurs in the present invention is avoided. Because you can. In addition, there is no damage of charged particles unlike the plasma CVD method and the sputtering method.

As a method of depositing an Al film by using the MOCVD method, for example, the Journalal flectr is used.
Chemical Society Vol. 131, No. 21
In the example found on page 75 (1984), triisobutylaluminum {(iC ₄
H ₉ ) ₃ Al} (TIBA) is used and the film forming temperature is 260
℃, the reaction tube pressure 0.5Torr film formation, 3.4μΩ ·
A cm film is formed.

When TIBA is used, TiC is formed before film formation.
A continuous film cannot be obtained without pretreatment such as flowing l ₄ to activate the substrate surface and form nuclei. Also, TiC
In general, when TIBA is used, including the case where 1 ₄ is used, the surface flatness is poor. JP 63-
Japanese Patent No. 33569 describes a method of forming a film by heating organic aluminum in the vicinity of the substrate without using TiCl ₄ . In this case, it is specified that a step of removing the natural oxide film on the substrate surface is necessary. Since TIBA can be used alone, it is not necessary to use a carrier gas other than TIBA.
It is described that a gas may be used as a carrier gas. However, the reaction between TIBA and another gas (for example, H ₂ ) is not assumed at all, and there is no description that hydrogen is used as a carrier gas. In addition to TIBA, trimethylaluminum (TMA) is listed, but there is no specific description of other gases. This is because the chemical properties of organometallics generally change greatly when the organic substituents attached to the metallic elements change a little, so it is necessary to individually consider what kind of organometallic should be used.

Electrochemical Soc
Page 75 of the 2nd symposium of japan Japan Chapter (July 7, 1989) has a description about Al film formation by the double wall CVD method. This way T
The device is designed so that the gas temperature is higher than the substrate temperature using IBA. This method is not only difficult to control the difference between the gas temperature and the substrate surface temperature, but also has the drawback that the cylinder and the pipe must be heated. Moreover, this method has problems that a uniform continuous film cannot be formed unless the film is thickened to some extent, the flatness of the film is poor, and the selectivity cannot be maintained for a long time.

Organometallic aluminum which is superior to TIBA in film flatness and selectivity and which is preferably used in the present invention includes dimethyl aluminum hydride, diethyl aluminum hydride, monomethyl aluminum hydride and the like.

Next, embodiments of the present invention will be described with reference to the drawings. 1 to 10 are schematic process diagrams of a light emitting element according to the method for manufacturing a semiconductor device of the present invention.

As shown in FIG. 1, a material having a low nucleation density on a base material 1 (for example, ceramics such as Al ₂ O ₃ , AlN and BN, quartz, high melting point glass and high melting point metals such as W and Mo). A non-nucleated surface 3 is formed by depositing a thin film 2 (for example, non-single crystalline SiO ₂ , Si ₃ N ₄ such as amorphous or polycrystalline). To form this thin film, a CVD method, a sputtering method, a vapor deposition method, a coating method using a dispersion medium, or the like is used. Further, as shown in FIG. 11, the support 5 made of a material having a low nucleation density may be used instead of the base material 1.

Next, as shown in FIG. 2, materials having a higher nucleation density than the non-nucleation surface 3 (non-single crystalline Al ₂ O ₃ , Al
(N, Ta ₂ O ₅ , TiO ₂ , WO ₃ etc.) and a small enough area (preferably 10 μm square or less, optimally 2 μm square or less) to form only a single crystal nucleus. The nucleation surface 4 is formed. In addition to finely patterning the thin film in this way, as shown in FIG. 12, a thin film 6 made of a material having a high nucleation density is deposited on the underlayer, and a thin film 2 made of a material having a low nucleation density is stacked on the thin film 6 to be non-nuclear. As the formation surface 3, a fine window may be opened by etching to expose the nucleation surface 4. As shown in FIG. 13, a recess is formed in the thin film 2 made of a material having a low nucleation density, and the bottom surface of the recess is formed. A fine window may be opened to expose the nucleation surface 4 (in this case, crystals are formed in the recess). Further, as shown in FIGS. 14 and 15, a fine region is left and the others are covered with a resist 7, and ions (As, P, Ga, Al, I
n or the like) may be implanted into the thin film 2 made of a material having a low nucleation density to form the ion implantation region 8 having a high nucleation density.

Next, as shown in FIG. 3, a compound semiconductor crystal is grown on the thus obtained substrate by MOCVD.

FIG. 16 shows a schematic view of the MOCVD apparatus used. Although the horizontal type low pressure MOCVD apparatus is shown here, it may be a vertical type for holding the substrate vertically or another type. The chamber 307 is made of quartz with a water cooling jacket, and the inside of the chamber 307 is evacuated to about 10 ⁻⁶ torr by the turbo molecular pump 315 except during crystal growth. The substrate holder 308 is made of carbon and can be heated to 900 ° C. by receiving power from a high frequency coil (not shown) provided outside the chamber. The substrate temperature is measured by a thermocouple 310 in the holder 308 and is fed back to high frequency power so that it can be controlled.

The raw material gas is introduced from the left end of the chamber 307. Liquid raw materials such as trimethyl gallim, trimethyl aluminum, diethyl selenium, and diethyl zinc are filled in bubblers 304 to 306 and kept at a predetermined temperature by a thermostat (not shown). This is bubbled with hydrogen gas controlled by a mass flow controller (MFC) and transported as vapor into the chamber 307.

A gaseous source such as arsine 301 is MFC
Directly to the chamber 307. Further, HCl 303 used as an etching gas is introduced into the chamber through a pipe of a system different from the source gas. The gas introduced into the chamber 307 passes near the substrate 309 and is exhausted by the rotary pump 311. At this time, the aforementioned turbo molecular pump is separated from the system by the valve 314. The reaction pressure is controlled by the conductance variable valve 312.

Compound semiconductors (for example, GaAs, GaAlAs, G) are formed on the substrate by the above-mentioned low pressure MOCVD apparatus.
III such as aP, GaAsP, InP, GaInAsP
-V group, ZnSe, ZnS, ZnTe, CdSe, Cd
II-IV such as S, CdTe, HgTe, HgCdTe
Group) crystal nuclei 9 are generated. The substrate temperature at this time is III
In the case of a group V compound, it is preferably 550 to 850 ° C, more preferably 600 to 800 ° C, most preferably 650 to 75 ° C.
0 ° C., the reaction pressure is preferably 100 torr or less, more preferably 50 torr or less, most preferably 20 t
It is less than orr.

The feed molar ratio of group V / group III is preferably 10 to 120, more preferably 30 to 80, and most preferably 50 to 70.

In the case of the II-VI group compound, the substrate temperature at this time is preferably 250 to 600 ° C., more preferably 3 ° C.
The reaction pressure is preferably 0 to 550 ° C., optimally 350 to 500 ° C., and the reaction pressure is preferably 80 torr or less, more preferably 30 torr or less, optimally 15 torr or less.
The VI / II supply molar ratio is preferably 10 to 10.
It is 0, more preferably 20 to 80, most preferably 30 to 60. Here, the raw material gas used in the MOCVD method of the present invention will be described.
_{3) 3, Al (C 2} H 3) 3, Al (i-C 4 H 9)
₃ , Ga (CH ₃ ) ₃ , Ga (C ₂ H ₅ ) ₃ , In (C _{2
H 5) 3, In (C} 3 H 7) 3, In (C 4 H 9) 3,
Examples of group V raw materials include NH ₃ , N ₂ , PH ₃ , TBP, and A.
_{sH 3, TBA, Sb (CH} 3) 3, Sb (C 3 H 7)
₃ , Sb (C ₄ H ₉ ) ₃ and Group II raw material include Zn (C
H ₃ ) ₂ , Zn (C ₂ H ₅ ) ₂ , Cd (CH ₃ ) ₂ , C
d (C ₂ H ₅ ) ₂ , Hg (CH ₃ ) ₂ , Hg (C ₂ H
₅ ) ₂ and VI group raw materials include H ₂ S, H ₂ Se, Se
_{(CH 3) 2, Se (} C 2 H 5) 2, Te (CH 3)
₂ , Te (C ₂ H ₅ ) ₂ , and the doping gas is II
Group IV compounds include II or VI organometallic compounds, and II-VI compounds include III or V organometallic compounds such as SiH ₄ and CH.
₄ , Sn (CH ₃ ) ₄ , Sn (C ₂ H ₅ ) ₄ , Sn (C
Group IV compounds such as ₃ H ₇ ) ₄ can also be used.

As shown in FIGS. 4 and 5, an n-type (or P-type) crystal 10 is grown to a desired size by adding a predetermined doping gas.

Next, as shown in FIG. 6, the doping gas is switched to stack a P-type (or n-type) crystal 11 which becomes a crystal of the opposite conductivity type. In FIG. 6, X indicates one region in which the crystal 10 and the crystal 11 are laminated. 7 to 1
In FIG. 0, only one region X is shown for simplification.

Next, as shown in FIG. 7, the grown island crystals were flattened by mechanical polishing.

Next, as shown in FIG. 8, an insulating film 12 (for example, SiO ₂ , SiNx, Ta ₂ O ₅ or the like) is formed thereon.
Is deposited, patterned with a resist, and then etched to form a contact hole 13.

Next, as shown in FIG. 9, after forming a negative electrode pattern with a resist, a metal is deposited by a heating evaporation method or a sputtering method, dissolved with a solvent, and unnecessary portions are lifted off to form wiring. The electrode 14 was formed.

At this time, a portion 15 where the film thickness of the metal is extremely thin is formed because it becomes a shadow of the crystal island. The probability of disconnection is high here.

Then, as shown in FIG. 10, selective deposition of Al is performed using the MOCVD apparatus shown in FIG. 16 which is similar to the one described above. The raw material is Al organic metal,
Examples thereof include dimethyl aluminum hydride, diethyl aluminum hydride, monomethyl aluminum hydride, and the like. This Al organic metal raw material is packed in stainless steel bubblers 304 to 306 and kept at a predetermined temperature by a thermostat (not shown).
This is bubbled with hydrogen gas controlled by a mass flow controller (MFC) and transported to the chamber as vapor.

The deposition conditions at this time are the substrate temperature and preferably 180 to 450 ° C., more preferably 200 to 450.
C., optimally 270 to 350.degree. C., pressure is preferably 1.times.10.sup.- ^{3 to} 100 Torr, more preferably 1.times.
10 ^{−3 to} 10 Torr, optimally 1 × 10 ^{−3 to} 1 Torr
and the DMAH partial pressure is preferably 1 × 10 ⁻⁵ to 1 × 10 ⁻² times the internal pressure of the reaction vessel, more preferably 1 × 10 5.
^{-5 to} 5 x 10 ^-3 times, optimally 1 x 10 ^{-5 to} 1.3 x 10
^-3 times.

When Al is deposited under such conditions, Al is not deposited on the insulating film 12 at all, but the Al film 16 is deposited only on the wiring electrode 14. At this time, the thickness of the wiring electrode (metal film) shown in FIG.
An Al film having good step coverage is also formed on the film 5.

[0046]

Embodiments of the present invention will be described in detail below with reference to the drawings. [Example 1] GaAlAs LED which is an example of the present invention
A method for forming the above will be described with reference to FIGS.

As shown in FIG. 17, the AlN film 4 is formed on the quartz substrate 401 by the reactive magnetron sputtering method.
02 was deposited at 1200Å. The deposition conditions are as follows: substrate temperature is room temperature, target is Al, introduced gas is Ar and N ₂ , flow rate ratio is Ar / N ₂ = 2/3, pressure is 5 × 10 ^-2 torr,
The RF power was 600 W and the deposition rate was 60Å / min.

Next, as shown in FIG. 18, plasma CVD
The amorphous SiN _x film 403 was deposited by 300 Å by the method. The deposition conditions were a substrate temperature of 350 ° C., a reaction pressure of 0.2 torr, and raw material gases of SiH ₄ 100 cc and NH ₃ 200 cc.

Next, as shown in FIG. 19, patterning is performed using photolithography, the SiN _x film 403 is partially removed by reactive ion etching, and 2 μm square windows 404 are formed at intervals of 60 μm.
Then, the AlN film 402 was exposed. This part is GaA
It becomes the nucleation surface of s.

The conditions of the realistic ion etching at this time are as follows: CF ₄ and O ₂ are introduced gas, and the flow rate ratio is CF ₄ / O.
₂ = 5/1, pressure was 7 × 10 ^-2 torr, RF power was 100 W, and etching rate was 100Å / min.

Next, as shown in FIG. 20, the substrate was transferred to a low pressure MOCVD apparatus in order to grow GaAs. First,
The substrate surface was cleaned by heat treatment at 860 ° C. for 20 minutes in an atmosphere of AsH ₃ 10%, H ₂ 90% and a pressure of 100 torr. Subsequently, the substrate temperature is lowered to 770 ° C. and stabilized, and then GaAs crystal nuclei 405 are formed by MOCVD.
Was generated.

The growth conditions were as follows: trimethylgallium (TMG) and arsine (AsH ₃ ) were used as raw materials, H ₂ was used as a diluent gas, and the flow rate mole numbers were 2.4 × 10 ^-5 mol / mol, respectively.
Min, 1.4 × 10 ⁻³ mol / min, 0.45 mol / min,
The reaction pressure was 20 torr and the substrate temperature was 770 ° C. The flow rate of HCl, which is an etching gas introduced at the same time, is 3.0.
It was x10 ^-3 mol / min (based on the total flow rate of 6.6 x 10 ^-3 mol%).

Next, as shown in FIGS. 21 and 22, the growth conditions are changed when the GaAs crystal nucleus 405 becomes a single crystal 405a which fills the AlN film 402 serving as the nucleation surface about 10 minutes after the start of growth. As a result, a single crystal 406 of n-type Ga _0.8 Al _0.2 As was continuously grown on the single crystal 405a.

The growth conditions at this time are as follows: TMG as raw material, trimethylaluminum (TMA), and AsH ₃ dilution gas as H.
₂ , the number of moles of each flow rate is 1.9 × 10 ⁻⁵ mol
/ Min, 4.8 × 10 ^-6 mol / min, 1.4 × 10 ^-3 mo
l / min, 0.45 mol / min, silane (SiH ₄ ) was used as a doping gas, and the flow rate was 1.2 × 10 ⁻⁶ mol
/ Min, the pressure and substrate temperature were unchanged at 20 torr 770 ° C.

Next, as shown in FIG. 23, island-shaped GaA
In the place where the outer diameter of the bottom surface of the 1As single crystal 406 has grown to 10 μm, the doping gas is switched and P type Ga _0.8 A is used.
A single crystal 407 of _0.2 As was continuously grown on the single crystal 406.

At this time, the doping gas was diethyl zinc (DEZn), and the flow rate was 9 × 10 ^-5 mol / min.

The other growth conditions were unchanged.

The growth was stopped when the thickness of the P-type GaAlAs layer reached 3 μm.

Next, as shown in FIG. 24, mechanochemical etching was carried out using methanol (MeOH) containing 0.5% Br to leave a thickness of 5 μm from the substrate GaA.
The top surface of lAs was flattened.

Next, as shown in FIG. 25, plasma CVD
The amorphous SiN _x film 408 was deposited in an amount of 3000 Å by the method to form an insulating film 408. The deposition conditions are a substrate temperature of 350 ° C., a reaction pressure of 0.2 torr, a source gas of SiH ₄ 100 cc, and NH.
It was ₃ 200 cc.

Next, as shown in FIG. 26, after patterning with a photoresist, the insulating film 408 was partially removed by RIE to form a contact hole 409.

Next, as shown in FIG. 27, after patterning with a resist, Au--Ge is vacuum-deposited at 5000.
Å Deposit and form the n-type electrode 410 by the lift-off method.

Next, as shown in FIG. 28, after patterning with a resist in the same manner, Au--Zn is deposited by vacuum evaporation to form 5
Then, a P-type electrode 411 was formed by a lift-off method.

Finally, as shown in FIG. 29, in order to selectively deposit Al, the substrate was put in the low pressure MOCVD apparatus again to form an Al electrode 412 as a metal film. Growth condition is A
The raw material of 1 is dimethyl aluminum hydride (DMAH), H ₂ is used as a diluting gas, and the number of moles of each flow rate is 1.0.
The reaction temperature was × 10 ^-5 mol / min, 20 × 10 ^-2 mol / min, the reaction pressure was 1.2 torr, and the substrate temperature was 320 ° C. After growing for 45 minutes, the substrate was taken out, and a scanning electron microscope (SE
When observed with M), the Al electrode was P and n both electrodes 4
Al was not deposited at all on the portion where the insulating film 408 was exposed on the surface, which was formed only on 10, 411.

Further, when the GaAlAsLED of the substrate on which the Al electrode 412 was formed was measured in the process described with reference to FIG. 29, only 1 out of 20 was broken. On the other hand, the GaAlAs of the substrate stopped in the process described with reference to FIG.
When the LEDs were measured, 5 out of 20 had a disconnection defect. [Embodiment 2] MIS of GaN which is another embodiment of the present invention
A method of forming the mold LED will be described with reference to FIGS.

First, as shown in FIG. 30, SiO is formed on a silicon wafer 501 by magnetron sputtering.
_Two films 502 were deposited at 1500Å. The deposition conditions are a substrate temperature of 250 ° C., a target of SiO ₂ , an introduced gas of Ar,
The pressure was 6 × 10 ⁻³ torr, the RF power was 1 kW, and the deposition rate was 300 Å / min.

Next, as shown in FIG. 31, an Al ₂ O ₃ film was deposited by 300 Å using an ion plating method.
That is, after exhausting to 10 ⁻⁵ torr using an arc discharge type ion plating device, O ₂ gas is added in an amount of 1 to 3
It was introduced up to × 10 ⁻⁴ torr, and Al ₂ O ₃ was deposited under the conditions of an ionization electrode of 50 V (output 500 W), a substrate potential of −50 V, and a substrate temperature of 400 ° C. After that, resist patterning is performed, and an etchant (H ₃ PO ₄ : HNO ₃ : CH
_{3 COOH: H 2 = 16:} 1: 2: patterned into 1.5μm with 1 40 ° C.), thereby Al ₂ O ₃
The seed portion 503 was formed.

Next, as shown in FIG. 32, island-shaped n-type GaN crystal 504 was grown by MOCVD.
First, heat treatment was performed in a PCl ₃ atmosphere at 950 ° C. for 10 minutes, and then an island-shaped n-type GaN single crystal 504 was grown by the MOCVD method. The raw material gas was trimethylgallium (TMG), and the ammonia (NH ₃ ) dilution gas was H ₂ . The number of flow moles is 2.0 × 10 ^-5 mol /
Min, 8 × 10 ⁻⁴ mol / min, 0.2 mol / min, the pressure was normal pressure, and the substrate temperature was 1100 ° C. GaN crystal island 5
The growth was continued for 70 minutes until the diameter of the bottom surface of 04 became 20 μm.

Next, as shown in FIG. 33, mechanochemical etching was performed using methanol (MeOH) containing 0.5% Br, and a thickness of 5 μm was arranged from the substrate to form a single crystal (GaN) 504. The top surface was flattened.

Next, as shown in FIG. 34, after patterning with a photoresist 505, Zn ions 506 are 1 ×.
I hit 10 ¹⁶ / cm ² .

[0071] Next, as shown in FIG. 35, in an H ₂ atmosphere 9
The insulating layer 507 (high resistance GaN) was formed by heating at 00 ° C. for 5 minutes.

Next, as shown in FIG. 36, plasma CVD
An amorphous SiN _x film 508 was deposited in an amount of 3000 Å by the method to form an insulating film 508. The deposition conditions are a substrate temperature of 350 ° C., a reaction pressure of 0.2 torr, a source gas of SiH ₄ 100 cc, and NH.
It was ₃ 200 cc.

Next, as shown in FIG. 37, after patterning with a photoresist, the insulating film 508 was partially removed by RIE to form a contact hole 509.

Next, as shown in FIG. 38, after forming a negative pattern with a resist, In—Al was vapor-deposited at 5000 Å. Next, the resist was melted with a solvent to lift off unnecessary portions to form electrodes 510.

Similarly, as shown in FIG. 39, after forming a negative pattern with a resist, In was vapor-deposited at 2000 liters.
Next, the resist was melted using a solvent and unnecessary portions were lifted off to form an electrode 511.

Finally, as shown in FIG. 40, in order to selectively deposit Al, the substrate was put in the low pressure MOCVD apparatus again to form an Al electrode 512. The growth conditions are as follows: the raw material of Al is dimethyl aluminum hydride (DMAH), H ₂ is used as a dilution gas, and the number of moles of each flow rate is 1.0 × 1.
The reaction temperature was 0 ⁻⁵ mol / min, 2.0 × 10 ⁻² mol / min, the reaction pressure was 1.2 torr, and the substrate temperature was 320 ° C. After growing for 45 minutes, the substrate was taken out, and a scanning electron microscope (SE
When observed by M), the Al electrode was
Al was not deposited at all on the portion where it was formed only on 511 and the insulating film 508 was exposed on the surface.

When the GaNLED on the substrate on which the Al electrode 512 was formed was measured in the process described with reference to FIG. 40, only 3 out of 20 were broken. On the other hand, when the GaN LEDs on the substrate stopped in the process described with reference to FIG. 39 were measured, 11 out of 20 had a disconnection defect.

[0078]

As described above, according to the method of manufacturing a semiconductor device of the present invention, it is possible to reduce the yield reduction due to the disconnection when the electrode wiring is performed on the semiconductor single crystal formed in the island shape on the substrate. It will be possible.

[Brief description of drawings]

FIG. 1 is a schematic process diagram showing a method for forming a light emitting device according to the present invention.

FIG. 2 is a schematic process diagram showing a method for forming a light emitting device according to the present invention.

FIG. 3 is a schematic process diagram showing a method for forming a light emitting device according to the present invention.

FIG. 4 is a schematic process diagram showing a method for forming a light emitting device according to the present invention.

FIG. 5 is a schematic process diagram showing a method for forming a light emitting device according to the present invention.

FIG. 6 is a schematic process diagram showing a method for forming a light emitting device according to the present invention.

FIG. 7 is a schematic process diagram showing a method for forming a light emitting device according to the present invention.

FIG. 8 is a schematic process diagram showing a method for forming a light emitting device according to the present invention.

FIG. 9 is a schematic process diagram showing a method for forming a light emitting device according to the present invention.

FIG. 10 is a schematic process diagram showing a method for forming a light emitting device according to the present invention.

FIG. 11 is a schematic process drawing showing a partial process of another embodiment example of the method for forming a light emitting device according to the present invention.

FIG. 12 is a schematic process drawing showing a partial process of another embodiment example of the method for forming a light emitting device according to the present invention.

FIG. 13 is a schematic process drawing showing a partial process of another embodiment example of the method for forming a light emitting device according to the present invention.

FIG. 14 is a schematic process drawing showing a partial process of another embodiment example of the method for forming a light emitting device according to the present invention.

FIG. 15 is a schematic process drawing showing a partial process of another embodiment example of the method for forming a light emitting device according to the present invention.

FIG. 16 is a schematic view of an MOCVD apparatus used in the present invention.

FIG. 17 is a schematic process diagram when the present invention is used for forming a GaAlAs LED.

FIG. 18 is a schematic process diagram when the present invention is used to form a GaAlAs LED.

FIG. 19 is a schematic process diagram when the present invention is used to form a GaAlAs LED.

FIG. 20 is a schematic process diagram when the present invention is used to form a GaAlAs LED.

FIG. 21 is a schematic process diagram when the present invention is used for forming a GaAlAs LED.

FIG. 22 is a schematic process diagram when the present invention is used to form a GaAlAs LED.

FIG. 23 is a schematic process diagram when the present invention is used for forming a GaAlAs LED.

FIG. 24 is a schematic process diagram when the present invention is used to form a GaAlAs LED.

FIG. 25 is a schematic process diagram when the present invention is used to form a GaAlAs LED.

FIG. 26 is a schematic process diagram when the present invention is used to form a GaAlAs LED.

FIG. 27 is a schematic process diagram when the present invention is used to form a GaAlAs LED.

FIG. 28 is a schematic process diagram when the present invention is used to form a GaAlAs LED.

FIG. 29 is a schematic process diagram when the present invention is used for forming a GaAlAs LED.

FIG. 30 is a schematic process diagram when the present invention is used for forming a GaN LED.

FIG. 31 is a schematic process diagram when the present invention is used for forming a GaN LED.

FIG. 32 is a schematic process diagram when the present invention is used for forming a GaN LED.

FIG. 33 is a schematic process diagram when the present invention is used for forming a GaN LED.

FIG. 34 is a schematic process diagram when the present invention is used for forming a GaN LED.

FIG. 35 is a schematic process diagram when the present invention is used for forming a GaN LED.

FIG. 36 is a schematic process diagram when the present invention is used for forming a GaN LED.

FIG. 37 is a schematic process diagram when the present invention is used for forming a GaN LED.

FIG. 38 is a schematic process diagram when the present invention is used for forming a GaN LED.

FIG. 39 is a schematic process diagram when the present invention is used for forming a GaN LED.

FIG. 40 is a schematic process diagram when the present invention is used for forming a GaN LED.

FIG. 41 is a schematic process diagram showing a conventional method for forming a light emitting device.

FIG. 42 is a schematic process diagram showing a conventional method for forming a light emitting device.

FIG. 43 is a schematic process diagram showing a conventional method for forming a light emitting device.

[Explanation of symbols]

1 a base material, 2 a thin film made of a material having a low nucleation density, 3 a non-nucleation surface, 4 a nucleation surface, 5 a support made of a material having a low nucleation density, 6 a thin film made of a material having a high nucleation density, 7 photo Resist, 8 ion-implanted region, 9 crystal nucleus, 10 crystal, 11 crystal, 1
2 insulating film, 13 contact hole, 14 wiring electrode, 15 disconnection frequent occurrence part, 16 Al film, 200
Crystal, 201 crystal, 202 substrate, 203 crystal and substrate joint, 204 electrode, 205 insulating film, 2
06 Broken wire frequent occurrence part, 301 arsine cylinder, 302
Hydrogen cylinder, 303 HCl cylinder, 304, 30
5,306 Organic metal raw material-containing bubbler, 307 chamber, 308 substrate holder, 309 substrate, 3
10 thermocouple, 311 rotary pump, 312
Conductance valve, 313 Gate valve, 31
4 gate valves, 315 turbo pumps, 316
Rotary pump, 401 quartz substrate, 402 Al
N film, 403SiN _x film, 404 window, 405 G
aAs, 406 single crystal (n-GaAlAs), 40
7 single crystal (P-GaAlAs), 408 insulating film (SiN _X), 409 a contact hole, 410
n-type electrode (Au-Ge), 411 P-type electrode (Au-Z)
n), 412 Al electrode, 501 silicon wafer,
502 SiO ₂ film, 503 Al ₂ O ₃ , 504
Single crystal (GaN), 505 Photoresist, 50
6 Zn ions, 507 insulating layer (high resistance GaN),
508 insulating film (SiN _X), 509 a contact hole, 510 electrode (In-Al), 511 electrode (In), 512 Al electrode.

Claims (3)

[Claims] 1. A non-nucleation surface having a low nucleation density, and an area which is arranged adjacent to the non-nucleation surface and has a sufficiently small area for crystal growth of only a single nucleus, and is smaller than the nucleation density of the non-nucleation surface. The substrate having a high nucleation density and having a nucleation surface formed of a non-single crystal material is subjected to a crystal formation treatment, and a single nucleus on the nucleation surface is extended beyond the nucleation surface. A semiconductor crystal extending to the non-nucleation surface is grown, an insulating film is formed on the semiconductor crystal, a wiring electrode is formed thereon, and then a metal film is selectively formed only on the wiring electrode. A method for manufacturing a semiconductor device, comprising: 2. The method of manufacturing a semiconductor device according to claim 1, wherein the metal film is aluminum. 3. The method of manufacturing a semiconductor device according to claim 2, wherein the method of forming the metal film is a MOCVD method using organometallic aluminum.