JPH0568851B2 - - Google Patents
Info
- Publication number
- JPH0568851B2 JPH0568851B2 JP59020990A JP2099084A JPH0568851B2 JP H0568851 B2 JPH0568851 B2 JP H0568851B2 JP 59020990 A JP59020990 A JP 59020990A JP 2099084 A JP2099084 A JP 2099084A JP H0568851 B2 JPH0568851 B2 JP H0568851B2
- Authority
- JP
- Japan
- Prior art keywords
- chamber
- pressure
- oxidation
- wafer
- loader
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 235000012431 wafers Nutrition 0.000 claims description 39
- 230000003647 oxidation Effects 0.000 claims description 33
- 238000007254 oxidation reaction Methods 0.000 claims description 33
- 239000004065 semiconductor Substances 0.000 claims description 12
- 239000012298 atmosphere Substances 0.000 claims description 4
- 238000001816 cooling Methods 0.000 claims description 4
- 239000010408 film Substances 0.000 description 18
- 238000006243 chemical reaction Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 6
- 238000010438 heat treatment Methods 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 239000001301 oxygen Substances 0.000 description 4
- 229910052760 oxygen Inorganic materials 0.000 description 4
- 230000006835 compression Effects 0.000 description 3
- 238000007906 compression Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000011109 contamination Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000002485 combustion reaction Methods 0.000 description 1
- 239000000498 cooling water Substances 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
Description
【発明の詳細な説明】 〔発明の技術分野〕 本発明は、半導体高圧酸化装置に関する。[Detailed description of the invention] [Technical field of invention] The present invention relates to a semiconductor high pressure oxidation device.
第１図は、従来の半導体高圧酸化装置の概略構
成を示す説明図である。図中１は、円筒状の圧力
容器である。圧力容器１の一端部には、保守用ハ
ツチ２が設けられ、他端部には、ウエハ出入用ハ
ツチ３が設けられている。圧力容器２の周壁部に
は、冷却水用パイプ４が埋設されている。圧力容
器２の内部には、石英からなる反応管５が設置さ
れている。反応管５の一端部は閉塞しており、他
端部は、ウエハ出入用ハツチ３に対向して開口し
ている。この反応管５の開口部は、ウエハ出入用
ハツチ３に取付けられたエンドキヤツプ６によつ
て、ウエハ出入用ハツチ３を閉じた際に塞がれる
ようになつている。反応管５の内容には、複数枚
のウエハ６を搭載したボート７が収容されるよう
になつている。また、反応管５内には、圧力容器
１及び反応管５を貫挿して導入されたH2／N2配
管８，O2／N2配管９によつて反応ガスが供給さ
れるようになつている。同様に、反応管５内に
は、圧力容器１を貫挿して過剰水蒸気排出管１０
が導入されている。また、反応管５の外周面近傍
には、主ヒータ１１及び補助ヒータ１２が設置さ
れている。更に、圧力容器１には、内部の圧力を
調節するための昇圧用配管１３及び降圧用配管１
４が取付けられている。
FIG. 1 is an explanatory diagram showing a schematic configuration of a conventional semiconductor high-pressure oxidation apparatus. In the figure, 1 is a cylindrical pressure vessel. A maintenance hatch 2 is provided at one end of the pressure vessel 1, and a wafer entry/exit hatch 3 is provided at the other end. A cooling water pipe 4 is embedded in the peripheral wall of the pressure vessel 2 . Inside the pressure vessel 2, a reaction tube 5 made of quartz is installed. One end of the reaction tube 5 is closed, and the other end is open facing the hatch 3 for wafer entry/exit. The opening of the reaction tube 5 is closed by an end cap 6 attached to the wafer loading/unloading hatch 3 when the wafer loading/unloading hatch 3 is closed. Inside the reaction tube 5, a boat 7 carrying a plurality of wafers 6 is accommodated. In addition, reaction gas is supplied into the reaction tube 5 through H 2 /N 2 piping 8 and O 2 /N 2 piping 9 introduced through the pressure vessel 1 and the reaction tube 5. ing. Similarly, an excess steam discharge pipe 10 is inserted into the reaction tube 5 through the pressure vessel 1.
has been introduced. Further, a main heater 11 and an auxiliary heater 12 are installed near the outer peripheral surface of the reaction tube 5. Furthermore, the pressure vessel 1 includes a pressure increasing pipe 13 and a pressure reducing pipe 1 for adjusting the internal pressure.
4 is installed.
而して、反応管５内を９〜25気圧の酸化圧力、
700〜1050℃の酸化温度に設定し、そこに直径が
３〜５インチのウエハ６を搭載したボード７を収
容して、加熱反応により１回の処理で90〜160枚
のウエハ６に水蒸気酸化、或はドライ酸素酸化を
施して薄膜の形成を行う。 Thus, an oxidation pressure of 9 to 25 atmospheres is applied inside the reaction tube 5.
The oxidation temperature is set at 700 to 1050°C, and a board 7 on which wafers 6 with a diameter of 3 to 5 inches are mounted is housed, and 90 to 160 wafers 6 are subjected to steam oxidation in one treatment by heating reaction. , or dry oxygen oxidation is performed to form a thin film.
上述のように構成された半導体高圧酸化装置に
は、次のような問題がある。
The semiconductor high-pressure oxidation apparatus configured as described above has the following problems.
チユーブ型式によるバツチ処理のため、水素
燃焼開始から酸素温度が安定するまで25〜40分
の時間を必要とする（酸化圧力９Kg／cm2の場
合）。このため形成する酸化膜の膜厚は、ウエ
ハ６では第３図に特性線Ｉで示すように、ま
た、ウエハ６間では第３図に特性線で示すよ
うに大きくばらつく（例えば、膜厚が1.0μｍで
常圧酸化の場合、膜厚の３〜４倍の値でばらつ
きが起きる。）。この膜厚のばらつきは、ウエハ
６の径が大きくなるに従つて増大する。 Due to batch processing using the tube type, it takes 25 to 40 minutes from the start of hydrogen combustion until the oxygen temperature stabilizes (when the oxidation pressure is 9 kg/cm 2 ). For this reason, the thickness of the oxide film formed on wafer 6 varies greatly as shown by characteristic line I in FIG. 3, and between wafers 6 as shown by characteristic line I in FIG. In the case of normal pressure oxidation at 1.0 μm, variations occur at a value 3 to 4 times the film thickness.) This variation in film thickness increases as the diameter of the wafer 6 increases.
石英からなる反応管５を一定体積の圧力容器
１内に収容した構造のため、昇降圧等の操作に
多くの時間を必要とする。例えば９Kg／cm2程度
の酸化を行う場合、酸化時間以外に約100分の
操作時間が必要となる。このため、ウエハ６に
高速デバイス等の浅い接合が施されている場合
には、不純物の再分布が起きる問題がある。 Since the reaction tube 5 made of quartz is housed in the pressure vessel 1 having a constant volume, a lot of time is required for operations such as raising and lowering the pressure. For example, when performing oxidation of about 9 kg/cm 2 , an operation time of about 100 minutes is required in addition to the oxidation time. Therefore, if shallow bonding is performed on the wafer 6 for high-speed devices or the like, there is a problem in that impurity redistribution occurs.
反応管５を大型の圧力容器１に収容している
ため、昇温時にO2、N2等の多量のガスを必要
とする。このため装置を駆動するための所謂ラ
ニングコストが高くなる。 Since the reaction tube 5 is housed in the large pressure vessel 1, a large amount of gas such as O 2 and N 2 is required to raise the temperature. This increases the so-called running cost for driving the device.
大型の圧力容器１を使用しているため、大き
な占有空間を必要とする。 Since a large pressure vessel 1 is used, a large occupied space is required.
酸化の前処理を施したウエハ６を一旦、ボー
ドに載置する必要があり、その際にウエハ６の
汚染を招く。 It is necessary to place the wafer 6, which has been pretreated for oxidation, on a board, which causes contamination of the wafer 6.
本発明は、加熱時間を短縮して、しかも均一な
膜厚を有する熱酸化膜を容易に形成することがで
きる半導体高圧酸化装置を提供することをその目
的とするものである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor high-pressure oxidation apparatus that can shorten heating time and easily form a thermal oxide film having a uniform thickness.
本発明は、内部容積を可変できる昇圧室、酸化
室、降圧室を順次独立して配置し、各室を通過さ
せることによりウエハの表面に酸化膜を形成する
ようにしたので、加熱時間を短縮して、しかも均
一な膜厚を有する熱酸化膜を容易に形成すること
ができる半導体高圧酸化装置である。
In the present invention, a pressurizing chamber, an oxidizing chamber, and a depressurizing chamber whose internal volumes can be varied are arranged independently in sequence, and the oxide film is formed on the surface of the wafer by passing through each chamber, thereby shortening the heating time. The present invention is a semiconductor high-pressure oxidation apparatus that can easily form a thermal oxide film having a uniform thickness.
以下、本発明の実施例について図面を参照して
説明する。第２図は、本発明の一実施例の概略構
成を示す説明図である。図中２０は、被処理体で
あるウエハ２１を搬送するキヤリア２２が収容さ
れたローダ室である。ローダ室２０の前方には、
処理後のウエハ２１を搬送するキヤリア２２を収
容するアンローダ室２３が設けられている。ロー
ダ室２０とアンローダ室２３間には、ローダ室２
０側から所定間隔を設けて第１昇圧室２４、第２
昇圧室２５、酸化室２６、第１降圧室２７、第２
降圧室２８が順次設置されている。各室２５…２
８は、ピストン２９とシリンダ３０によつて内部
容積が可変できるようになつている。また、各室
２５…２８の底部には、O2／N2配管３１及び排
気管３２が接続されている。酸化室２６の排気管
３２は分岐して昇圧ユニツト３３を介して水蒸気
ユニツト３４に接続されている。また、各室２５
…２８の下部にはヒータ３５が設けられている。
更に、各室２５…２８を構成するシリンダ３０の
壁内には、温度調節用冷却パイプ３６が埋設され
ている。各室２５…２８の底部には、ウエハ２１
の出入口が形成されており、耐高圧ロツク３７に
よつて開閉するようになつている。なお、同図中
３８は、ローダ室２０及びアンローダ室２３の入
口部に設けられたシヤツターであり、３９は各室
２５…２８のピストン２９を昇降動させる圧縮ユ
ニツトである。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is an explanatory diagram showing a schematic configuration of an embodiment of the present invention. 20 in the figure is a loader chamber in which a carrier 22 for transporting a wafer 21, which is an object to be processed, is accommodated. In front of the loader chamber 20,
An unloader chamber 23 is provided for accommodating a carrier 22 for transporting wafers 21 after processing. A loader chamber 2 is provided between the loader chamber 20 and the unloader chamber 23.
The first pressurizing chamber 24 and the second pressurizing chamber 24 are arranged at a predetermined interval from the
Pressurization chamber 25, oxidation chamber 26, first pressure reduction chamber 27, second
Depressurization chambers 28 are installed one after another. Each room 25...2
8 has a piston 29 and a cylinder 30 that allow the internal volume to be varied. Further, an O 2 /N 2 pipe 31 and an exhaust pipe 32 are connected to the bottom of each chamber 25 . . . 28 . An exhaust pipe 32 of the oxidation chamber 26 is branched and connected to a steam unit 34 via a booster unit 33. In addition, each room has 25
A heater 35 is provided below the ... 28.
Furthermore, a cooling pipe 36 for temperature adjustment is embedded within the wall of the cylinder 30 constituting each chamber 25...28. A wafer 21 is placed at the bottom of each chamber 25...28.
An entrance/exit is formed, and the opening/exit is opened/closed by a high-pressure resistant lock 37. In the figure, 38 is a shutter provided at the entrance of the loader chamber 20 and unloader chamber 23, and 39 is a compression unit that moves the pistons 29 of each chamber 25...28 up and down.
このように構成らた半導体高圧酸化装置４０に
よれば、先ず、被処理体であるウエハ２１をロー
ダ室２０から第１昇圧室２４に導く。第１昇圧室
２４内は、O2／N2配管３１から供給され排気管
３２から排出によりN2雰囲気に設定されると共
に、圧縮ユニツト３９により常圧から10気圧に昇
圧される。更に、第１昇圧室２４内の温度は、ヒ
ータ３５と温度調節用冷却パイプ３６の作用によ
り500℃に設定されている。第１昇圧室２４で所
定温度圧力に加熱加圧されたウエハ２１は、次の
第２昇圧室２５に導かれる。第２昇圧室２５内
は、酸素とチツ素の混合ガス雰囲気中で10気圧；
500℃から100気圧、900℃まで昇圧；昇温を行な
う。ウエハ２１は、この第２昇圧室２５内で約２
分間、昇圧・昇温処理を受ける。 According to the semiconductor high-pressure oxidation apparatus 40 configured in this manner, first, the wafer 21 as the object to be processed is guided from the loader chamber 20 to the first pressurization chamber 24 . The inside of the first pressurizing chamber 24 is set to an N 2 atmosphere by being supplied from an O 2 /N 2 pipe 31 and exhausted from an exhaust pipe 32 , and the pressure is increased from normal pressure to 10 atmospheres by a compression unit 39. Further, the temperature inside the first pressurizing chamber 24 is set at 500° C. by the action of the heater 35 and the temperature regulating cooling pipe 36. The wafer 21 heated and pressurized to a predetermined temperature and pressure in the first pressurizing chamber 24 is led to the next second pressurizing chamber 25 . The inside of the second pressurization chamber 25 is in a mixed gas atmosphere of oxygen and nitrogen at 10 atmospheres;
Increase pressure and temperature from 500℃ to 100atm and 900℃. The wafer 21 is approximately 2
Subjected to pressure and temperature raising treatment for 1 minute.
次に、ウエハ２１は、100気圧、900℃の水蒸気
雰囲気に設定された酸化室２６に導かれた後、室
内の圧力を110気圧まで高めて約１分間酸化処理
を施される。この処理によつてウエハ２１の表面
に厚さ約1.0μｍの酸化膜が形成される。酸化膜の
形成後、酸化室２６内の圧力は再び100気圧まで
降圧される。 Next, the wafer 21 is led to an oxidation chamber 26 set in a steam atmosphere of 100 atmospheres and 900 degrees Celsius, and then subjected to oxidation treatment for about 1 minute by increasing the pressure in the chamber to 110 atmospheres. By this process, an oxide film with a thickness of about 1.0 μm is formed on the surface of the wafer 21. After the oxide film is formed, the pressure inside the oxidation chamber 26 is lowered to 100 atmospheres again.
次に、酸化膜の形成されたウエハ２１は、100
気圧、900℃の酸素、チツ素の混合ガス雰囲気に
設定された第１降圧室２７一旦移され、10気圧、
500℃の雰囲気状態にまで降圧・降温をする。次
いで、ウエハ２１は10気圧・500℃のチツ素雰囲
気に設定さた第２降圧室２８に移されて、１気
圧、気温まで降圧・降温をする。然る後、ウエハ
２１は第２降圧室２８からアンローダ室２３に移
され酸化膜の形成を完了する。ここで、第１、第
２降圧室２７，２８で行う高圧、降温に要する時
間は夫々約２分である。また、各室２５…２８内
には、１枚のウエハ２１が収容されるようになつ
ている。ただし、本実施例は枚様式であるが、少
数枚数のバツチ式でもよい。 Next, the wafer 21 on which the oxide film has been formed is
The first step-down chamber 27, which was set to a mixed gas atmosphere of oxygen and nitrogen at 900 degrees Celsius, was once moved and heated to 10 atmospheres.
The pressure and temperature are lowered to an atmospheric condition of 500℃. Next, the wafer 21 is transferred to a second depressurization chamber 28 set to a nitrogen atmosphere of 10 atm and 500° C., and the pressure and temperature are lowered to 1 atm and temperature. Thereafter, the wafer 21 is transferred from the second pressure-down chamber 28 to the unloader chamber 23 to complete the formation of the oxide film. Here, the time required for high pressure and temperature reduction in the first and second pressure reducing chambers 27 and 28 is about 2 minutes, respectively. Moreover, one wafer 21 is accommodated in each chamber 25...28. However, although this embodiment uses a sheet type, a batch type with a small number of sheets may be used.
このようにして酸化膜の形成を行う半導体高圧
酸化装置４０は、次のような効果を有する。 The semiconductor high-pressure oxidation apparatus 40 that forms an oxide film in this manner has the following effects.
所謂枚様式によつてウエハ２１の個々につい
て酸化処理を施し、しかも酸化室２６は他の室
２４，２５，２７，２８から独立した構造であ
り、短時間で安定した酸化状態を得ることがで
きる。このため第３図に特性線にて示す如
く、１枚のウエハ２１内に均一な膜厚の酸化膜
を形成できると共に、同図に特性線にて併記
する如く、ウエア２１間でも極めて均一な膜厚
の酸化膜を形成することができる。また、枚様
式の構造を採用しているので、ウエハ２１の径
が大きくなつても、均一な膜厚の酸化膜を形成
できるものである。 Oxidation treatment is performed on each of the wafers 21 in a so-called sheet format, and the oxidation chamber 26 has a structure independent from the other chambers 24, 25, 27, and 28, so that a stable oxidation state can be obtained in a short time. . Therefore, as shown by the characteristic line in FIG. 3, it is possible to form an oxide film with a uniform thickness within one wafer 21, and as shown in the characteristic line in the same figure, an extremely uniform oxide film can be formed between the wafers 21. A thick oxide film can be formed. Further, since a single-layer structure is adopted, even if the diameter of the wafer 21 becomes large, an oxide film with a uniform thickness can be formed.
酸化膜を形成する際の昇降圧は、各室２４…
２８の内部容積を変化して行われる。このため
常圧から100気圧までの圧力変化を行う場合で
も、ウエハ２１の搬送を含めて５分以内の短時
間で行うことができる。900℃で1.0μｍの膜厚
の酸化膜を形成する場合を例に挙げると、従来
の装置では加熱時間を約200分必要とするが、
実施例の装置ではその1/20の約10分で完了す
る。その結果、ウエハ２１に高速デバイスのた
めの浅い接合が形成されている場合にも、不純
分の再拡散が発生するのを防止できる。 The pressure rise and fall when forming the oxide film is carried out in each chamber 24...
This is done by changing the internal volume of 28. Therefore, even when changing the pressure from normal pressure to 100 atmospheres, it can be done in a short time of 5 minutes or less, including the transfer of the wafer 21. For example, when forming an oxide film with a thickness of 1.0 μm at 900°C, conventional equipment requires approximately 200 minutes of heating time.
With the apparatus of the example, the process is completed in about 10 minutes, which is 1/20 of that time. As a result, even if shallow junctions for high-speed devices are formed on the wafer 21, re-diffusion of impurities can be prevented.
各室２４…２８の内部容積を変化させて昇降
圧を行うので、圧力調節のために必要なガスの
量を従来の装置（第１図に示す）の1/8〜1/10
に減少することができる。その結果、装置の駆
動のために要する費用を低減できる。 Since the internal volume of each chamber 24...28 is changed to raise and lower the pressure, the amount of gas required for pressure adjustment is 1/8 to 1/10 that of the conventional device (shown in Figure 1).
can be reduced to As a result, the cost required to drive the device can be reduced.
高圧の圧力容器を使用しないので、装置の大
きさを従来のものの1/2〜1/3に小型化すること
ができる。その結果、装置の占有空間を小さく
できる。 Since a high-pressure vessel is not used, the size of the device can be reduced to 1/2 to 1/3 of that of conventional devices. As a result, the space occupied by the device can be reduced.
ウエハ２１の搬送は、酸化処理の前後でキヤ
リア２２を使用して所謂カセツトからカセツト
へと行うことができる。その結果、ウエハ２１
の汚染、割れの発生を防止できる。 The wafers 21 can be transported from one cassette to another using a carrier 22 before and after the oxidation process. As a result, wafer 21
can prevent contamination and cracking.
装置の自動化やコンピユーターによる管理を
容易に行うことができる。 The device can be easily automated and managed by computer.
以上説明した如く、本発明に係る半導体高圧酸
化装置によれば、加熱時間を短縮して、しかも均
一な膜厚を有する熱酸化膜を容易に形成できるも
のである。
As explained above, according to the semiconductor high-pressure oxidation apparatus according to the present invention, it is possible to shorten the heating time and easily form a thermal oxide film having a uniform thickness.
第１図は、従来の半導体高圧酸化装置の概略構
成を示す説明図、第２図は、本発明の一実施例の
概略構成を示す説明図、第３図は、酸化膜の膜厚
のばらつきとウエハの径との関係を示す特性図で
ある。
２０……ローダ室、２１……ウエハ、２２……
キヤリア、２３……アンローダ室、２４……第１
昇圧室、２５……第２昇圧室、２６……酸化室、
２７……第１降圧室、２８……第２降圧室、２９
……ピストン、３０……シリンダ、３１……
O2／N2配管、３２……排気管、３３……昇圧ユ
ニツト、３４……水蒸気ユニツト、３５……ヒー
タ、３６……温度調節用冷却パイプ、３７……耐
高圧ロツク、３８……シヤツター、３９……圧縮
ユニツト、４０……半導体高圧酸化装置。
FIG. 1 is an explanatory diagram showing a schematic configuration of a conventional semiconductor high-pressure oxidation device, FIG. 2 is an explanatory diagram showing a schematic configuration of an embodiment of the present invention, and FIG. 3 is an explanatory diagram showing a schematic configuration of a conventional semiconductor high-pressure oxidation device. FIG. 3 is a characteristic diagram showing the relationship between the diameter of the wafer and the diameter of the wafer. 20...Loader chamber, 21...Wafer, 22...
Carrier, 23...Unloader room, 24...1st
pressurization chamber, 25... second pressurization chamber, 26... oxidation chamber,
27...First step-down room, 28...Second step-down room, 29
...Piston, 30...Cylinder, 31...
O 2 /N 2 piping, 32... Exhaust pipe, 33... Boost unit, 34... Steam unit, 35... Heater, 36... Cooling pipe for temperature adjustment, 37... High pressure resistant lock, 38... Shutter , 39... Compression unit, 40 ... Semiconductor high pressure oxidation equipment.
Claims (1)
ローダ室と、該ローダ室及び該アンローダ室に出
入自在に収容されたウエハのキヤリアと、該ロー
ダ室及び該アンローダ室間に該ローダ室側から所
定間隔で独立して順次設置され、その内部容積が
可変であり、内部雰囲気ガスを導入する配管と排
気する排気管とを有し、かつ、温度調節用の冷却
パイプ及びヒータ、前記ウエハの出入口を備えた
昇圧室、酸化室、降圧室と、該酸化室の前記配管
に昇圧ユニツトを介して接続された水蒸気ユニツ
トとを具備することを特徴とする半導体高圧酸化
装置。1. A loader chamber and an unloader chamber arranged opposite each other at a predetermined interval, a carrier for wafers stored in the loader chamber and the unloader chamber so as to be able to come in and out, and a space between the loader chamber and the unloader chamber from the loader chamber side. They are installed independently and sequentially at predetermined intervals, have variable internal volumes, have pipes for introducing internal atmosphere gas and exhaust pipes for exhausting the gas, and have cooling pipes and heaters for temperature adjustment, and an inlet/outlet for the wafer. 1. A semiconductor high-pressure oxidation apparatus comprising: a pressurization chamber, an oxidation chamber, and a pressure-depression chamber, and a steam unit connected to the piping of the oxidation chamber via a pressure-boosting unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59020990A JPS60165729A (en) | 1984-02-08 | 1984-02-08 | Semiconductor high pressure oxidizing apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59020990A JPS60165729A (en) | 1984-02-08 | 1984-02-08 | Semiconductor high pressure oxidizing apparatus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60165729A JPS60165729A (en) | 1985-08-28 |
| JPH0568851B2 true JPH0568851B2 (en) | 1993-09-29 |
Family
ID=12042567
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59020990A Granted JPS60165729A (en) | 1984-02-08 | 1984-02-08 | Semiconductor high pressure oxidizing apparatus |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60165729A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01295425A (en) * | 1988-02-29 | 1989-11-29 | Tel Sagami Ltd | Oxidizing apparatus |
| JP2688653B2 (en) * | 1988-05-06 | 1997-12-10 | 東京エレクトロン株式会社 | Semiconductor pressure oxidation method |
| JP2766856B2 (en) * | 1988-11-11 | 1998-06-18 | 東京エレクトロン株式会社 | Vertical pressure oxidation equipment |
| JP3609077B1 (en) * | 2003-07-09 | 2005-01-12 | 東京エレクトロン株式会社 | High pressure heat treatment equipment |
-
1984
- 1984-02-08 JP JP59020990A patent/JPS60165729A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60165729A (en) | 1985-08-28 |
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