JPH0567029U - Optical phase synchronization circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] The phase lock pull-in range is expanded by adding a coarse tuning circuit in the heterodyne type optical phase lock loop, and the beat signals of the two semiconductor lasers exceed the phase comparison range of the digital phase comparator. It is to realize an optical phase-locked loop circuit capable of achieving high-speed sweeping and stable synchronization for a long time even if the optical phase-locked circuit is synchronized. [Structure] First and second semiconductor lasers, and the two laser light outputs are connected to an optical coupler, the optical output of the optical coupler is input to a photodetector, and the output of the photodetector is set to a coarse tuning circuit and a digital signal. The standard signal generator is connected to the digital phase comparator, the outputs of the digital phase comparator and the coarse tuning circuit are added, and the result is connected to the second semiconductor laser via the feedback amplifier.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a heterodyne type optical phase locked loop including a laser light source as an optical frequency variable oscillator, and more particularly to an optical phase locked loop including a coarse tuning circuit.

[0002]

[Prior Art]

 It is known that the transmission line capacity of an optical fiber can be dramatically increased by utilizing the property of light as a wave. In order to realize this, it is necessary to stabilize the optical frequency to a predetermined value. As one of the stabilization techniques, the optical frequency of a semiconductor laser whose frequency is stabilized by absorption lines of molecules is used as a reference, and the optical frequencies of other semiconductor lasers are controlled to differ from this reference by a predetermined value. There is a relative frequency stabilization method that stabilizes. As an example of this relative frequency stabilization method, there has been a conventional method that realizes optical frequency stabilization by a heterodyne type optical phase-locked loop (K. Kuboki and M. Ohtsu, "Frequency offset locking of AlGaAs semiconductor lasers" IEEE. J. Quantum Electrons .. vol.QE-23, pp.388-394, 1987).

FIG. 3 shows an example of a heterodyne type optical phase locked loop. In FIG. 3, the output light of the semiconductor laser 1 is combined with the output light of the semiconductor laser 2 serving as a reference by the optical coupler 7 and input to the light receiver 3. By performing heterodyne detection in the light receiver 3, the beat signal 100 of the output light of the semiconductor lasers 1 and 2 can be electrically obtained. The digital phase comparator 4 detects the phase difference between the beat signal 100 output from the light receiver 3 and the reference signal 101 output from the standard signal generator 5. The phase difference signal 102, which is the output of the digital phase comparator 4, is input as a control signal of the semiconductor laser 1 via the feedback amplifier 6. As a result, the output optical frequency of the semiconductor laser 1 is controlled so that the beat signal 100 of the output light of the semiconductor lasers 1 and 2 and the reference signal 101 become equal.

Generally, a semiconductor laser has a wide spectrum line width of 1 MHz to several tens of MHz even if it oscillates in a single longitudinal mode. Therefore, the spectrum line width of the beat signal 100 becomes wide and phase noise becomes extremely large. Will end up. Therefore, in the above-mentioned optical phase locked loop, the digital phase comparator 4 needs a wide phase comparison range, and as a concrete example, an up counter, a down counter, an adder and a D / A converter according to Japanese Patent Laid-Open No. 3-109818. Therefore, a digital phase comparator composed of etc. will be used. FIG. 4 shows a block diagram of a digital phase comparator according to Japanese Patent Laid-Open No. 3-109818. In FIG. 4, 21 is an up counter, 22 is a down counter, 23, 24 and 27 are latches, 25 is a control circuit, 26 is a full adder, and 28 is a D / A converter. Further, 104, 105 and 106 are control signals. In the digital phase comparator 4, the data counted by the up counter 21 is held by the latch 23 at the timing of the control signal 105 from the control circuit 25, and the data counted by the down counter 22 is controlled by the timing of the control signal 106 from the control circuit 25. It is held by the latch 24. After these two data are added by the full adder 26 to obtain the phase difference signal, the D / A converter 28 converts the phase difference signal into analog.

[0005]

[Problems to be solved by the device]

Since the digital phase comparator according to Japanese Patent Application Laid-Open No. 3-109818 has a sawtooth phase comparison characteristic as shown in FIG. 5, the beat signals 100 of the two semiconductor lasers are in the phase comparison range (−2 ⁿ π of FIG. 5). If it is wider than +2 ⁿ π), there is a problem that phase synchronization cannot be obtained. Therefore, the object of the present invention is to achieve synchronization in a heterodyne type optical phase-locked loop even when the beat signals of two semiconductor lasers exceed the phase comparison range of the digital phase comparator, enabling high-speed sweep and stable synchronization for a long time. To realize a simple optical phase synchronization circuit.

[0006]

[Means for Solving the Problems]

 In order to achieve such an object, in a heterodyne type optical phase locked loop, a first laser light source serving as a reference, a second laser light source, and the optical outputs of the first and second laser light sources are combined. An optical coupler, a photodetector that detects a beat signal from the optical output of this optical coupler, a coarse tuning circuit that receives the output of this photodetector as an input, a standard signal generator that generates a standard signal, A digital phase comparator that receives the output of the converter and the standard signal, an adder that adds the output of the digital phase comparator and the output of the coarse tuning circuit, the output of this adder as the input, and the output is And a feedback amplifier serving as a control input of the second laser light source.

[0007]

[Action]

 By providing a coarse tuning circuit in the heterodyne type optical phase locked loop, if the beat signals of the two semiconductor lasers are wider than the phase comparison range of the optical phase locked loop, the coarse tuning circuit will put the beat signal in the phase comparison range. To control one of the semiconductor lasers.

[0008]

【Example】

 Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a configuration block diagram showing an embodiment of an optical phase synchronization circuit according to the present invention. The same parts as those in FIG. 3 are designated by the same reference numerals. The difference from FIG. 3 is that a coarse tuning circuit 8 and an adder 6 are added. In FIG. 1, the output light of the semiconductor laser 1 is combined with the output light of the semiconductor laser 2 serving as a reference by the optical coupler 7 and input to the light receiver 3. The output of the light receiver 3 is electrically output as a beat signal 100 of the output light of the semiconductor lasers 1 and 2. The beat signal 100 is input to the digital phase comparator 4 and the coarse tuning circuit 8, respectively. The digital phase comparator 4 detects the phase difference between the beat signal 100 output from the light receiver 3 and the reference signal 101 output from the standard signal generator 5. The coarse tuning circuit 8 detects the frequency of the beat signal 100 and outputs a frequency control signal to the semiconductor laser 1 depending on the magnitude of the frequency. The phase difference signal 102, which is the output of the digital phase comparator 4, is added to the output of the coarse tuning circuit 8 by the adder 9 and then input as a control signal to the semiconductor laser 1 via the feedback amplifier 6.

As the coarse tuning circuit 8 of FIG. 1, for example, a coarse tuning circuit according to Japanese Patent Application No. 2-12002 can be used. FIG. 2 shows a detailed configuration circuit diagram of the coarse tuning circuit according to Japanese Patent Application No. 2-12002. In FIG. 2, the beat signal 100 is counted by the counter 10, and the output of the counter 10 is held by the register 11. The upper limit frequency and the lower limit frequency are preset in the registers 12 and 13, respectively. The digital comparator 14 compares the sizes of the register 11 and the register 12, and the digital comparator 15 compares the sizes of the register 11 and the register 13. 16 to 18 are logic circuits for generating corresponding switch drive signals by the outputs of the digital comparators 14 and 15, and 19 and 20 are connected to the positive voltage + V and the negative voltage -V, respectively, and the logical sum circuits 16 and 18 are respectively connected. It is a switch driven by the output of. The clock signal f _CK is applied to the clear terminal of the counter 10, the clock terminal of the register 11 and the input circuits of the logical sum circuits 16 and 18.

In the optical phase synchronization circuit of FIG. 1, when the optical phase synchronization is performed, the frequency of the beat signal 100 and the frequency of the reference signal 101 become equal. In this case, the output signal 103 of the coarse tuning circuit 8 becomes 0, and the output of the digital phase comparator 4 is directly input to the semiconductor laser 1 via the feedback amplifier 6 as a control signal.

When the frequency of the beat signal 100 is higher than the upper limit frequency set in the register 12 of the coarse tuning circuit 8 when the optical phase synchronization is out of sync, the output optical frequency of the semiconductor laser 1 is lowered. The coarse tuning circuit 8 outputs the output signal 103 as a control signal. Thereby, the frequency of the beat signal 100 is controlled to be lower than the upper limit frequency. On the other hand, when the frequency of the beat signal 100 is lower than the lower limit frequency set in the register 13 of the coarse tuning circuit 8, the output signal 103 from the coarse tuning circuit 8 is used as a control signal for increasing the output light frequency of the semiconductor laser 1. Is output. As a result, the frequency of the beat signal 100 is controlled to be higher than the lower limit frequency. Therefore, since the frequency of the beat signal 100 is controlled between the upper limit frequency and the lower limit frequency, if the upper and lower limit frequencies are adjusted within the phase comparison range, the phase synchronization pull-in range is greatly expanded. ..

Although the semiconductor laser is used as the laser light source in the embodiment of the optical phase locked loop according to the present invention, the invention is not limited to this, and a dye laser, a gas laser, or the like is used as a semiconductor. It is also possible to use it instead of a laser. In the present invention, the digital phase comparator is used as the phase comparator, but the present invention is not limited to this, and a normal phase comparator can be used.

[0013]

[Effect of the device]

 As is clear from the above description, the present invention has the following effects. By adding a coarse tuning circuit in the optical phase-locked loop, the phase lock pull-in range is expanded, which enables synchronization even when the beat signals of the two semiconductor lasers exceed the phase comparison range of the digital phase comparator. Thus, it became possible to perform high-speed sweep of frequency and to stably synchronize with the set frequency for a long time.

[Brief description of drawings]

FIG. 1 is a configuration block diagram showing an embodiment of an optical phase locked loop circuit according to the present invention.

FIG. 2 is a partial configuration diagram showing a specific example of a coarse tuning circuit 8 of the optical phase locked loop circuit of FIG.

FIG. 3 is a configuration block diagram showing an example of a conventional optical phase synchronization circuit.

FIG. 4 is a configuration block diagram showing an example of a digital phase comparator 4 of FIG.

5 is a characteristic curve diagram showing a phase comparison characteristic of the digital phase comparator 4 of FIG.

[Explanation of symbols]

 1, 2 Semiconductor laser 3 Optical receiver 4 Digital phase comparator 5 Standard signal generator 6 Feedback amplifier 7 Optical coupler 8 Coarse tuning circuit 9,26 Adder 10, 21, 22 Counter 11, 12, 13 Register 14, 15 Digital Comparator 16, 17, 18 Logic circuit 19, 20 Switch 23, 24, 27 Latch 25 Control circuit 28 D / A converter 100 Beat signal 101 Reference signal 102 Phase difference signal 103 Output signal 104, 105, 106 Control signal

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Koji Akiyama 2-9-32 Nakamachi, Musashino City, Tokyo Yokogawa Electric Co., Ltd. (72) Hiroshi Toba 1-1-6 Uchisai-cho, Chiyoda-ku, Tokyo Date Inside Telegraph and Telephone Corp. (72) Inventor Osamu Ishida 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corp.

Claims (1)

[Scope of utility model registration request] 1. A heterodyne type optical phase locked loop circuit comprising: a first laser light source serving as a reference; a second laser light source; and an optical coupler for multiplexing optical outputs of the first and second laser light sources. , A photodetector for detecting a beat signal from the optical output of the optical coupler, a coarse tuning circuit having the output of the photoreceiver as an input, a standard signal generator for generating a standard signal, the output of the photoreceiver and the A digital phase comparator having a standard signal as an input, an adder for adding the output of the digital phase comparator and the output of the coarse tuning circuit, and the output of the adder as an input, the output being the second laser light source. An optical phase-locked loop circuit comprising: a feedback amplifier serving as a control input for the optical phase-locked loop circuit.