JPH0566889A - Semiconductor device - Google Patents

Abstract

PURPOSE:To suppress outputting an unnessary signal line when A-D conversion is performed in a signal chip mode among plural operational modes of a micro computer. CONSTITUTION:An A-D conversion execution display signal (a) which is generated by an A-D convertor 3 during A-D conversion, an operational mode signal (b) which is generated by an operational mode register 5 in a signal chip mode and an output control circuit 10 which takes one of signal lines 2a, 2b and 2c as an input and positioned within a micro computer 1 are provided. When the micro computer 1 is performing A-D conversion in a signal chip mode, the output of the signal line is suppressed. Thus, the level fluctuation of output signals from an external output terminal is eliminated and a power source system is so stabilized as to improve the conversion accuracy of a A-D convertor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device,
For example, it relates to a single-chip microcomputer having an AD converter.

[0002]

2. Description of the Related Art FIG. 3 is a circuit diagram near an output terminal of a conventional microcomputer, and FIG. 4 is a waveform diagram at each point (S, Q) in FIG. Here, 1 is a single-chip microcomputer (hereinafter referred to as a microcomputer), 2a, 2b, 2
c is a plurality of output signal lines existing in the chip,
3 is an A / D converter 5 is an operation mode register in the microcomputer, 9a, 9b and 9c are respective output signal lines 2a, 2
Output terminal drivers for b and 2c, 11 is a CPU for controlling this microcomputer, and 12 and 13 are RO
M, RAM 14a, 14b, 14c are external output terminals to the output signal lines 2a, 2b, 2c to the outside of the chip, and 15a, 15b, 15c are inverters.

An example of performing A-D conversion in a single chip mode in a microcomputer will be described below.
First, the operation mode register 5 is set to the single chip mode to operate the microcomputer 1. At this time, the output signal line 2
From a, 2b, and 2c, a certain output signal is output from the inverter 15
The signals are output from the external output terminals 14a, 14b, 14c through a, 15b, 15c and the drivers 9a, 9b, 9c. The waveforms at points S and Q in FIG. 3 at this time are shown in FIG. In FIG. 4, A-D conversion is started at the time indicated by t1, and during the subsequent A-D conversion execution, at the point Q, high level and low level (hereinafter referred to as "H" and "L"). ) And the changing signal is output.

[0004]

Conventionally, one of a plurality of operation modes of a microcomputer, an operation mode in which a program to be executed exists only in a built-in ROM (hereinafter referred to as a single chip mode). ) Is the external R
Since the OM is not accessed, the address bus, the data bus, etc. are not used, and only the terminal used as the I / O port is used for external input / output. However, in addition to the terminals actually used as I / O ports, signals from output terminals not used in this mode (for example,
A bus enable signal E for outputting "L" when the data bus is used is also output. I /
Compared to the I / O port output from the O port, the output of the signal that changes more frequently is A-
When the D conversion is performed, a subtle voltage change or the like is given to the power supply system (such as the A-D conversion reference voltage) in the microcomputer, which causes a defect that makes the bit determination in the A-D conversion inaccurate.

The present invention has been made to solve the above problems, and an object thereof is to obtain a semiconductor device having a stable power supply system by prohibiting unnecessary input / output of unused terminals. To do.

[0006]

A semiconductor device according to the present invention is, for example, a single chip mode signal (an example of a mode signal) generated from an operation mode register (an example of an operation mode designating unit) in a single chip mode.
And based on an A-D conversion execution display signal (an example of an execution signal) generated during execution of the A-D conversion from the A-D converter (an example of a processing unit), the control means outputs a predetermined signal in the microcomputer. It prohibits or permits the input and output of lines.

[0007]

In the semiconductor device according to the present invention, for example, the signal from the predetermined signal line for output to the outside is fixed while the microcomputer is in the single-chip mode and the AD conversion is being executed. .. As a result, the "H" and "L" changes of the signal of the external terminal are eliminated, and the power supply system is stabilized.

[0008]

【Example】

Example 1. An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, reference numeral 3 denotes an A that outputs an A-D conversion execution display signal a indicating that the A-D conversion is being executed.
It is a -D converter (an example of a processing unit). 6 is set to "H" only when the A / D conversion execution display signal a from the A / D converter 3 and the single chip mode signal b from the operation mode register (an example of the operation mode designating unit) 5 are input. It is an AND gate that outputs. 7a, 7b, 7c are AN
8 represents an inverter that inverts the signal from the D gate 6,
Reference numerals a, 8b, and 8c represent NAND gates that take the logical product of the signals of the output signal lines 2a, 2b, and 2c and the inverters 7a, 7b, and 7c, and invert and output the logical product. 10 is 5, 6, 7a,
7 shows an output control circuit (an example of control means) composed of 7b, 7c, 8a, 8b, and 8c. Other 1, 2
a, 2b, 2c, 3, 5, 9a, 9b, 9c, 11, 1
Nos. 2, 13, 14a, 14b, and 14c are the same as those described in the section of the related art, and therefore will be omitted.

The operation of this embodiment will be described below with reference to FIG.
This will be described with reference to FIG. FIG. 2 is a diagram showing a waveform at each point (U, W, X) in FIG. Here, in FIG. 1, first, the microcomputer is operated in the single chip mode by the operation mode register 5. That is, the single chip mode signal b becomes "H". In this state, A
The case where the -D converter 3 is stopped will be described. A
Since the -D converter 3 is stopped, the A-D conversion execution display signal a becomes "L", and the AND gate 6 shows "L" and "L".
H "is input, and the output signal of the AND gate 6 at the point W is fixed to" L "(range of T1 in the waveform W of FIG. 2).
It is inverted by this signal wave inverter 7a and becomes "H" N
It is input to the AND gate 8a. At this time, the output signal waveform at point U (U in FIG. 2) is inverted by the NAND gate and becomes an output signal waveform in the range represented by T1 of X in FIG. This signal is output from the output terminal 14a through the driver 9a. This series of operations is the same as the operation of FIG. 4 described in the conventional example. Next, when the AD converter 3 starts to operate at time t2, the AD conversion execution display signal a from the AD converter becomes "H", and the AND gate 6 outputs AD
Since "H" of the conversion execution display signal a and "H" of the single chip mode signal b are input, the output signal at the point W is "
It is fixed to H "(the range of T2 in the waveform W of FIG. 2). This signal is inverted by the inverter 7a and NA is set as" L ".
It is input to the ND gate 8a. At this time, the output signal waveform at point U (U in FIG. 2) is fixed to "H" by the NAND gate 8a, and becomes an output signal waveform in the range represented by T2 of X in FIG. This signal passes through the driver 9a and the output terminal 1
It is output from 4a.

As described above, in this embodiment, A-D
In a single-chip microcomputer having an (analog-digital) converter, A-
An AD converter that generates an A-D conversion execution display signal indicating that D conversion is being executed, and a CPU (Central Processing Unit) in a single-chip microcomputer, which is a first single chip that accesses only its internal resources. An operation mode register for generating a first operation mode signal indicating the first operation mode when the microcomputer operation mode is set,
Input an A / D conversion execution display signal from the A / D converter, a first operation mode signal from the operation mode register, and a predetermined signal line for output to the outside existing in the single-chip microcomputer. And an output control circuit for prohibiting the output of a certain signal line when the A-D conversion is executed in the first operation mode and permitting the output of the signal line while the A-D conversion is stopped. And a single chip microcomputer described above.

The output control circuit is provided with the AD
It is characterized in that a circuit for taking a logic of an A / D conversion execution display signal from the converter, a first operation mode signal from the operation mode register, and a certain signal line in the single-chip microcomputer is used. A single chip microcomputer has been described.

As described above, according to the present embodiment, in the single-chip mode, the same operation as the conventional one is performed when the AD converter is stopped, and only when the AD conversion is executed. Since the output can be fixed at "H", I / O
Inhibiting unnecessary change of "H" and "L" of the output signal which changes more frequently than the port output (for example, the bus enable signal E which outputs "L" when using the data bus), It is possible to prevent adverse effects on the power supply system.

Embodiment 2. It should be noted that in Example 1 above, 8
NAND circuits are used for a, 8b, and 8c.
The output can be fixed to "L" by replacing with a circuit.

Example 3. Further, in the above-described first embodiment, FIG.
When the inside point W becomes "H", the output signal at the point X is unconditionally fixed to "H", but the point W becomes "H" to prevent unnecessary pulses from being generated in the output signal. And, after the signal line 2a becomes "H", the output signal at the point X becomes "H".
It can also be configured to be fixed to.

Example 4. Further, in the above-described first embodiment, when the point W in FIG. 1 becomes "H", the output signal at the point X is unconditionally fixed to "H". The output signal is fixed at the output level of the point X at (when the output level of the point X is "L" at that time, "L")
In addition, when "H" is set to "H").

Embodiment 5. Further, in the above embodiment, the case where the operation mode register is used for designating the operation mode is shown, but other operation mode designating units such as a switch, a flag, and bit on / off may be used.

Embodiment 6. Further, in the above embodiment, the case of the single chip mode is shown, but the present invention is not limited to the single chip mode, and when a certain mode is designated, the signal line or terminal used in the other mode is used. It is applicable when there is a mode that disappears.

Example 7. Further, in the above embodiment, A-D
Although the case of conversion is shown, the present invention is not limited to the case of A-D conversion, and the present invention can be applied to the case of executing other processing.

Example 8. Further, in the above embodiment, as an example of the control means, the case where the output control circuit 10 prohibits the output of the predetermined signal line is shown, but the control means for prohibiting the input of the predetermined signal line may be provided. Good. When the unused input terminals are turned on / off, the internal signal lines and the power supply system may be affected, which can be prevented.

Further, in the above embodiment, the case of the single chip microcomputer is shown, but the case of other semiconductor devices may be used. Further, each unit and each unit of the present invention may be realized by any method such as hardware, software, and firmware.

[0021]

As described above, according to the present invention, when a predetermined process is performed in a predetermined mode in the related art, a slight change in the power supply voltage caused by a change in level of an unused signal line can be prevented. Since this can be prevented, the quality of the semiconductor device can be improved.

[Brief description of drawings]

FIG. 1 is a circuit diagram specifically showing the present invention.

FIG. 2 is a waveform diagram at each point (U, W, X) in FIG.

FIG. 3 is a circuit diagram in the vicinity of an output terminal of a conventional microcomputer.

FIG. 4 is a waveform diagram at each point (S, Q) in FIG.

[Explanation of symbols]

 1 Single-chip microcomputer 2a, 2b, 2c Output signal line 3 A-D converter 5 Operation mode register in microcomputer 6 AND gates 7a, 7b, 7c Inverters 8a, 8b, 8c NAND gates 9a, 9b, 9c 10 drivers Output control circuit showing the invention 11 CPU 12 ROM 13 RAM 14a, 14b, 14c Output terminal 15a, 15b, 15c Inverter

Claims (1)

[Claims] 1. A semiconductor device having the following elements: (a) an operation mode designating section for generating a mode signal for designating a predetermined operation mode; (b) under the operation mode designated by the mode signal, A A processing unit that generates an execution signal indicating execution of a predetermined process such as -D conversion, and (c) a control unit that controls input / output of a predetermined signal line based on the mode signal and the execution signal.