JPH0555100A - Manufacture of semiconductor substrate - Google Patents

Abstract

PURPOSE:To provide a method for manufacturing a semiconductor substrate, in which a reduction in resistance in a junction boundary can be effectively realized particularly in the method for manufacturing the substrate by a junction. CONSTITUTION:At least surfaces to be joined of first and second silicon wafers 11, 12 are mirror-polished, and a phosphorus-doped layer 13 is formed on the polished surface of the wafer 12. The wafers 11, 12 are cleaned in a cleaning step 30, made hydrophilic in a hydrophilically treating step 31, and thin oxide films 14, 15 are formed on the surface. The films 14, 15 are opposed, the wafers 11, 12 are brought into close contact with each other to form a junction substrate 16, vacuum-dried, heat treated, phosphorus and silicon are diffused to each other through the junction boundary so as not to allow oxide to remain in the boundary. The substrate 16 is ground, and polished to complete a semiconductor substrate 17.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor substrate, which is formed by joining two semiconductor wafers made of silicon crystal to form a power element and other semiconductor circuits.

[0002]

2. Description of the Related Art A semiconductor substrate used to form a high breakdown voltage semiconductor device is constructed by forming a low concentration layer on one surface of a silicon substrate and forming a high concentration layer on the other surface. Then, an active operation region is generally formed on the low concentration layer of this semiconductor substrate, and the high concentration layer is generally used as an electrode.

Various manufacturing methods have hitherto been attempted as means for manufacturing a semiconductor substrate having a junction structure for constructing such a semiconductor device. For example, a wafer direct bonding method is known. In this method, the mirror surfaces of two mirror-polished silicon wafers are made hydrophilic and then adhered to each other and bonded by heat treatment.
No. 700 is disclosed.

However, in this manufacturing method, the thin oxide film formed to impart hydrophilicity to the mirror-polished surface remains at the bonding interface even after the heat treatment. Therefore, for example, when configuring a vertical power transistor that allows a current to flow through this junction interface, the resistance of this junction surface leads to deterioration of device characteristics such as an increase in on-resistance, and the density of this junction interface increases. When a high current flows, the heat is concentrated at the junction interface, and in extreme cases, crystal destruction may occur.

[0005]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and an oxide film formed for imparting hydrophilicity to a mirror-polished surface has two silicon crystal bodies. It is an object of the present invention to provide a method for manufacturing a semiconductor substrate, which does not remain after being bonded and heat-treated, can achieve low resistance at the bonding interface, and can set good interface characteristics.

[0006]

According to the method of manufacturing a semiconductor substrate of the present invention, the bonding surfaces of the semiconductor wafers such as the first and second silicon crystal bodies to be bonded are mirror-polished, and one of them is mirror-polished. A high-concentration layer of impurities is formed on the surface, and then both the polished surfaces are hydrophilized to bring them into close contact with each other and heat-treated so that they are joined to each other.

[0007]

In such a method of manufacturing a semiconductor substrate, one of the first and second mirror-polished surfaces is doped with, for example, phosphorus to form a high-concentration impurity layer.
When heat treatment is performed at 0 ° C., oxygen at the bonding interface is simultaneously diffused into the silicon crystal body due to mutual diffusion of phosphorus and silicon, which are impurities, and an oxide is formed at the bonding interface between the first and second silicon crystal bodies. No longer localized. Therefore, this junction interface has a low resistance, and a vertical power transistor or the like can be effectively formed.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a manufacturing process according to the first embodiment, in which first and second silicon wafers 11 and 12 which are first and second semiconductor wafers to be bonded are prepared. In this case, although not particularly shown, at least one surface (the surface on the upper side in the drawing which is the bonding surface) is mirror-polished.

On the other hand, the second silicon wafer 12 is a high-concentration substrate (1 × 10 5) to which arsenic is added as a dopant.
¹⁸ cm ^-3 is composed of more than impurity concentration), its mirror polished surface phosphorus ion implantation or vapor phase diffusion, and doped by doped oxide method or the like so that the phosphorus doped region 13 is formed.

The ion implantation conditions at this time are, for example, an acceleration voltage of 80 KeV or more and a dose amount of 3.0 × 10 ¹⁵ cm.
^-2 or more, and the condition of Lindepo is, for example, POCl ₃
Deposition at 900 ° C or higher for 10 minutes or longer in the atmosphere. When phosphorus is introduced by the ion implantation method as described above, an amorphous layer is formed on the surface of the mirror-polished surface of the second silicon wafer 12, but in this embodiment, before the bonding step. No special heat treatment is performed to recover the crystallinity of this amorphous layer.

Here, at least one surface of the first silicon wafer 11 is mirror-polished to have an impurity concentration (1 × 10 ¹⁴ to 1 × 10 ¹⁸ cm ⁻³⁾ to which phosphorus, antimony, or arsenic is added as a dopant. ) Is composed of a low-concentration substrate.

In the substrate cleaning step 30, the first and second silicon wafers 11 and 12 thus configured are degreased and cleaned for contamination. This substrate cleaning step 30
For example, a mixed solution of H ₂ O ₂ , NH ₄ OH and H ₂ O, H ₂
This is a step of immersing the silicon wafers 11 and 12 in this order of a mixed solution of O ₂ , HCl and H ₂ O, and HF.

Next, the first and second processed in this way
The silicon wafers 11 and 12 of
For example, a silicon wafer 11 is dipped in a mixed solution of H ₂ O ₂ and H ₂ SO ₄ at a liquid temperature of about 90 ° C. for a time range of 10 minutes or less.
Thin oxide films 14 and 15 are formed on the surfaces of and 12, respectively, and the surfaces are activated. Then, in the drying step 32, spinner drying is performed.

In the first and second silicon wafers 11 and 12 dried in the drying step 32, the mirror-polished surface of the first silicon wafer 11 and the phosphorus-doped surface 13 of the second silicon wafer 12 are opposed to each other. In this way, they are brought into close contact with each other to form the adhesive substrate 16. By such a contact means, the two silicon wafers 11 and 12 are bonded by the affinity due to hydrogen bond.

The joint substrate 16 thus formed is 1 × 1.
While drying in a vacuum of 0 ^-4 Torr or less for 30 minutes or more,
After that, heat treatment is performed for one hour or more in a normal atmosphere of 600 ° C. or more. By this heat treatment, phosphorus and silicon of the phosphorus doping layer 13 are mutually diffused through the bonding surface, and at the same time, oxygen of the oxide films 14 and 15 formed to have hydrophilicity is also silicon from the bonding interface. Wafer
It will be spread within 11 and 12.

That is, no oxide film of high-resistance silicon oxide remains on the joint interface of the joint substrate 16 after the heat treatment, and this joint interface is a high phosphorus concentration region. It has high conductivity.

After the bonded substrate 16 is completed in this manner, the surface of the first silicon wafer 11 is ground and polished until the low-concentration layer of impurities has a desired thickness. The semiconductor substrate 17 having high conductivity at the junction interface is formed without any oxide remaining.

FIG. 2 shows an experimental result showing that oxygen at the junction interface is diffused by doping phosphorus. In this experiment, the mirror-polished surface of the high-concentration substrate is pre-deposited at 950 ° C. for 20 minutes in the atmosphere of phosphorus and nitrogen and oxygen and POCl ₃ . After that, the PSG film was removed with hydrofluoric acid, and this was bonded to a low-concentration substrate to form a bonded substrate. The heat treatment was performed at 1150 ° C. for 7 hours.

For comparison, this experiment was carried out under the same conditions except that phosphorus was not pinked as described above and phosphorus was not pinked as described above. ) The figure shows an example in which phosphorus is pink, and Figure (B) shows an example in which phosphorus is not pink.

Here, the bonding interface of the bonding substrate 16 is observed near the bonding interface (about 5 μm from the bonding surface) as shown in FIG.
After polishing to m), the side surface is obliquely polished until the bonding surface is exposed. Then, the change in resistance was measured by the spreading resistance method, and the change in the bonding interface was observed by further immersing in hydrofluoric acid.

By comparing the experimental results of FIGS. 2A and 2B, the resistance increases at the bonding interface unless phosphorus is doped. Further, when the joint surface is confirmed by a micrograph or the like, it can be confirmed that oxide is condensed at the joint interface in the case where phosphorus is not pinked, which causes increase in resistance. On the other hand, in the sample doped with phosphorus, no change was observed at the bonding interface even after the sample was immersed in hydrofluoric acid, and the oxygen localized at this bonding interface was heated in the silicon wafer. It can be understood that it was spread to.

FIG. 4 is for explaining the second embodiment. In the first embodiment, the surface of the second silicon wafer 12 was doped with phosphorus, but in this embodiment, a low concentration substrate is used. A phosphorus doping layer 20 is formed by doping phosphorus on the mirror-polished surface of a certain first silicon wafer 11. Subsequent steps are the substrate cleaning step as in the first embodiment.
30. Further, although not shown in the drawing, hydrophilic treatment and adhesion heat treatment are performed to complete the bonded substrate.

FIG. 5 shows a third embodiment. In the first embodiment, after a high-concentration layer of phosphorus is formed on the second silicon wafer 12 by ion implantation, the surface of the second silicon wafer 12 is left in the amorphous state and the first silicon wafer 12 is left in the first state. It was brought into close contact with the silicon wafer 11. However, in the third embodiment, phosphorus is ion-implanted into the mirror-polished surface of the second silicon wafer 12 to form an amorphous region 21 into which phosphorus has been introduced, and then the substrate is washed to perform the silicon wafer 12 cleaning. A heat treatment is performed to recover the crystallinity of the surface of the.

This heat treatment is performed, for example, at 80 in a nitrogen atmosphere.
This is performed under the conditions of 0 ° C. or higher and 30 minutes or longer. By this heat treatment, the amorphous region 21 is epitaxially grown by solid phase growth to form the single crystal layer 211. After that, the substrate cleaning step 30 is performed as in the first embodiment, and hydrophilic treatment, adhesion treatment, heat treatment, and grinding / polishing treatment (not shown) are further performed to complete the bonded semiconductor substrate.

FIG. 6 further shows a fourth embodiment. In the first embodiment, phosphorus, antimony, or arsenic is added to the first silicon wafer 11 as an N-type dopant at 1 × 10 ¹⁴ c.
The second silicon wafer 12 is N-type and contains 1 × 10 ¹⁸ arsenic and is composed of a low-concentration substrate added with m ⁻³ to 1 × 10 ¹⁸ cm ^−3.
constituted by high concentration substrate, which is added cm ^-3 or more, the surface of the second silicon wafer 12, for example by ion implantation or vapor phase diffusion method or the like, is added phosphorus than 1 × 10 ¹⁸ cm ^-3 After forming the Lindau pink layer 13 to be a high-concentration layer, they were joined.

On the other hand, in this embodiment, the second
Phosphorus is added to the surface of the silicon wafer 12 at a high concentration of 1 × 10 ¹⁸ cm ⁻³ or more to form the first region 22, and
Further, boron of a conductivity type different from phosphorus is added in a state that the concentration is less than the phosphorus concentration, and the second region is added.
Form 23. After that, the substrate cleaning step 30 is performed, and the same processing as in the first embodiment is performed.

The boron added in this example is
Since the diffusion constant in silicon is almost equal to that of phosphorus, the phosphorus added to the bonding surface can be removed by the heat treatment at about 1150 ° C. at the time of bonding and the heat treatment at a high temperature for a long time which is received in the device forming process such as well formation thereafter. It is possible to compensate for the change in carrier concentration by diffusing into the device formation region.

In the fourth embodiment, the first silicon wafer 11 is shown as N ⁻ and the second silicon wafer 12 is shown as N ⁺ , but this is different from the first silicon wafer.
11 may be configured as P ⁻ and the second silicon wafer 12 may be configured as P ⁺ . In this case, the joint surface is preliminarily added with phosphorus having a concentration of 1 × 10 ¹⁸ cm ⁻³ or more, and boron which is almost equal to but slightly larger than that, and unnecessary N ^{− which is} not desirable in terms of characteristics in the vicinity of the joint surface. To prevent the formation of

Alternatively, the first silicon wafer 11 may be N ⁻ and the second silicon wafer 12 may be P ⁺ , and the same manufacturing process as in the fourth embodiment may be adopted.
Further, the first silicon wafer 11 may be P ⁻ and the second silicon wafer 12 may be N ⁺ . In this case, equal amounts of phosphorus and boron are added to the joint surface in advance.

FIG. 7 shows a fifth embodiment. In the first embodiment, the first silicon wafer 11 is composed of an N type low concentration substrate and the second silicon wafer 12 is composed of an N type high concentration substrate. However, in this embodiment, Low-concentration substrate in which the first silicon wafer 11 is doped with boron as a dopant (impurity concentration of 1 × 10 ¹⁴ to 1 × 10 ¹⁸ cm ⁻³ is set), second silicon wafer 12
Is composed of a high-concentration substrate to which boron is added as a dopant (an impurity concentration of 1 × 10 ¹⁸ cm ⁻³ or more is set).

Such first and second silicon wafers
At least the surfaces of 11 and 12 to be bonded are mirror-polished, and the mirror-polished surface of the second silicon wafer 12 is doped with boron by ion implantation, vapor phase diffusion, or a doped oxide method, A doping region 25 is formed. This boron doping may be performed on the first silicon wafer 11.

Thereafter, the substrate is washed in the same manner as in the first embodiment, and hydrophilic treatment is performed to form thin oxide films 14 and 15 on the surfaces of the first and second silicon wafers 11 and 12, and the oxidation is performed. The first and second silicon wafers 11 and 12 are adhered to each other with the surfaces of the films 14 and 15 facing each other.

When boron is introduced by ion implantation, the surface of the mirror-polished surface of the silicon wafer 12 becomes amorphous, but it may be adhered in this amorphous state. However, even if the crystallinity is recovered by further heat treatment and then adhered in the crystal state, the subsequent heat treatment causes mutual diffusion of boron and silicon through the bonding interface, and at the same time, oxygen at the bonding interface is also transferred to the wafer. Will be diffused in.

In the state where the semiconductor substrate 17 was completed by polishing the bonded substrate thus constructed, no oxide remained at the bonded interface, and the bonded interface having sufficiently high conductivity was set. The semiconductor substrate 17 made of the bonded substrate is obtained.

[0035]

As described above, according to the method for manufacturing a semiconductor substrate of the present invention, the oxide does not remain or condense at the bonding interface, and the conductivity at the bonding interface is sufficiently secured. Therefore, a semiconductor circuit element having such characteristics that the semiconductor substrate is sufficiently stable in characteristics can be formed by the semiconductor substrate having such a junction.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a manufacturing process of a semiconductor substrate according to an embodiment of the present invention.

FIG. 2 is a view showing a resistance distribution state at a bonding interface of a semiconductor substrate manufactured in the above-described example and a conventional semiconductor substrate of the same kind in comparison.

FIG. 3 is a diagram illustrating a processing process when observing a semiconductor substrate formed by bonding.

FIG. 4 is a diagram for explaining a second embodiment of the present invention.

FIG. 5 is a diagram illustrating a third embodiment of the present invention.

FIG. 6 is a diagram for explaining the fourth embodiment of the present invention.

FIG. 7 is a diagram for explaining a fifth embodiment of the present invention.

[Explanation of symbols]

11 ... First silicon wafer (first semiconductor wafer), 12
... second silicon wafer (second semiconductor wafer), 13 ...
Phosphorus doping layer, 14, 15 ... Oxide film, 16 ... Bonding substrate, 17
… Semiconductor substrate.

Claims (1)

[Claims] 1. A mirror-polishing step of mirror-polishing respective bonding surfaces of first and second semiconductor wafers to be bonded, and at least one of the first and second semiconductor wafers having a mirror-polishing bonding surface. A high-concentration layer forming step of forming an impurity high-concentration layer, and a hydrophilic treatment step of making the mirror-polished bonding surfaces of the first and second semiconductor wafers hydrophilic, respectively. A method of manufacturing a semiconductor substrate, wherein the mirror-polished bonding surfaces are directly brought into close contact with each other.