JPH0552062B2 - - Google Patents

Info

Publication number
JPH0552062B2
JPH0552062B2 JP1316510A JP31651089A JPH0552062B2 JP H0552062 B2 JPH0552062 B2 JP H0552062B2 JP 1316510 A JP1316510 A JP 1316510A JP 31651089 A JP31651089 A JP 31651089A JP H0552062 B2 JPH0552062 B2 JP H0552062B2
Authority
JP
Japan
Prior art keywords
group
conductive films
film
element substrate
film carrier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1316510A
Other languages
Japanese (ja)
Other versions
JPH02186653A (en
Inventor
Shigeki Yabu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP1316510A priority Critical patent/JPH02186653A/en
Publication of JPH02186653A publication Critical patent/JPH02186653A/en
Publication of JPH0552062B2 publication Critical patent/JPH0552062B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/281Applying non-metallic protective coatings by means of a preformed insulating foil
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits

Landscapes

  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明はフイルムキヤリア実装構造に関し、特
には、異方性導電膜を用いて接続するフイルムキ
ヤリア実装構造に係る。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a film carrier mounting structure, and more particularly to a film carrier mounting structure connected using an anisotropic conductive film.

[従来の技術] 例えばガラス基板上のITOなどの透明導電膜上
に、例えば駆動用ICを接続する場合、異方性導
電膜を用いてフイルムキヤリアにより接続する方
法がよく用いられている。
[Prior Art] When connecting, for example, a driving IC to a transparent conductive film such as ITO on a glass substrate, a method of connecting by a film carrier using an anisotropic conductive film is often used.

ところで、従来フイルムキヤリア実装構造とし
ては、第5図に示すものが知られている。
By the way, as a conventional film carrier mounting structure, the one shown in FIG. 5 is known.

第5図は、従来のフイルムキヤリア実装構造の
断面図を示すが、ポリイミド等の可とう性絶縁フ
イルム1上に、接着材2にて、導体パターンを構
成する銅箔3が接着されており、可とう性絶縁フ
イルム1にあけられたデバイス孔5の内側に、半
導体素子4と接続するためフインガー状にインナ
ーリードボンデイング部6が形成され、ここにお
いて半導体素子4が接続されている。
FIG. 5 shows a cross-sectional view of a conventional film carrier mounting structure, in which a copper foil 3 constituting a conductor pattern is bonded onto a flexible insulating film 1 made of polyimide or the like with an adhesive 2. A finger-shaped inner lead bonding portion 6 is formed inside a device hole 5 formed in the flexible insulating film 1 for connection to the semiconductor element 4, and the semiconductor element 4 is connected here.

このフイルムキヤリア10を、例えば液晶表示
素子のガラス基板8上に形成されたITO等の透明
導電膜9上に、接着剤中に金属粒子等の導電粒子
を分散させた異方性導電膜7を用いて熱圧着する
ことにより接合する。
This film carrier 10 is applied onto a transparent conductive film 9 such as ITO formed on a glass substrate 8 of a liquid crystal display element, and an anisotropic conductive film 7 in which conductive particles such as metal particles are dispersed in an adhesive. They are joined by thermocompression bonding.

[発明が解決しようとする課題] しかし、上記従来のフイルムキヤリア実装構造
には以下に述べるような問題点がある。
[Problems to be Solved by the Invention] However, the conventional film carrier mounting structure described above has the following problems.

近年、液晶表示素子が、従来のCRTにかわ
る大画面デイスプレイとして用いられるように
なつてきており、例えば640×400ドツトあるは
それ以上の液晶デイスプレイがパーソナルコン
ピユータやワードプロセツサーなどに用いられ
るようになつてきている。さらに、大画面化、
高精細化、カラー化などが要求されてきてい
る。
In recent years, liquid crystal display elements have come to be used as large-screen displays instead of conventional CRTs. For example, liquid crystal displays with 640 x 400 dots or more are being used in personal computers, word processors, etc. I'm getting used to it. In addition, larger screens,
There is a growing demand for higher definition and colorization.

これら大画面液晶デイスプレイに駆動用IC
を接続する場合、前述のごとくフイルムキヤリ
ア方式を用いて異方性導電膜により実装する実
装構造が最近よく用いられるようになつてき
た。異方性導電膜としては、例えばソニーケミ
カル製CP−2132、日立化成製AC5052などが知
られており、これらの接続分解能は5本/mm
(200μmピツチ)まで可能である。
The driving IC for these large-screen LCD displays
Recently, a mounting structure in which an anisotropic conductive film is mounted using a film carrier method, as described above, has become popular. As anisotropic conductive films, for example, CP-2132 manufactured by Sony Chemical and AC5052 manufactured by Hitachi Chemical are known, and their connection resolution is 5 lines/mm.
(200 μm pitch) is possible.

ところで、大画面化、高精細化、カラー化な
どの要求に対して液晶デイスプレイの画素は高
密度化、狭ピツチ化が求められている。大画面
化においては液晶デイスプレイのガラス基板上
の透明導電膜の負荷インピーダンスの増大によ
り、駆動用ICからの信号の遅延等が起り、表
示品位が低下する。かかる表示品位の低下を防
止するため、第6図に示すごとく、画面中央部
より透明導電膜9のパターンをガラス基板8の
両側に取り出して、両側に駆動用ICのフイル
ムキヤリア10を接続する方式が考えられてい
る。また、高精細化、カラー化に対しては画素
の非常な狭ピツチ化、例えば8本/mm(125μ
mピツチ)や10本/mm(100μmピツチ)など
が要求されるが、前述の通り、現在、異方性導
電膜でフイルムキヤリアを実装するには5本/
mm(200μmピツチ)程度が限度であるため、
例えば、第7図に示すようにガラス基板8上の
透明導電膜9のパターンを交互に千鳥状にガラ
ス基板8の両側に取り出してパターンピツチを
半分にして、両側に駆動用ICのフイルムキヤ
リア10を接続する方式が考えられている。
Incidentally, in response to demands for larger screens, higher definition, and more color, the pixels of liquid crystal displays are required to have higher density and narrower pitch. When increasing the screen size, the load impedance of the transparent conductive film on the glass substrate of the liquid crystal display increases, causing delays in signals from the driving IC, resulting in a decrease in display quality. In order to prevent such deterioration in display quality, as shown in FIG. 6, a method is adopted in which the pattern of the transparent conductive film 9 is taken out from the center of the screen on both sides of the glass substrate 8, and the film carrier 10 of the driving IC is connected to both sides. is considered. In addition, for high definition and colorization, the pixel pitch must be extremely narrow, for example, 8 pixels/mm (125μ
m pitch) or 10 lines/mm (100 μm pitch), but as mentioned above, currently, 5 lines/mm (100 μm pitch) is required to implement a film carrier with an anisotropic conductive film.
Since the limit is about mm (200μm pitch),
For example, as shown in FIG. 7, the pattern of the transparent conductive film 9 on the glass substrate 8 is taken out alternately in a staggered manner on both sides of the glass substrate 8, the pattern pitch is halved, and the film carrier 10 of the driving IC is placed on both sides. A method of connecting the two is being considered.

しかしながら、このようにガラス基板8の両
側に駆動用ICを実装しようとすると、第8図
に示すように、ガラス基板8の一方の側(図で
はむかつた左側)に実装する駆動用IC11の
液晶画素駆動用出力が図中に示すように1より
矢印方向に走査するように設計されているとす
ると、同一の駆動用IC11を第9図に示すよ
うにガラス基板8の他方の側(図ではむかつて
右側)に実装すると、駆動用IC11の液晶画
素駆動用出力が図中の矢印で示すようになり、
ガラス基板8の両側で走査方向が逆になつてし
まい、同一の駆動用ICを用いることができな
くなる。このため、駆動用IC11を双方向に
走査可能な出力を持つように設計するか、ある
いは、まつたく別の2種(液晶デイスプレイに
おいては上下2枚のガラス基板にそれぞれ駆動
用ICが必要なので4種必要となる)の駆動用
ICが必要となり、駆動用ICのコストアツプや
フイルムキヤリア実装工程が複雑となる等の問
題点があつた。
However, when attempting to mount the driving ICs on both sides of the glass substrate 8 in this way, as shown in FIG. Assuming that the liquid crystal pixel driving output is designed to scan in the direction of the arrow from 1 as shown in the figure, the same driving IC 11 is connected to the other side of the glass substrate 8 (see Figure 9). When mounted on the right side), the output for driving the liquid crystal pixel of the driving IC 11 becomes as shown by the arrow in the figure.
The scanning direction is reversed on both sides of the glass substrate 8, making it impossible to use the same driving IC. For this reason, it is necessary to design the driving IC 11 to have an output that can scan in both directions, or to use two different types of driving ICs. For driving (seeds required)
Since an IC was required, there were problems such as an increase in the cost of the drive IC and a complicated film carrier mounting process.

また、前述の第5図に示すような実装方法を
用いると、異方性導電膜7の熱圧着時には熱圧
着用ホツトプレスによりポリイミド等で形成さ
れた可とう性絶縁フイルム1には150〜250℃の
高温がかかるため、可とう性絶縁フイルム1と
ガラス基板8との熱膨張率の違いにより、可と
う性絶縁フイルム1が熱圧着時に熱膨張し、熱
圧着後には収縮するため、ガラス基板8との間
にズレが生じ、異方性導電膜7にズレが生じた
り、ストレスがかかり、接続抵抗の増加や、接
続強度の低下をまねき、フイルムキヤリアの実
装の信頼性を低下させるという問題点があつ
た。
Furthermore, when the mounting method shown in FIG. 5 described above is used, when the anisotropic conductive film 7 is thermocompression bonded, the flexible insulating film 1 made of polyimide or the like is heated to 150 to 250°C by the thermocompression hot press. Due to the difference in coefficient of thermal expansion between the flexible insulating film 1 and the glass substrate 8, the flexible insulating film 1 expands thermally during thermocompression bonding and contracts after thermocompression bonding. The problem is that the anisotropic conductive film 7 is misaligned and stress is applied to the anisotropic conductive film 7, leading to an increase in connection resistance and a decrease in connection strength, which reduces the reliability of film carrier mounting. It was hot.

また、熱圧着時には、実際には異方性導電膜
を130〜180℃の範囲(各社製品により異なる)
で±5℃程度の精度で熱を加えることが望まし
いが、従来の実装構造においてはフイルムキヤ
リア10の可とう性絶縁フイルム1を介して熱
圧着用ホツトプレスにより加熱するため、この
可とう性絶縁フイルムが断熱材として作用し、
異方性導電膜に加える熱の制御が困難でかつ加
熱時間が長くかかるという問題点があつた。
In addition, during thermocompression bonding, the anisotropic conductive film is actually heated in the range of 130 to 180℃ (varies depending on the product of each company).
It is desirable to apply heat with an accuracy of approximately ±5°C, but in the conventional mounting structure, heating is performed by a hot press for thermocompression via the flexible insulating film 1 of the film carrier 10, so this flexible insulating film acts as an insulator,
There were problems in that it was difficult to control the heat applied to the anisotropic conductive film and it took a long time to heat it.

本発明は、上記従来例の欠点を除去し、駆動用
ICのフイルムキヤリアを基板両側に実装できる
ようにするとともに、フイルムキヤリアの可とう
性絶縁フイルムと接続する基板との熱膨張率の違
いによるズレやストレスによる接続の信頼性低下
を防止することができ、かつ、熱圧着時に加熱温
度制御を容易にし、加熱時間を短時間にすること
ができるフイルムキヤリア実装構造を提供するこ
とを目的とする。
The present invention eliminates the drawbacks of the conventional example and provides a drive
This makes it possible to mount the IC film carrier on both sides of the board, and prevents deterioration in connection reliability due to misalignment and stress caused by differences in thermal expansion coefficients between the flexible insulating film of the film carrier and the connecting board. Moreover, it is an object of the present invention to provide a film carrier mounting structure that facilitates heating temperature control during thermocompression bonding and shortens heating time.

[課題を解決するための手段] 本発明の接続構造体は、第一のフイルム・キヤ
リヤに設けた第一群の導電膜を介して、素子基板
上に設けた複数の導電膜のうちの第二群の導電膜
と該素子基板の対向する両側のうちの一方の側に
配置した第一の半導体とを電気的に接続してな
り、且つ第二のフイルム・キヤリヤに設けた第三
群の導電膜を介して、前記素子基板上に設けた複
数の導電膜のうちの第四群の導電膜と該素子基板
の対向する両極のうちの他方の側に配置した第二
の半導体とを電気的に接続してなる接続構造体で
あつて、 前記第一及び第二のフイルム・キヤリヤがそれ
ぞれ前記第一群の及び第三群の導電膜の一方端か
ら延長した第一群及び第二群のフインガー状導電
膜を有し、 前記第一の半導体がフエース・アツプ状態にな
る様に、異方性導電膜を介して、前記第一群のフ
インガー状導電膜と第二群の導電膜とが電気的に
接続してなり、且つ 前記第二の半導体がフエース・ダウン状態にな
る様に、異方性導電膜を介し、前記第二群のフイ
ンガー状導電膜と前記第四群の導電膜とが電気的
に接続してなる ことを特徴とする。
[Means for Solving the Problems] The bonded structure of the present invention connects the first group of conductive films provided on the first film carrier to the first of the plurality of conductive films provided on the element substrate. A third group of conductive films is electrically connected to a first semiconductor disposed on one of the opposing sides of the element substrate, and a third group of conductive films is disposed on a second film carrier. A fourth group of conductive films among the plurality of conductive films provided on the element substrate and a second semiconductor disposed on the other side of the opposing poles of the element substrate are electrically connected via a conductive film. a first group and a second group of conductive films extending from one end of the first group and a third group of conductive films, respectively; The first group of finger-shaped conductive films and the second group of conductive films are connected to each other through an anisotropic conductive film so that the first semiconductor is in a face-up state. The second group of finger-shaped conductive films and the fourth group of finger-shaped conductive films are connected to each other through an anisotropic conductive film such that the second semiconductor is electrically connected and the second semiconductor is in a face-down state. and are electrically connected to each other.

[実施例] 以下実施例を参照して本発明を詳細に説明す
る。
[Examples] The present invention will be described in detail below with reference to Examples.

第1図は本発明によるフイルムキヤリア実装構
造の一実施例で、例えば厚さ75ないし125μmの
ポリイミド(例えば宇部興産製ユーピレツクスS
など)より成る可とう製絶縁フイルム1に、接着
材2により厚さ35μmの銅箔3が接着され、エツ
チングにより導体パターンが形成されている。
FIG. 1 shows an embodiment of the film carrier mounting structure according to the present invention.
A copper foil 3 having a thickness of 35 .mu.m is bonded to a flexible insulating film 1 made of a material such as 35 .mu.m thick with an adhesive 2, and a conductive pattern is formed by etching.

この導体パターンはデバイス孔5まで延在して
形成されており、フエース・アツプ状態の半導体
素子4とのボンデイング用のフインガー状のイン
ナーリードボンデイング部6を形成しており、金
バンプ等の熱圧着時により半導体素子4が接続さ
れている。
This conductor pattern is formed to extend to the device hole 5, and forms a finger-shaped inner lead bonding part 6 for bonding with the semiconductor element 4 in a face-up state, and is used for thermocompression bonding of gold bumps, etc. A semiconductor element 4 is sometimes connected.

同様にして、フインガー状のアウターリードボ
ンデイング部21が可とう性絶縁フイルム1より
延在して形成されている。
Similarly, finger-shaped outer lead bonding portions 21 are formed extending from the flexible insulating film 1.

前記アウターリードボンデイング部21と液晶
表示素子のガラス基板8上のITO等より成る透明
導電膜9とを接着剤中に金属粒子等の導電粒子を
分散させて成る異方性導電膜7(例えば日立化成
製AC5052)を介し対峠させるとともに、ポリイ
ミド(例えば宇部興産製ユーピレツクスR厚さ
7.5μm)より成る他の可とう性絶縁フイルム22
をアウターリードボンデイング部21の上方に配
置して熱圧着により接合して、フイルムキヤリア
実装構造が形成されている。
The outer lead bonding part 21 and the transparent conductive film 9 made of ITO or the like on the glass substrate 8 of the liquid crystal display element are bonded together using an anisotropic conductive film 7 made by dispersing conductive particles such as metal particles in an adhesive (for example, Hitachi Polyimide (for example, Upilex R manufactured by Ube Industries)
7.5 μm)
are arranged above the outer lead bonding part 21 and bonded by thermocompression bonding to form a film carrier mounting structure.

なお、この可とう性絶縁フイルム22はその面
積が異方性導電膜7と概略同寸法にするのが望ま
しい。この可とう性絶縁フイルム22は、熱圧着
時に異方性導電膜7の接着材が熱圧着ホツトプレ
スのヘツド部分に付着するのを防止すると共に、
熱圧着後に異方性導電膜が吸湿して信頼性が低下
するのを防止する働きがある。
Note that it is desirable that the area of this flexible insulating film 22 be approximately the same size as that of the anisotropic conductive film 7. This flexible insulating film 22 prevents the adhesive of the anisotropic conductive film 7 from adhering to the head part of the thermocompression hot press during thermocompression bonding, and
It works to prevent the anisotropic conductive film from absorbing moisture and reducing reliability after thermocompression bonding.

このようにしてフイルムキヤリアの実装構造を
形成すると、第2図に示すように、半導体素子4
をフエース・ダウン状態で、インナーリードボン
デイング部6と接続し、このフイルムキヤリア1
0全体の表裏を逆にして、ガラス基板8上に実装
することが可能である。なお、第2図中の各部分
は第1図と同様である。
When the mounting structure of the film carrier is formed in this way, as shown in FIG.
Connect the film carrier 1 to the inner lead bonding part 6 with the face down.
It is possible to turn the entire 0 upside down and mount it on the glass substrate 8. Note that each part in FIG. 2 is the same as in FIG. 1.

したがつて、本発明のフイルムキヤリア実装構
造においては、第6図に示すようにガラス基板8
の両側にフイルムキヤリア10を実装する場合、
第6図中のガラス基板8の左側に実装するフイル
ムキヤリア10を第1図の横断面図および第3図
の平面図に示すように実装し、また右側に実装す
るフイルムキヤリア10を、第2図の横断面図お
よび第4図の平面図に示すように実装することが
できる。
Therefore, in the film carrier mounting structure of the present invention, as shown in FIG.
When mounting film carriers 10 on both sides of
The film carrier 10 to be mounted on the left side of the glass substrate 8 in FIG. 6 is mounted as shown in the cross-sectional view in FIG. 1 and the plan view in FIG. It can be implemented as shown in the cross-sectional view of the figure and the plan view of FIG.

ここで、第3図および第4図において、駆動用
IC11の液晶画素駆動用出力の走査方向を考え
ると、第3図においては従来例通り1より矢印方
向に走査されるが、第4図においては図より明ら
かなようにフイルムキヤリア10が裏返された形
で実装されるので同一の駆動用IC11とフイル
ムキヤリア10を使用しても、その液晶画素駆動
用出力の走査方向は図中に示すように1より矢印
方向に走査され、ガラス基板の左右に実装しても
走査方向が変わることはない。
Here, in FIGS. 3 and 4, for driving
Considering the scanning direction of the output for driving the liquid crystal pixels of the IC 11, in Fig. 3 it is scanned in the direction of the arrow 1 as in the conventional example, but in Fig. 4, as is clear from the figure, the film carrier 10 is turned over. Even if the same driving IC 11 and film carrier 10 are used, the scanning direction of the liquid crystal pixel driving output will be in the direction of the arrow 1 from 1 as shown in the figure, and will be mounted on the left and right sides of the glass substrate. Even if it is implemented, the scanning direction will not change.

また、本発明のフイルムキヤリア実装構造では
第1図にて前述したように、アウターリードボン
デイング部21の可とう性絶縁フイルム22はア
ウターリードボンデイング部21に接着材にては
接着されておらず、また熱膨張を無視できる程度
に薄いものを用いれば熱圧着時の熱膨張、収縮に
より、異方性導電膜にズレやストレスを発生させ
ることがない。
Furthermore, in the film carrier mounting structure of the present invention, as described above with reference to FIG. Furthermore, if a material is used that is so thin that its thermal expansion can be ignored, the anisotropic conductive film will not be misaligned or stressed due to thermal expansion and contraction during thermocompression bonding.

また、本発明においては、熱圧着部にはフイル
ムキヤリア10に使用されている可とう性絶縁フ
イルム1より充分に薄い可とう性絶縁フイルム2
2を用いているので、熱圧着用ホツトプレスの加
熱ヘツドからの温度が異方性導電膜に伝わりやす
く、加熱温度の制御が比較的容易で、かつ短時間
で熱圧着できる。
Further, in the present invention, a flexible insulating film 2 that is sufficiently thinner than the flexible insulating film 1 used in the film carrier 10 is used in the thermocompression bonding part.
2, the temperature from the heating head of the thermocompression hot press is easily transmitted to the anisotropic conductive film, the heating temperature can be controlled relatively easily, and thermocompression bonding can be carried out in a short time.

前記実施例においては、フイルムキヤリアと液
晶表示素子のガラス基板において説明したが、液
晶表示素子に限らず、長尺用サーマルヘツド、密
着型イメージセンサ、EL表示素子等の駆動用IC
実装についても同様にして用いることができる。
In the above embodiments, the film carrier and the glass substrate of the liquid crystal display element were explained, but it is not limited to liquid crystal display elements, but can also be applied to driving ICs for long thermal heads, contact type image sensors, EL display elements, etc.
The same can be used for implementation.

なお、可とう性絶縁フイルムより充分に薄い可
とう性絶縁フイルムを用いて熱圧着する方法は、
フイルムキヤリアのアウターリードボンデイング
部に限らず、他の可とう性絶縁フイルムを用いた
フレキシブル基板と、ガラス基板やガラスエポキ
シ・フエノール等のプリント板との接合に用いる
こともできる。
In addition, the method of thermocompression bonding using a flexible insulating film that is sufficiently thinner than the flexible insulating film is as follows.
It can be used not only for the outer lead bonding part of a film carrier, but also for bonding flexible substrates using other flexible insulating films and printed boards such as glass substrates and glass epoxy/phenol.

第10図に本発明を密着型イメージセンサに用
いた他の実施例を示す。従来の密着型イメージセ
ンサにフイルムキヤリアにてICを実装する場合
にも、前記実施例にて述べたように、アウターリ
ードボンデイングを異方性導電膜を用いて行う
と、5本/mm(200μmピツチ)程度の密度でし
か実装できないため、センサー部の密度もあまり
高くすることができなかつた。しかし、第10図
に示すように、本発明を用いて、ICをガラス基
板両側を実装することによりセンサー部の密度を
高めることができる。
FIG. 10 shows another embodiment in which the present invention is applied to a contact type image sensor. Even when mounting an IC on a conventional contact-type image sensor using a film carrier, if outer lead bonding is performed using an anisotropic conductive film as described in the example above, the lead bonding rate will be 5 wires/mm (200 μm). Since it can only be mounted at a density of about 300 yen (Pitch), it was not possible to increase the density of the sensor section too much. However, as shown in FIG. 10, the density of the sensor section can be increased by mounting ICs on both sides of the glass substrate using the present invention.

[発明の効果] 以上説明したように、本発明によるフイルムキ
ヤリア実装構造を用いることにより、同一の半導
体素子とフイルムキヤリアを用いて、フイルムキ
ヤリアの表裏を逆にして実装することができるの
で、その接合する基板に対して出力の走査方向が
変わることなく実装できる。
[Effects of the Invention] As explained above, by using the film carrier mounting structure according to the present invention, it is possible to mount the same semiconductor element and film carrier with the front and back sides of the film carrier reversed. It can be mounted without changing the scanning direction of the output with respect to the substrate to be bonded.

したがつてICのコストアツプやフイルムキヤ
リアの実装工程が複雑になることがない。
Therefore, the cost of IC does not increase and the process of mounting the film carrier does not become complicated.

また、可とう性絶縁フイルムとガラス基板との
熱膨張係数の差による異方性導電膜へのズレやス
トレスが発生しないので、接続部の信頼性の向上
に役立つ。
Further, since the anisotropic conductive film is not displaced or stressed due to the difference in thermal expansion coefficient between the flexible insulating film and the glass substrate, it is useful for improving the reliability of the connection portion.

また、熱圧着時に異方性導電膜に熱圧着用ホツ
トプレスより温度が伝わりやすいので、熱圧着温
度の制御が容易でかつ短時間で行えるようにな
る。
Furthermore, since temperature is more easily transmitted to the anisotropic conductive film during thermocompression bonding than in a hot press for thermocompression bonding, the thermocompression bonding temperature can be controlled easily and in a short time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は本発明によるフイルムキ
ヤリアの実装構造を示す断面図である。第3図お
よび第4図は本発明によるフイルムキヤリア実装
構造を用いた場合のICの出力走査方向を示す平
面図である。第5図は異方性導電膜を用いたフイ
ルムキヤリアの実装構造の従来例を示す断面図で
ある。第6図および第7図はガラス基板へのフイ
ルムキヤリアの実装状態を示す平面図である。第
8図および第9図は従来のフイルムキヤリア実装
構造を用いた場合のICの出力走査方向を示す平
面図である。第10図は本発明の他の実施例を示
す平面図である。 1……可とう性絶縁フイルム、2……接着材、
3……銅箔、4……半導体素子、5……デバイス
孔、6……インナーリードボンデイグ部、7……
異方性導電膜、8……配線基板(ガラス基板)、
9……透明導電膜、10……フイルムキヤリア、
11……駆動用IC、21……アウターリードボ
ンデイング部、22……可とう性絶縁フイルム。
1 and 2 are cross-sectional views showing a mounting structure of a film carrier according to the present invention. 3 and 4 are plan views showing the output scanning direction of an IC when using the film carrier mounting structure according to the present invention. FIG. 5 is a sectional view showing a conventional example of a film carrier mounting structure using an anisotropic conductive film. FIGS. 6 and 7 are plan views showing how the film carrier is mounted on the glass substrate. FIGS. 8 and 9 are plan views showing the output scanning direction of an IC when a conventional film carrier mounting structure is used. FIG. 10 is a plan view showing another embodiment of the present invention. 1...Flexible insulating film, 2...Adhesive material,
3...Copper foil, 4...Semiconductor element, 5...Device hole, 6...Inner lead bonding part, 7...
Anisotropic conductive film, 8... wiring board (glass substrate),
9...Transparent conductive film, 10...Film carrier,
DESCRIPTION OF SYMBOLS 11...Drive IC, 21...Outer lead bonding part, 22...Flexible insulating film.

Claims (1)

【特許請求の範囲】 1 第一のフイルム・キヤリヤに設けた第一群の
導電膜を介して、素子基板上に設けた複数の導電
膜のうちの第二群の導電膜と該素子基板の対向す
る両側のうちの一方の側に配置した第一の半導体
とを電気的に接続してなり、且つ第二のフイル
ム・キヤリヤに設けた第三群の導電膜を介して、
前記素子基板上に設けた複数の導電膜のうちの第
四群の導電膜と該素子基板の対向する両極のうち
の他方の側に配置した第二の半導体とを電気的に
接続してなる接続構造体であつて、 前記第一及び第二のフイルム・キヤリヤがそれ
ぞれ前記第一群の及び第三群の導電膜の一方端か
ら延長した第一群及び第二群のフインガー状導電
膜を有し、 前記第一の半導体がフエース・アツプ状態にな
る様に、異方性導電膜を介して、前記第一群のフ
インガー状導電膜と第二群の導電膜とが電気的に
接続してなり、且つ 前記第二の半導体がフエース・ダウン状態にな
る様に、異方性導電膜を介し、前記第二群のフイ
ンガー状導電膜と前記第四群の導電膜とが電気的
に接続してなる ことを特徴とする接続構造体。 2 前記素子基板が表示素子を構成するためのガ
ラス基板である特許請求の範囲第1項記載の接続
構造体。 3 前記表示素子が液晶を用いた素子である特許
請求の範囲第2項記載の接続構造体。 4 前記素子基板がイメージセンサを構成するた
めのガラス基板である特許請求の範囲第1項記載
の接続構造体。 5 前記第二群の導電膜と第四群の導電膜とが前
記素子基板上に交互に配線してなる特許請求の範
囲第1項記載の接続構造体。 6 前記第二群の導電膜と第四群の導電膜とが前
記素子基板上に一本おきに交互に配線してなる特
許請求の範囲第1項記載の接続構造体。 7 前記第二群の導電膜が前記素子基板の面内の
一方の側に配線してなり、前記第四群の導電膜が
該素子基板の面内の他方の側に配線してなる特許
請求の範囲第1項記載の接続構造体。
[Claims] 1. A second group of conductive films of a plurality of conductive films provided on an element substrate and a conductive film of the element substrate are connected to each other through a first group of conductive films provided on a first film carrier. electrically connected to a first semiconductor disposed on one of the opposing sides, and via a third group of conductive films provided on the second film carrier;
A fourth group of conductive films among the plurality of conductive films provided on the element substrate is electrically connected to a second semiconductor disposed on the other side of the opposing poles of the element substrate. A connecting structure, wherein the first and second film carriers each have a first group and a second group of finger-shaped conductive films extending from one end of the first group and third group of conductive films, respectively. and the first group of finger-shaped conductive films and the second group of conductive films are electrically connected via an anisotropic conductive film so that the first semiconductor is in a face-up state. and the finger-shaped conductive films of the second group and the fourth group are electrically connected via the anisotropic conductive film so that the second semiconductor is in a face-down state. A connection structure characterized by: 2. The connected structure according to claim 1, wherein the element substrate is a glass substrate for forming a display element. 3. The connected structure according to claim 2, wherein the display element is an element using liquid crystal. 4. The connected structure according to claim 1, wherein the element substrate is a glass substrate for configuring an image sensor. 5. The connected structure according to claim 1, wherein the second group of conductive films and the fourth group of conductive films are alternately wired on the element substrate. 6. The connected structure according to claim 1, wherein the second group of conductive films and the fourth group of conductive films are alternately wired on the element substrate. 7. A patent claim in which the conductive films of the second group are wired on one side in the plane of the element substrate, and the conductive films of the fourth group are wired on the other side in the plane of the element substrate. The connected structure according to item 1.
JP1316510A 1989-12-07 1989-12-07 Connection between semiconductor element and electrode, and display device Granted JPH02186653A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1316510A JPH02186653A (en) 1989-12-07 1989-12-07 Connection between semiconductor element and electrode, and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1316510A JPH02186653A (en) 1989-12-07 1989-12-07 Connection between semiconductor element and electrode, and display device

Publications (2)

Publication Number Publication Date
JPH02186653A JPH02186653A (en) 1990-07-20
JPH0552062B2 true JPH0552062B2 (en) 1993-08-04

Family

ID=18077911

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1316510A Granted JPH02186653A (en) 1989-12-07 1989-12-07 Connection between semiconductor element and electrode, and display device

Country Status (1)

Country Link
JP (1) JPH02186653A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04139848A (en) * 1990-10-01 1992-05-13 Mitsubishi Electric Corp Semiconductor device

Also Published As

Publication number Publication date
JPH02186653A (en) 1990-07-20

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