JPH04340928A - Mounting structure for semiconductor element, electrooptic device, and electronic printing device - Google Patents

Mounting structure for semiconductor element, electrooptic device, and electronic printing device

Info

Publication number
JPH04340928A
JPH04340928A JP11333191A JP11333191A JPH04340928A JP H04340928 A JPH04340928 A JP H04340928A JP 11333191 A JP11333191 A JP 11333191A JP 11333191 A JP11333191 A JP 11333191A JP H04340928 A JPH04340928 A JP H04340928A
Authority
JP
Japan
Prior art keywords
semiconductor element
control circuit
electronic circuit
electrode
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11333191A
Other languages
Japanese (ja)
Inventor
Kenichi Maruyama
丸山 憲一
Seiichi Sakura
桜 聖一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP11333191A priority Critical patent/JPH04340928A/en
Publication of JPH04340928A publication Critical patent/JPH04340928A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable low-cost, high-reliability, and high-density mounting by connecting an input/output terminal and an electronic circuit element by facedown mounting, and connecting a terminal which is lead out of an electronic circuit element and a driving control circuit substrate by an FPC. CONSTITUTION:As for the electronic circuit element 1, the semiconductor element 2, and the driving control circuit board 3 which controls the semiconductor element 2, the electronic circuit element electrode terminal 6 constituted on the electrode substrate of the electronic circuit element 1 and the input/output terminal of the semiconductor element 2 are positioned and the facedown mounting is performed. Then the electronic circuit element electrode terminal 6 which is led out of the electronic circuit element 1 and becomes the input of the semiconductor element and the equal-direction surface of the driving control circuit board electrode 7 of the driving control circuit board 3 are connected by the flexible print circuit(FPC) 5.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、半導体素子を用いた実
装構造に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting structure using semiconductor elements.

【0002】0002

【従来の技術】従来の半導体素子の実装構造の例を図8
に示す。
[Prior Art] Figure 8 shows an example of a conventional semiconductor device mounting structure.
Shown below.

【0003】従来の半導体素子の実装方法は、電子回路
素子1と該電子回路素子1を駆動させるための半導体素
子2と該半導体素子2を制御する駆動制御回路基板3に
おいて、該半導体素子2と該電子回路素子1の接続およ
び該電子回路素子1と該半導体素子2を制御する駆動制
御回路基板3間の配線は金属ワイヤー8によるワイヤー
ボンディング実装が採用されている。
[0003] A conventional semiconductor device mounting method includes an electronic circuit device 1, a semiconductor device 2 for driving the electronic circuit device 1, and a drive control circuit board 3 for controlling the semiconductor device 2. Wire bonding mounting using metal wires 8 is used for the connection of the electronic circuit element 1 and the wiring between the electronic circuit element 1 and the drive control circuit board 3 that controls the semiconductor element 2.

【0004】0004

【発明が解決しようとする課題】しかしながら、上記従
来技術は、各素子および基板との接続をワイヤーボンデ
ィング実装で行なっており、その接続本数は、入力側は
20〜30本、出力側は160〜200本と接続本数が
多い。しかも接続ワイヤー材料としては、線径φ28μ
mの金属線が用いられ接続ピッチは100μm〜200
μmと実装密度が高いため接続強度は、10g前後と非
常に弱い。また半導体素子2と駆動制御回路基板3のワ
イヤー接続においては、実装構造上段差があるため長ワ
イヤーボンディングとなりワイヤー流れやワイヤーショ
ートが発生し歩留り低下の原因となっていた。
[Problems to be Solved by the Invention] However, in the above-mentioned conventional technology, each element and the board are connected by wire bonding, and the number of connections is 20-30 on the input side and 160-30 on the output side. The number of connections is 200, which is a large number. Moreover, the connection wire material has a wire diameter of φ28μ.
m metal wire is used, and the connection pitch is 100 μm to 200 μm.
Since the mounting density is high (μm), the connection strength is very weak at around 10 g. Further, in the wire connection between the semiconductor element 2 and the drive control circuit board 3, since there is a step difference in the mounting structure, long wire bonding occurs, causing wire flow and wire short-circuiting, which causes a decrease in yield.

【0005】そこで、本発明は上記の問題点を解決する
ものでその目的とするところは信頼性、耐久性を向上さ
せた半導体素子の実装構造を提供することである。
SUMMARY OF THE INVENTION The present invention is intended to solve the above-mentioned problems, and an object of the present invention is to provide a mounting structure for semiconductor elements with improved reliability and durability.

【0006】[0006]

【課題を解決するための手段】本発明の半導体素子の実
装構造は、入力端子と出力端子を有する半導体素子と、
電子回路素子の基板上に形成された入力電極端子および
出力電極端子とを有し、前記入力端子と前記入力電極端
子、前記出力端子と前記出力電極端子とが対向し、フェ
ースダウン実装されてなり、前記入力電極端子と前記半
導体素子を制御する駆動制御回路基板に形成された駆動
制御回路電極とをフレキシブルプリントサーキットで電
気的接続したことを特徴とする。
[Means for Solving the Problems] A semiconductor device mounting structure of the present invention includes a semiconductor device having an input terminal and an output terminal,
It has an input electrode terminal and an output electrode terminal formed on a substrate of an electronic circuit element, and the input terminal and the input electrode terminal, and the output terminal and the output electrode terminal face each other and are mounted face-down. , the input electrode terminal and a drive control circuit electrode formed on a drive control circuit board for controlling the semiconductor element are electrically connected by a flexible printed circuit.

【0007】[0007]

【実施例】以下本発明の実施例を図に基づいて具体的に
説明する。
[Embodiments] Hereinafter, embodiments of the present invention will be explained in detail with reference to the drawings.

【0008】[実施例1]図1は、本発明の半導体素子
の実装構造の一実施例を示す断面図である。
[Embodiment 1] FIG. 1 is a sectional view showing an embodiment of a semiconductor element mounting structure of the present invention.

【0009】本実施例は、図1の電子回路素子1と半導
体素子2と該半導体素子2を制御する駆動制御回路基板
3において、まず電子回路素子1の電極基板上に構成さ
れている電子回路素子電極端子6と半導体素子2の入出
力端子の位置を合わせてフェースダウン実装をする。そ
して電子回路素子1より導出された半導体素子の入力と
なりうる電子回路素子電極端子6と駆動制御回路基板3
の駆動制御回路基板電極7の同方向面をフレキシブルプ
リントサーキット(以下FPCという)5で接続したも
のである。
In this embodiment, in the electronic circuit element 1, the semiconductor element 2, and the drive control circuit board 3 for controlling the semiconductor element 2 shown in FIG. Face-down mounting is performed by aligning the element electrode terminals 6 and the input/output terminals of the semiconductor element 2. Then, an electronic circuit element electrode terminal 6 and a drive control circuit board 3 that can serve as an input for a semiconductor element derived from the electronic circuit element 1
The same direction surfaces of the drive control circuit board electrodes 7 are connected by a flexible printed circuit (hereinafter referred to as FPC) 5.

【0010】[実施例2]図2は、本発明の半導体素子
の実装構造の一実施例を示す断面図である。
[Embodiment 2] FIG. 2 is a sectional view showing an embodiment of a semiconductor element mounting structure of the present invention.

【0011】本実施例は、実施例1の変形例で駆動制御
回路基板3が電子回路素子1よりも外形が大きくなった
場合の半導体素子の実装構造を示した断面図である。該
電子回路素子1の電子回路素子電極6上にフェースダウ
ン実装で接続された半導体素子2の入力端子へのFPC
5接続を行うために、該駆動制御回路基板3に接続部を
残して接続のための該FPC5が入る幅で基材を切除し
た貫通用の開口部hを設けて、該開口部hを該FPC5
が貫通して該半導体2の入力端子と該駆動制御回路が接
続されている。尚該駆動制御回路基板3は接着材9で該
電子回路素子1に固定されている。
This embodiment is a cross-sectional view showing a semiconductor element mounting structure in a modification of the first embodiment in which the drive control circuit board 3 has a larger external shape than the electronic circuit element 1. FPC to the input terminal of the semiconductor element 2 connected to the electronic circuit element electrode 6 of the electronic circuit element 1 by face-down mounting.
5. In order to make the connection, a through opening h is provided in the drive control circuit board 3 by cutting out the base material with a width that allows the FPC 5 for connection to be inserted, leaving a connection part, and the opening h is FPC5
The input terminal of the semiconductor 2 and the drive control circuit are connected to each other through the passthrough. The drive control circuit board 3 is fixed to the electronic circuit element 1 with an adhesive 9.

【0012】[実施例3]図3は、本発明の半導体素子
の実装構造の一実施例を示す断面図である。
[Embodiment 3] FIG. 3 is a sectional view showing an embodiment of a semiconductor element mounting structure of the present invention.

【0013】本実施例は、上記実施例2のFPC5の位
置を変えた実施例で、駆動制御回路基板3からの該FP
C5の位置が電子回路素子1より外に位置する該駆動制
御回路基板3から接続されたものである。
This embodiment is an embodiment in which the position of the FPC 5 of the second embodiment is changed, and the FP from the drive control circuit board 3 is
The position C5 is connected from the drive control circuit board 3 located outside the electronic circuit element 1.

【0014】[実施例4]図4は本発明の半導体素子の
実装構造を用いた電子光学装置の一実施例を示す斜視図
であり図5はその断面図である。図5において電子光学
装置は液晶表示素子1aであり該液晶表示素子1aは、
ガラス基板10上にITOで形成した透明電極11が形
成されている。また半導体素子2には出力端子電極12
がピッチ80μmで160バンプまた入力端子電極13
が100μmピッチで25バンプ形成されている。該液
晶表示素子1a上に形成された該透明電極11と該半導
体素子2の入力端子電極13および出力端子電極12の
位置を合わせてフェースダウン実装をする。次に該液晶
表示素子1a上に形成された該半導体素子2の入力とな
りうる該透明電極11と駆動制御回路基板3の駆動制御
回路電極7をポリイミドフィルム基材に35μm銅箔で
電極をパターンニングしたFPC5を異方性導電膜14
で接続した。なお前記実施例に基づく半導体の実装構造
を共通電極側に四箇所、制御電極側に三箇所使用し従来
に比べ表示画素ピッチが0.33mmから0.28mm
と表示密度が高精細になり、400×640画素の液晶
表示装置が実現できた。また、この液晶表示装置を製造
する際に従来発生していたワイヤー切れ等のワイヤーボ
ンディング不良が低減でき高歩留りで製造できた。さら
にこの液晶表示装置をエージング試験にかけ評価を行っ
た結果、冷熱サイクル試験(−20℃30分〜60℃3
0分)400サイクルおよび耐湿試験(60℃90%R
H)400時間後においても正常な動作が確認でき、高
い信頼性と耐久性をもっていることが実証された。
[Embodiment 4] FIG. 4 is a perspective view showing an embodiment of an electro-optical device using the semiconductor element mounting structure of the present invention, and FIG. 5 is a sectional view thereof. In FIG. 5, the electro-optical device is a liquid crystal display element 1a, and the liquid crystal display element 1a is
A transparent electrode 11 made of ITO is formed on a glass substrate 10. The semiconductor element 2 also has an output terminal electrode 12.
There are 160 bumps with a pitch of 80 μm and an input terminal electrode 13.
25 bumps are formed at a pitch of 100 μm. Face-down mounting is performed by aligning the transparent electrode 11 formed on the liquid crystal display element 1a with the input terminal electrode 13 and output terminal electrode 12 of the semiconductor element 2. Next, the transparent electrode 11, which can serve as an input for the semiconductor element 2 formed on the liquid crystal display element 1a, and the drive control circuit electrode 7 of the drive control circuit board 3 are patterned using 35 μm copper foil on a polyimide film base material. The FPC 5 is coated with an anisotropic conductive film 14.
Connected with. In addition, the semiconductor mounting structure based on the above embodiment is used in four places on the common electrode side and three places on the control electrode side, and the display pixel pitch is 0.33 mm to 0.28 mm compared to the conventional one.
The display density became high definition, and a liquid crystal display device with 400 x 640 pixels was realized. Furthermore, wire bonding defects such as wire breakage, which conventionally occur when manufacturing this liquid crystal display device, can be reduced, and the device can be manufactured at a high yield. Furthermore, we evaluated this liquid crystal display device by subjecting it to an aging test.
0 minutes) 400 cycles and humidity test (60℃90%R
H) Normal operation was confirmed even after 400 hours, demonstrating high reliability and durability.

【0015】[実施例5]図6は本発明の半導体素子の
実装構造を用いた電子印字装置の一実施例を示す斜視図
であり図7はその断面図である。同図7において電子印
字装置はサーマルヘッド素子1bであり該サーマルヘッ
ド素子1bは、セラミック基板15上にAuで薄膜導体
電極16が形成されている。また半導体素子2には出力
端子電極12がピッチ100μmで64バンプまた入力
端子電極13が250μmピッチで10バンプ形成され
ている。該サーマルヘッド素子上1bに形成された該薄
膜導体電極16と該半導体素子2の入力端子電極13お
よび出力端子電極12の位置を合わせてフェースダウン
実装をする。次にサーマルヘッド素子1b上に形成され
た該半導体素子2の入力となりうる該薄膜導体電極16
と駆動制御回路基板3の駆動制御回路電極7間をポリイ
ミドフィルム基材に35μm銅箔で電極をパターンニン
グ形成したFPC5を異方性導電膜14で接続した。な
お前記実施例に基づく半導体の実装構造を32箇所使用
し2048ドットの発熱抵抗体17を一列にヒートシン
ク18上に並べることにより、高精細な8ドット/mm
、かつコンパクトな実装が可能となり、B4判のサーマ
ルヘッド印字装置が実現できた。
[Embodiment 5] FIG. 6 is a perspective view showing an embodiment of an electronic printing device using the semiconductor element mounting structure of the present invention, and FIG. 7 is a sectional view thereof. In FIG. 7, the electronic printing device is a thermal head element 1b, and the thermal head element 1b has a thin film conductor electrode 16 formed of Au on a ceramic substrate 15. Further, on the semiconductor element 2, output terminal electrodes 12 are formed with 64 bumps at a pitch of 100 μm, and input terminal electrodes 13 are formed with 10 bumps at a pitch of 250 μm. Face-down mounting is performed by aligning the thin film conductor electrode 16 formed on the thermal head element 1b with the input terminal electrode 13 and output terminal electrode 12 of the semiconductor element 2. Next, the thin film conductor electrode 16, which can be an input to the semiconductor element 2, is formed on the thermal head element 1b.
and the drive control circuit electrodes 7 of the drive control circuit board 3 were connected to an FPC 5 in which electrodes were patterned with 35 μm copper foil on a polyimide film base material with an anisotropic conductive film 14 . By using the semiconductor mounting structure based on the above embodiment at 32 locations and arranging 2048 dot heating resistors 17 in a row on the heat sink 18, high-definition 8 dots/mm can be achieved.
, and compact implementation was possible, making it possible to realize a B4 size thermal head printing device.

【0016】[0016]

【発明の効果】以上説明したように、本発明は半導体素
子の入出力端子と電子回路素子の接続をフェースダウン
実装で行い、かつ該電子回路素子から導出した端子と該
半導体素子を制御する駆動制御回路基板間の配線をFP
Cで接続したことにより安価で信頼性が高く、高密度実
装が可能なコンパクトな実装構造の電子光学装置および
電子印字装置を提供するという効果を有している。
As explained above, the present invention connects the input/output terminals of a semiconductor element and an electronic circuit element by face-down mounting, and connects the input/output terminals of a semiconductor element to a drive for controlling the semiconductor element. FP wiring between control circuit boards
The C connection has the effect of providing an electronic optical device and an electronic printing device that are inexpensive, highly reliable, and have a compact packaging structure that allows high-density packaging.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の半導体実装構造の一実施例を示す断面
図である。
FIG. 1 is a sectional view showing an embodiment of a semiconductor packaging structure of the present invention.

【図2】本発明の半導体実装構造の一実施例を示す断面
図である。
FIG. 2 is a sectional view showing an embodiment of the semiconductor packaging structure of the present invention.

【図3】本発明の半導体実装構造の一実施例を示す断面
図である。
FIG. 3 is a sectional view showing an embodiment of the semiconductor packaging structure of the present invention.

【図4】本発明の半導体実装構造を用いた電子光学装置
の一実施例を示す斜視図である。
FIG. 4 is a perspective view showing an embodiment of an electro-optical device using the semiconductor mounting structure of the present invention.

【図5】本発明の半導体実装構造を用いた電子光学装置
の一実施例を示す断面図である。
FIG. 5 is a sectional view showing an embodiment of an electro-optical device using the semiconductor packaging structure of the present invention.

【図6】本発明の半導体実装構造を用いた電子印字装置
の一実施例を示す斜視図である。
FIG. 6 is a perspective view showing an embodiment of an electronic printing device using the semiconductor packaging structure of the present invention.

【図7】本発明の半導体実装構造を用いた電子印字装置
の一実施例を示す断面図である。
FIG. 7 is a sectional view showing an embodiment of an electronic printing device using the semiconductor packaging structure of the present invention.

【図8】従来の半導体実装構造を示す断面図である。FIG. 8 is a cross-sectional view showing a conventional semiconductor packaging structure.

【符号の説明】[Explanation of symbols]

1.電子回路素子 1a.液晶表示素子 1b.サーマルヘッド素子 2.半導体素子 3.駆動制御回路基板 4.補強板 5.フレキシブルプリントサーキット 6.電子回路素子電極端子 7.駆動制御回路電極 8.金属ワイヤー 9.接着剤 10.ガラス基板 11.透明電極 12.出力端子電極 13.入力端子電極 14.異方性導電膜(ACF) 15.セラミック基板 16.薄膜導体電極 17.発熱抵抗体 18.ヒートシンク h.開口部 1. electronic circuit element 1a. liquid crystal display element 1b. thermal head element 2. semiconductor element 3. Drive control circuit board 4. Reinforcement plate 5. flexible printed circuit 6. Electronic circuit element electrode terminal 7. Drive control circuit electrode 8. metal wire 9. glue 10. glass substrate 11. transparent electrode 12. Output terminal electrode 13. Input terminal electrode 14. Anisotropic conductive film (ACF) 15. ceramic substrate 16. thin film conductor electrode 17. heating resistor 18. heat sink h. Aperture

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】入力端子と出力端子を有する半導体素子と
、電子回路素子の基板上に形成された入力電極端子およ
び出力電極端子とを有し、前記入力端子と前記入力電極
端子、前記出力端子と前記出力電極端子とが対向し、フ
ェースダウン実装されてなり、前記入力電極端子と前記
半導体素子を制御する駆動制御回路基板に形成された駆
動制御回路電極とをフレキシブルプリントサーキットで
電気的接続したことを特徴とする半導体素子の実装構造
1. A semiconductor element having an input terminal and an output terminal, and an input electrode terminal and an output electrode terminal formed on a substrate of an electronic circuit element, the input terminal, the input electrode terminal, and the output terminal. and the output electrode terminal face each other and are mounted face-down, and the input electrode terminal and a drive control circuit electrode formed on a drive control circuit board for controlling the semiconductor element are electrically connected by a flexible printed circuit. A semiconductor element mounting structure characterized by:
【請求項2】請求項1記載の半導体素子の実装構造を用
いたことを特徴とする電子光学装置。
2. An electro-optical device characterized by using the semiconductor element mounting structure according to claim 1.
【請求項3】請求項1記載の半導体素子の実装構造を用
いたことを特徴とする電子印字装置。
3. An electronic printing device characterized by using the semiconductor element mounting structure according to claim 1.
JP11333191A 1991-05-17 1991-05-17 Mounting structure for semiconductor element, electrooptic device, and electronic printing device Pending JPH04340928A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11333191A JPH04340928A (en) 1991-05-17 1991-05-17 Mounting structure for semiconductor element, electrooptic device, and electronic printing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11333191A JPH04340928A (en) 1991-05-17 1991-05-17 Mounting structure for semiconductor element, electrooptic device, and electronic printing device

Publications (1)

Publication Number Publication Date
JPH04340928A true JPH04340928A (en) 1992-11-27

Family

ID=14609534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11333191A Pending JPH04340928A (en) 1991-05-17 1991-05-17 Mounting structure for semiconductor element, electrooptic device, and electronic printing device

Country Status (1)

Country Link
JP (1) JPH04340928A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5726726A (en) * 1995-11-29 1998-03-10 Nec Corporation Liquid crystal display and method of producing the same
JP2001296542A (en) * 2000-04-11 2001-10-26 Citizen Watch Co Ltd Liquid crystal display device
JP2009069610A (en) * 2007-09-14 2009-04-02 Bridgestone Corp Information display panel

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5726726A (en) * 1995-11-29 1998-03-10 Nec Corporation Liquid crystal display and method of producing the same
JP2001296542A (en) * 2000-04-11 2001-10-26 Citizen Watch Co Ltd Liquid crystal display device
JP2009069610A (en) * 2007-09-14 2009-04-02 Bridgestone Corp Information display panel

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