JPH05501939A - Multilayer lead frame for integrated circuit packages - Google Patents

Multilayer lead frame for integrated circuit packages

Info

Publication number
JPH05501939A
JPH05501939A JP2515535A JP51553590A JPH05501939A JP H05501939 A JPH05501939 A JP H05501939A JP 2515535 A JP2515535 A JP 2515535A JP 51553590 A JP51553590 A JP 51553590A JP H05501939 A JPH05501939 A JP H05501939A
Authority
JP
Japan
Prior art keywords
lead frame
package
metal foil
metal
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2515535A
Other languages
Japanese (ja)
Inventor
ブラデン，ジェフリー，エス．
Original Assignee
オリン コーポレイション
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by オリン コーポレイション filed Critical オリン コーポレイション
Publication of JPH05501939A publication Critical patent/JPH05501939A/en
Pending legal-status Critical Current

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Classifications

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    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4825—Connection or disconnection of other leads to or from flat leads, e.g. wires, bumps, other flat leads
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/207—Diameter ranges
    • H01L2924/20752—Diameter ranges larger or equal to 20 microns less than 30 microns
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Abstract

(57)【要約】本公報は電子出願前の出願データであるため要約のデータは記録されません。 (57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 集積回路パッケージ用多層リードフレーム本発明は電子パッケージにおいて使用 するための多層リードフレームに係り、とりわけ電子デバイスに対するワイヤボ ンディングのための可撓性多層部分及び外部回路に電気的に相互接続される剛性 金属部分を有する複合リードフレームに関するものである。[Detailed description of the invention] Multilayer lead frame for integrated circuit packages The invention is used in electronic packages It is related to multilayer lead frames for wire bonding, especially for electronic devices. flexible multilayer sections for bonding and rigid electrical interconnection to external circuitry The present invention relates to a composite lead frame having metal parts.

一般に、Ｓｉ系半導体回路のような集積回路デバイスは電子パッケージと呼ばれ るハウジング内に収納される。Generally, integrated circuit devices such as Si-based semiconductor circuits are called electronic packages. It is housed in a housing.

電子パッケージは、集積回路か収容されるキャビティを画成するベースおよびカ バー構成要素を有する。代替的に、電子デバイスは重合体樹脂本体内にモールデ ィングされ得る。An electronic package includes a base and a cover that define a cavity in which an integrated circuit is housed. It has a bar component. Alternatively, the electronic device may be molded within a polymeric resin body. can be

パッケージとかかわりなく、電子デバイスを外部回路に電気的に相互接続する手 段が必要とされる。伝統的に、電気的相互接続はリードフレームの形式を取る。A method for electrically interconnecting electronic devices to external circuitry, regardless of packaging. steps are required. Traditionally, electrical interconnections take the form of lead frames.

リードフレームはＣｕ合金またはＦｅ−Ｎｉ合金のごとき導電性材料から形成さ れる。リードフレームは電子デバイスかマウントされる中心配置開口を画成する 複数のリードフィンガの型鍛造またはエツチングによって形成される。The lead frame is formed from a conductive material such as Cu alloy or Fe-Ni alloy. It will be done. The lead frame defines a centrally located aperture in which the electronic device is mounted. Formed by die forging or etching of multiple lead fingers.

前記開口と反対側のリードフィンガの端は外部回路との電気的相互接続のために パッケージベースの向こう側へ延びる。リードフレームは、ベース構成要素およ びカバー構成要素に接続されるか、または重合体樹脂内にモールディングされる 。The end of the lead finger opposite the opening is for electrical interconnection with external circuitry. Extends beyond the package base. The lead frame is the base component and connected to a cover component or molded within a polymeric resin. .

細いリード線は電子デバイスのフェース上の電気的に活性の接合位置に、電気的 に内リートフィンガを相互接続する。これらリード線は、直径において約０．０ ２５ｍｍ（０，００１インチ）であり、導電性材料で形成される。通常、ＡＩ、 Ａｇ、Ｃｕまたはこれら金属の合金か使用される。リート線は熱圧接接合または 熱超音波接合によって内リードフィンガおよび半導体デバイスのフェースに接続 される。Thin leads connect electrically to electrically active junction locations on the face of electronic devices. interconnecting the inner leet fingers. These leads have a diameter of approximately 0.0 It is 25 mm (0,001 inch) and made of conductive material. Usually, AI, Ag, Cu or alloys of these metals are used. Riet wires are bonded by thermo-compression or Connected to inner lead fingers and face of semiconductor device by thermo-ultrasonic bonding be done.

ワイヤ接合部を有する従来のリードフレームは、外部環境に対する限定された個 数の接続部を必要とする電子デバイスにとっては満足される。例えば、ＤＩＰデ ュアル・イン・ラインパッケージのリードフレームの場合は６４のリード（片側 につき３２個）、そしてカド形り一ドフレームの場合は約１３０のリードか普通 である。集積回路デバイスが複雑になるにつれて、必要とされる接合部（ボンド ）の数が増す。接合位置は互いにより接近しており、問題に遭遇する。Traditional lead frames with wire joints have limited isolation to the external environment. This is satisfactory for electronic devices requiring a large number of connections. For example, For dual-in-line package lead frames, there are 64 leads (one side 32 pieces per frame), and about 130 leads or normal in the case of a corner-shaped frame. It is. As integrated circuit devices become more complex, the number of junctions (bonds) required increases. ) increases. As the joining locations become closer together, problems are encountered.

従来のリードフレームは約０．１３ｍｍ〜約０．５ｍｍ（０，００５〜００２０ インチ）の厚さである。型鍛造およびエツチングを考慮することによって、リー トフィンガの輻およびリード間の間隔は共に、リードフレームの厚さにほぼ等し い。通常、パッケージの全寸法は規格化されているから、リードフィンガのため に使用可能なスペースは制限される。パッケージ寸法を大きくすることは規格化 と重量の観点から望ましくない。Conventional lead frames are approximately 0.13 mm to approximately 0.5 mm (0,005 to 0,020 inches) thick. By considering die forging and etching, lead Both the finger radius and the lead-to-lead spacing are approximately equal to the leadframe thickness. stomach. Typically, all dimensions of the package are standardized, so lead fingers The space available for this is limited. Increasing package dimensions is standardized and undesirable from a weight standpoint.

リード密度に関するもう一つの制限はリード線の可撓性である。リード線の撓み は一つの問題である。小径の線は組立ておよび取扱いの間に動く可能性がある。Another limitation on lead density is lead flexibility. Deflection of lead wire is one problem. Small diameter wires can move during assembly and handling.

もしも２本のリード線か接触するならば、電気的短絡が生じ得る。If the two leads touch, an electrical short can occur.

リート密度を増すために提案されたー解決方法は多層リートである。この概念は 、当初、多層セラミックパッケージに受け入れられた。該パッケージは、複数の セラミック層であってそれらの間に被覆金属回路図形を配置されたものを有する 。被覆金属面を電気的に相互接続するため、導電路か１つ以上のセラミック層を 貫いて形成される。イブリハム他の米国特許第４３２０４３８号およびシュロー ダ−他の米国特許第４５１３３５５号は、リード密度かリードの千鳥配列によっ て増される多層セラミックパッケージを開示した。リード線は異なる垂直面上の 複数の金属被覆位置に接続される。リード線密度はワイヤ接合短絡の可能性を増 すことなしに増大される。A proposed solution to increase REIT density is multilayer REITs. This concept is , initially accepted into multilayer ceramic packaging. The package contains multiple having ceramic layers with coated metal circuitry arranged between them . To electrically interconnect coated metal surfaces, conductive tracks or one or more ceramic layers can be used. formed through. U.S. Pat. No. 4,320,438 to Ibriham et al. and Schroe U.S. Pat. No. 4,513,355 to Dar et al. A multilayer ceramic package is disclosed. The leads are on different vertical planes. Connected to multiple metallization locations. Lead wire density increases the likelihood of wire bond shorts. It is increased without any problem.

さらに多層技術は従来のリードフレームにも適用されている。例えば、ダニエル ズ他の米国特許第４６８０６１３号は、誘電層によってリードフレームから分離 されたグラウンド面を有するプラスチックＤＩＰパッケージを開示している。１ つのリードが２つの導電層を電気的に相互接続するグラウンドプレートにダウン セットされ、かつスポット溶接される。リード密度を増さないか、グラウンド面 をリードフレームに結合することは誘導抵抗を最小化する。結合はデバイスかよ り高い速度で動作することを可能にする。Furthermore, multilayer technology has also been applied to conventional lead frames. For example, Daniel No. 4,680,613 to Z et al. separates the lead frame from the lead frame by a dielectric layer. A plastic DIP package is disclosed having a ground plane. 1 Two leads down to the ground plate electrically interconnecting the two conductive layers set and spot welded. Do not increase lead density or ground plane Bonding the lead frame to the lead frame minimizes induced resistance. Is the connection a device? This allows the system to operate at higher speeds.

モイヤー他の米国特許第４８０１７６５号は、誘電材料によって分離された自己 支持型のリードフレームを開示している。好ましくは、上下リードか交互に組合 わされる、すなわち上リードはより高い面においてではあるが下リード間の空間 部に位置する。U.S. Pat. No. 4,801,765 to Moyer et al. A supported lead frame is disclosed. Preferably, upper and lower leads are combined alternately. crossed, i.e. the upper lead is on a higher plane but in the space between the lower leads. located in the department.

「インテル多層成形高性能ＰＯＥＰ紹介」と題されたインテルのパンフレットに 掲載されたマリク他による「多層成形プラスチックパッケージ」と題する一輪車 は、二金属層リードフレームを開示している。第１金属層はグラウンド面である 。電子デバイスはこの層に直接に接続される。第２金属層はパワー面である。第 ３層すなわち最上層は従来のリードフレームである。３つの金属層は誘電接着剤 によって電気的に絶縁される。リード線は電子デバイスから３つの金属層の各々 へ延びる。リードフレームはパワー・ブラウンドル・プインダクタンスを減少さ せ、かつシングルリードの容量を減少させる。電子デバイスは金属グラウンド面 上に設けられるから、熱の消散が改善されて電子デバイスの動作温度を減じる。In Intel's brochure titled "Introduction to Intel's multilayer molded high-performance POEP" A unicycle titled “Multilayer Molded Plastic Package” published by Malik et al. discloses a two-metal layer leadframe. The first metal layer is the ground plane . Electronic devices are connected directly to this layer. The second metal layer is the power plane. No. The third or top layer is a conventional lead frame. The three metal layers are dielectric adhesive electrically isolated by Lead wires run from the electronic device to each of the three metal layers extends to The lead frame reduces power brown inductance. and reduce single lead capacity. Electronic devices have a metal ground plane The heat dissipation is improved and the operating temperature of the electronic device is reduced.

多層テープ自動接合（ＴＡＢ）リードも開示されている。典型的には銅である複 数の薄い金属箔層が誘電層によって支持される。好適な誘電層はデュポン社によ って製造されるキャブトンのごときポリイミドである。誘電層はまた導電層を電 気的に絶縁する。ネザウツドの米国特許第３６８４８１８号は、セラミックパッ ケージ内において複数の集積回路ダイを電気的に相互接続するための二金属層ビ ームリードを開示する。ホジソン他の米国特許第４８１４８５５号は多層ＴＡＢ 構造を形成する一手段を開示する。ホンディングボールかビームリードの端に形 成される。異なる層の整合されたホールか電気的相互接続を達成するためにサー モードと一緒に接続される。A multilayer tape automated bonding (TAB) lead is also disclosed. Composite material, typically copper A number of thin metal foil layers are supported by a dielectric layer. A suitable dielectric layer is provided by DuPont. It is a polyimide such as Cabton, which is manufactured by The dielectric layer also connects the conductive layer with electricity. Insulate yourself. U.S. Pat. No. 3,684,818 to Nezaud describes the Two-metal layer vias for electrically interconnecting multiple integrated circuit die within a cage. Disclose the system lead. U.S. Pat. No. 4,814,855 to Hodgson et al. One means of forming the structure is disclosed. Shaped at the end of a honding ball or beam lead will be accomplished. Matched holes in different layers or service to achieve electrical interconnection. Connected together with mode.

多層リードフレームはり一ト密度を増し、より良い電気的性能を提供するか、先 行技術の弱点のすべてが解決されるわけてはない。もし従来のリードフレームが 多層構造の一部分を形成するならば、型鍛造とエツチングの弱点が残る。最小リ ード幅とリード間隔は、共にリードの厚さに概ね等しい。箔リードは、組立てお よび取扱い中に損傷され易い。箔リードかポリイミド支持層の向こう側へ延びる とき、リードの変形と平坦性の喪失が生じ得る。Multilayer leadframe beams increase density and provide better electrical performance or Not all of the weaknesses in the technology will be resolved. If the traditional lead frame If forming part of a multilayer structure, the weaknesses of die forging and etching remain. Minimum re Both the lead width and the lead spacing are approximately equal to the lead thickness. Foil leads are assembled and and easily damaged during handling. Extends beyond foil leads or polyimide support layer Deformation and loss of flatness of the leads can occur.

従って、本発明の目的は先行技術の弱点を持たない多層リードフレームを提供す ることである。本発明の一特徴は、多層リードフレームが剛性金属リードフレー ム部分に接続されたＴＡＢ内部分を有する複合体であることである。本発明のさ らなる一利点は、薄箔ＴＡＢリードが標準リードフレームによって得られるそれ より微細な大きさに食刻され得ることである。本発明のもう一つの利点は、多層 ＴＡＢ構造がインピーダンスおよび信号りロストークを減じてより速い動作速度 を可能にすることである。本発明の他の利点は、剛性の大きな外側金属リードフ レームが多層構造体の取扱いを容易にすることである。本発明のさらに他の利点 は、箔リードかポリイミド支持層によって支持されることである。箔リードが前 記支持層の向こう側へ延びるとき、懸念されるリードの変形が排除される。It is therefore an object of the present invention to provide a multilayer lead frame that does not have the weaknesses of the prior art. Is Rukoto. One feature of the invention is that the multilayer lead frame is a rigid metal lead frame. It is a complex having an internal part of TAB connected to a part of the TAB. The features of this invention One advantage is that thin foil TAB leads are superior to those obtained with standard lead frames. It can be etched to a finer size. Another advantage of the invention is that the multi-layer TAB structure reduces impedance and signal losstalk for faster operating speeds The goal is to make it possible. Another advantage of the present invention is that the outer metal lead leaf has greater stiffness. The frame facilitates handling of the multilayer structure. Still other advantages of the invention is supported by either foil leads or a polyimide support layer. Foil lead in front Concerned deformation of the leads as they extend beyond the support layer is eliminated.

本発明に従って複合リードフレームか提供される。前記リードフレームは中心に 位置される開口のまわりに片持ちの態様で延びる複数のリードフィンガを有する 剛性の大きな金属部分を有する。この第１の開口内に可撓多層部分か位置される 。前記多層部分は少なくとも１つの誘電層によって支持された少なくとも１つの 金属箔層を有する。金属箔層の少なくとも１つは、複数の回路トレースにパター ン化される。剛性の大きな金属リードフレーム部分のリードフィンガに各金属箔 回路トレースを個別に電気的に相互接続する手段か設けられる。A composite lead frame is provided in accordance with the present invention. The lead frame is centered having a plurality of lead fingers extending in a cantilevered manner around an aperture located therein; It has a highly rigid metal part. A flexible multilayer portion is positioned within this first opening. . The multilayer portion includes at least one layer supported by at least one dielectric layer. It has a metal foil layer. At least one of the metal foil layers is patterned into a plurality of circuit traces. will be converted into an online version. Each metal foil is attached to the lead fingers of the highly rigid metal lead frame. A means is provided for individually electrically interconnecting the circuit traces.

以上、説明された諸口的、諸特徴および諸利点は、以下に記す明細書と、同一要 素か同一参照番号を付与されそしてプライムまたは複数プライム付きの番号か同 様機能を提供する同様要素を示している諸図面とからより明瞭になるだろう。The various features and advantages described above are the same as those in the specification below. prime or multiple primed numbers or the same reference number; It will become clearer from the drawings which show similar elements providing similar functions.

第１図は先行技術において知られるごときカド・リードフレームを上面図を以て 図解する。Figure 1 shows a quad lead frame as known in the prior art in top view. Illustrate.

第２図は本発明の複合リードフレームの一部分を形成する剛性の大きな金属リー ドフレームを上面図を以て図解する。FIG. 2 shows a highly rigid metal lead that forms part of the composite lead frame of the present invention. The deframe is illustrated with a top view.

第３図は本発明の複合リードフレームの一構成要素を形成する多層可撓回路を上 面図を以て図解する。FIG. 3 shows a multilayer flexible circuit forming one component of the composite lead frame of the present invention. Illustrated with a side view.

第４図は本発明の複合リードフレームの可撓多層部分を横断面図を以て図示する 。FIG. 4 illustrates, in cross-section, a flexible multilayer portion of the composite lead frame of the present invention. .

第５図は集積回路と本発明の複合リードフレームとの間の電気的相互接続を横断 面図を以て図解する。FIG. 5 traverses the electrical interconnections between the integrated circuit and the composite leadframe of the present invention. Illustrated with a side view.

第６図は本発明の複合リードフレームに対する集積回路の電気的相互接続の第２ の実施例を横断面図を以て図解する。FIG. 6 shows a second diagram of the electrical interconnection of an integrated circuit to a composite lead frame of the present invention. An embodiment of the invention will be illustrated with a cross-sectional view.

第７図は本発明のさらに他の一実施例における複合リードフレームに対する集積 回路の電気的相互接続を横断面図を以て図解する。FIG. 7 shows the integration for a composite lead frame in yet another embodiment of the present invention. 1 illustrates the electrical interconnections of a circuit with a cross-sectional view; FIG.

第８図は第７図の実施例を上面図を以て図解する。FIG. 8 illustrates the embodiment of FIG. 7 in a top view.

第９図は金属電子パッケージ内への本発明の複合り一トフレームの組込みを横断 面図を以て図解する。FIG. 9 illustrates the incorporation of the composite frame of the present invention into a metal electronic package. Illustrated with a side view.

第１図は先行技術において知られているごときカド・リードフレーム１０を上面 図で図示する。リードフレーム■０は、銅または銅基合金のような導電材料から 形成される。成る用途のためには、４２合金（公称組成４１％Ｎｉ、残部Ｆｅ） のごときＦｅ−Ｎｉ合金またはコバール（Ｆｅ−Ｎｉ−Ｃｏ合金の商用者）か低 熱膨張係数を利用するために使用される。通常、リードフレームＩＯは約０．２ ５ｍｍ（０，０１０インチ）のオーダーの厚さである。しかし、約０．１３ｍｍ （０，００５インチ）〜約０．５ｍｍ（０，０２０インチ）のリードフレーム厚 さも使用される。FIG. 1 shows a top view of a quad lead frame 10 as known in the prior art. Illustrated in the figure. Lead frame ■0 is made of conductive material such as copper or copper-based alloy It is formed. 42 alloy (nominal composition 41% Ni, balance Fe) Fe-Ni alloys such as Kovar (a commercial manufacturer of Fe-Ni-Co alloys) or low Used to take advantage of the coefficient of thermal expansion. Typically lead frame IO is about 0.2 It is on the order of 5 mm (0,010 inches) thick. However, about 0.13mm (0,005 inch) to approximately 0.5 mm (0,020 inch) lead frame thickness Also used.

リードフレームＩＯは、一般にリート１４を支持し、かつ取扱いの間における損 傷からリードを保護するフレーム１２を有する。フレーム１２は、リートの自動 化整合を容易にするためにスプロケット穴のような指示手段１６を有する。リー ド１４は、電子デバイスに対するワイヤ接合を容易にするためにアルミニウムの ごとき第２材料によって被覆される内リート部分Ｉ８を存する。リ−ト１４の反 対端は外リード２０を形成する。パッケージか組立てられたとき、フレーム１２ はリードフレーム１０から切断され、前記外リードは外部回路に電気的に相互接 続される。The lead frame IO generally supports the REIT 14 and protects it from losses during handling. It has a frame 12 that protects the leads from scratches. Frame 12 is REET's automatic Indicators 16, such as sprocket holes, are included to facilitate alignment. Lee The board 14 is made of aluminum to facilitate wire bonding to electronic devices. There is an inner reat portion I8 coated with a second material such as the like. Reit 14 anti The opposite end forms an outer lead 20. When the package is assembled, the frame 12 are cut from the lead frame 10, and the outer leads are electrically interconnected to an external circuit. Continued.

全てのカドリードフレームに組入れられるとは限らないか、多くはリードフレー ム１０と同じ金属板で形成された付設台バッド２２を有する。台パッド２２は、 バット支え２４によって支持される。これら支え２４はパッケージ組立ての間に 随意的に切断され得る。Ｓｉ系半導体デバイス（図示せず）のごとき電子回路か 、当業者に知られている任意の従来の付設合手段によって台バッド２２に設けら れる。もしも、リードフレーム１０か比較的低い熱膨張係数を有する材料で形成 されるならば、金シリコンまたは金錫のごとき共晶鑞付設合がしばしば使用され る。もしも、リードフレームか銅または比較的高い熱膨張係数を有する鋼基合金 であるならば、銀含有エポキシ接着剤または鉛錫合金鑞のごとき追従性を有する ダイアタッチか使用される。It may not be included in all quad lead frames, and many are It has an attachment base pad 22 formed of the same metal plate as the frame 10. The base pad 22 is It is supported by a butt support 24. These supports 24 are Can be optionally truncated. Is it an electronic circuit such as a Si-based semiconductor device (not shown)? , attached to the platform pad 22 by any conventional attaching means known to those skilled in the art. It will be done. If the lead frame 10 is made of a material with a relatively low coefficient of thermal expansion, If so, eutectic brazing joints such as gold-silicon or gold-tin are often used. Ru. If the lead frame is made of copper or a steel-based alloy with a relatively high coefficient of thermal expansion, If so, it has conformability like silver-containing epoxy adhesive or lead-tin alloy solder. Die attach or used.

内リート１４は接合ワイヤ（以下、ポンドワイヤと称する）の長さを最小化する ために電子デバイスにきわめて接近している。過度に長いポンドワイヤは、隣接 ワイヤか電気的に短絡する可能性を増し、また電子デバイスの動作速度を減じる 。前述のごとく、型鍛造およびエツチングを考慮を入れることによって、第１図 において「Ｗ」で表される低リード１４の幅は、リードフレームの厚さのオーダ ー、すなわち一般に概ね０．２５ｍｍ（０，０１０インチ）のオーダーの幅でな くてはならない。同様に、第１図において「Ｓ」て表されるリード間隔は、やは りリードフレームの厚さのオーダー、すなわち０．２５ｍｍ（０，０１０インチ ）のオーダーである。The inner ream 14 minimizes the length of the bonding wire (hereinafter referred to as pound wire). Because of this, they are in close proximity to electronic devices. Excessively long pound wires are Increases the likelihood of wire or electrical shorts and reduces the operating speed of electronic devices . As mentioned above, by taking die forging and etching into consideration, The width of the low lead 14, denoted "W" in , is on the order of the thickness of the lead frame. -, i.e. generally on the order of 0.25 mm (0.010 inch) wide. Must not be too expensive. Similarly, the lead spacing, denoted "S" in Figure 1, is on the order of lead frame thickness, i.e. 0.25 mm (0,010 inch). ) is the order.

従って、一つの内リードの中心から次の内リードの中心までのピッチ即ち距離は ０．５ｍｍ（０，０２０インチ）である。これは電子デバイスの至近に配置され 得るり一トの個数を制限する。例えば、１０．１６ｍｍＸ１０．１６ｍｍ（０， ４ｘＯ，４インチ）の周辺寸法を有する電子デバイスは、一般に単に１辺につき 約２０個のリードすなわち１つのカド・パッケージのための８０個のリードを支 持する。Therefore, the pitch or distance from the center of one inner lead to the center of the next inner lead is It is 0.5 mm (0,020 inch). This is placed in close proximity to electronic devices. Limit the number of pieces you get. For example, 10.16mmX10.16mm (0, Electronic devices with a peripheral dimension of 4xO, 4 inches) typically have only a Supports approximately 20 leads or 80 leads for one quad package. hold

電子デバイスはフレーム１２内の区域の一部分を占めるに過ぎない。利用可能な 区域の相当な部分が無駄にされる。このことは、外リード２０に関して認められ 得る。The electronic device occupies only a portion of the area within frame 12. available A significant portion of the area is wasted. This is recognized regarding the outer lead 20. obtain.

外リート２０は、内リート１４と同じ輻「Ｗ」を有し得る。リード間における利 用可能な空間は、フレーム１２の各内側縁２６の長さがダイアタッチバットの縁 の長さより長いから、著しく増大される。Outer reet 20 may have the same radius "W" as inner reet 14. Interest between leads The available space is such that the length of each inner edge 26 of the frame 12 is the edge of the die attach butt. Since it is longer than the length of , it is significantly increased.

本発明によって、発明者はフレーム１２内の区域を完全に利用し、かつ著しくよ り高いリート数密度を達成する一手段を提供した。これはフレームおよび外リー ドを形成する剛性の大きな金属リードフレーム部分と、内リートおよびグラウン ド面並びにパワー面を形成する可撓多層部分とを存する複合リードフレームの使 用を通じて達成される。With the present invention, the inventors have been able to fully utilize the area within frame 12 and significantly improve This provided a means to achieve a higher REIT number density. This includes the frame and outer The rigid metal lead frame part that forms the lead, the inner lead and the ground The use of a composite lead frame with flexible multilayer sections forming the power side as well as the power side. achieved through use.

第２図は、本発明の複合リードフレームの剛性の大きな金属り一トフレーム部分 ３０を図解する。剛性の大きな金属部分３０は、フレーム１２およびリート川４ ′を有する。スプロケット穴のごとき指示手段１６が、整合を容易にするために 随意的に設けられる。リートＩ　４　’は複合リードフレームの外リード部分の みを有する。リ−ｌ’　＋　４°は電子デバイスの至近にあることを要しない。Figure 2 shows the highly rigid metal frame part of the composite lead frame of the present invention. Illustrate 30. The highly rigid metal part 30 is connected to the frame 12 and the Riet river 4. ′. Indicating means 16, such as sprocket holes, are provided to facilitate alignment. Optionally provided. REIT I 4' is the outer lead part of the composite lead frame. It has a unique character. Lee-l'+4° does not need to be in close proximity to the electronic device.

リード＋４’　か、たとえ第１図のり一ド１４と同一幅と間隔の制約下にあると しても、リードは中心に位置された付設台バットに近接して留まることを必要と しない。Lead +4', even if it is under the same width and spacing constraints as the glue lead 14 in Figure 1. However, the lead must remain close to the centrally located butt. do not.

リード間隔はフレーム１２の内側縁２６によって限定される。Lead spacing is limited by the inner edge 26 of frame 12.

リード１４“は、第１図に図解された先行技術リードフレーム１０のり一ド１４ より著しく短い。合成リードフレームの外リート部分のみか剛性の大きな金属部 分３０から製造される。リード１４′の自由端は、仮想破線３４によって示され る第１の開口３２を画成する。開口３２の周縁は第３図において図解されるごと き複合り−１・フレームの可撓多層部分の寸法を画成する。The leads 14'' are connected to the adhesives 14 of the prior art lead frame 10 illustrated in FIG. significantly shorter. Only the outer lead part of a synthetic lead frame or a highly rigid metal part Manufactured from 30 minutes. The free end of lead 14' is indicated by phantom dashed line 34. A first opening 32 is defined therein. The periphery of the opening 32 is as illustrated in FIG. 1. Define the dimensions of the flexible multilayer portion of the frame.

本発明の複合リードフレームの可撓多層部分４０は、第３図において上図面とし て示され、第４図において断面図として示される。仮想線３４は、第２図に図解 されるごとき剛性の大きな金属フレーム部分３０の開口３２内における可撓多層 部分４０の位置決めを確認するために示される。可撓多層部分４０は、ポリイミ ドのような誘電層によって支持される少なくとも１個の金属箔層４２を有する。The flexible multilayer portion 40 of the composite lead frame of the present invention is shown in the upper drawing in FIG. and is shown in cross-section in FIG. The imaginary line 34 is illustrated in FIG. The flexible multi-layer structure within the opening 32 of the rigid metal frame section 30 such as Shown to confirm positioning of portion 40. The flexible multilayer portion 40 is made of polyimide. It has at least one metal foil layer 42 supported by a dielectric layer such as a metal foil.

好ましくは、誘電層によって支持され、かつ互いに電気的に絶縁された複数の金 属箔層か使用される。−好的実施例においては、多層部分４０は第１の金属箔層 ４２、第２の金属箔層４４および第３の金属箔層４６を含む。Preferably a plurality of gold layers supported by a dielectric layer and electrically insulated from each other. A metal foil layer is used. - In a preferred embodiment, the multilayer portion 40 comprises a first metal foil layer. 42, a second metal foil layer 44 and a third metal foil layer 46.

金属箔層は、好ましくは銅または希釈銅基台金である。The metal foil layer is preferably copper or diluted copper-based gold.

箔回路トレース（線）の横断面積は小さく従ってリードの抵抗は最小化されなく てはならない。好ましい銅合金は、ｌＡＣ３約１００％の導電率を存する。ｌＡ Ｃ３は、焼鈍銅に関する国際標準を表し、一般的に純銅については１００％であ ると認められている。前記導電率要求を満たす鋼合金として、ＣｌＯ２（最小９ ９．９５重量％の銅を含む公称組成を有する無酸素銅）およびＣ１１Ｏ（最小９ ９．９０重量％の銅および最大０．０５重量％の酸素を含む公称組成を有する電 解タフピッチ銅）か挙げられる。The cross-sectional area of the foil circuit traces is small so the lead resistance is not minimized. must not. Preferred copper alloys have a conductivity of about 100% lAC3. lA C3 represents an international standard for annealed copper, and is generally 100% for pure copper. It is recognized that Steel alloys that meet the electrical conductivity requirements include ClO2 (minimum 9 Oxygen-free copper with a nominal composition containing 9.95% by weight copper) and C11O (min. An electric current with a nominal composition containing 9.90% by weight copper and up to 0.05% by weight oxygen. Tough pitch copper) can be mentioned.

第１の誘電層４８および第２の誘電層５０か前記金属箔層の間に配置され、これ ら金属層を互いに絶縁し、かつ接続するために役立つ。前記金属層の一つは信号 面を形成する複数の回路トレース５２にパターン化される。a first dielectric layer 48 and a second dielectric layer 50 are disposed between the metal foil layer; It serves to insulate and connect metal layers from each other. One of the metal layers is a signal Patterned into a plurality of circuit traces 52 forming a surface.

第３図は信号面にパターン化されるものとして第１の金属箔層４２を図解し、こ れは本明細書の全体を通じて説明される実施例であるが、ここにおいて信号面を 第１の金属箔層に限定するように意図されるものはなにもない。FIG. 3 illustrates the first metal foil layer 42 as being patterned on the signal plane; Although this is an example described throughout this specification, the signal plane is Nothing is intended to be limiting to the first metal foil layer.

第１の金属箔層４２の外部分５４は仮想線３４を越えて延びる。外部分５４はリ ート１４′に電気的に相互接続するようにされている。The outer portion 54 of the first metal foil layer 42 extends beyond the imaginary line 34. The outer portion 54 is 14'.

本発明の第１の実施例においては、開口５６か第１おび第２の金属層４２．４４ 並びに第１および第２の誘電層４８．５０を通って形成されて第３の金属層４６ の領域５７を露出させる。そのあと、電子デバイスか領域５７に接続される。多 くの用途において、大部分の半導体ダイは四角形であるから、開口５６は四角形 である。しかし、任意の開口形状か容認され得る。第３の金属箔層４６はグラウ ンド面になる。In a first embodiment of the invention, the opening 56 is connected to the first and second metal layers 42,44. and a third metal layer 46 formed through the first and second dielectric layers 48,50. area 57 is exposed. Thereafter, an electronic device is connected to area 57. Many In many applications, most semiconductor dies are square, so opening 56 is square. It is. However, any aperture shape is acceptable. The third metal foil layer 46 is made of grout. It becomes a face.

第２の開口５８は第１の開口５６の周囲を取り囲む。Second aperture 58 surrounds first aperture 56 .

第２の開口５８は、第１の金属層４２および第１の誘電層４８を通って延存する 。第２の開口の周辺はその長さと幅の両方において第１の開口のそれより大きく 、従って第２の金属箔層４４の部分５９が露出される。第２の金属箔層４４は、 誘電層および仮想線３４を越えて延びる少なくとも１つの外部分６０を存するよ うにパターン化される。外部分６０は剛性の大きな金属フレームのリード１４′ に接合し、パワー面を提供する。A second opening 58 extends through the first metal layer 42 and the first dielectric layer 48. . The perimeter of the second aperture is greater than that of the first aperture in both its length and width. , thus portion 59 of second metal foil layer 44 is exposed. The second metal foil layer 44 is at least one outer portion 60 extending beyond the dielectric layer and the imaginary line 34. It is patterned like a sea urchin. The outer portion 60 is made of a highly rigid metal frame lead 14'. to provide a power surface.

可撓多層回路４０は、自動化またはテープ接合手法によって、または多層可撓回 路技術のような他のプロセスによって製造される。−製造プロセスは第１１第２ および第３の金属箔層４２．４４．４６を銅または銅基合金であるように選ぶこ とを必然的に伴う。箔厚さは約０゜０１３ｍｍ（０，０００５インチ）から約０ ．１５ｍｍ（０゜００６インチ）までであり、より好ましくは約０．０１８ｍｍ （０，０Ｏ０フインチ）（当業者には１／２オンス銅として知られている）〜約 ０．０７ｍｍ（０，００２８インチ）（当業者には２オンス鋼として知られてい る）である。第１、第２の誘電層４８．５０は、デュポン社によって製造される キャブトンのごときポリイミドであるように選ばれる。The flexible multilayer circuit 40 can be fabricated by automated or tape bonding techniques, or by manufactured by other processes such as road technology. -Manufacturing process is 11th and 2nd and the third metal foil layer 42, 44, 46 is selected to be copper or a copper-based alloy. It necessarily accompanies. Foil thickness ranges from approximately 0°013 mm (0,0005 inch) to approximately 0 ．． up to 15 mm (0°006 inches), more preferably about 0.018 mm (0,000 finches) (known to those skilled in the art as 1/2 ounce copper) to approx. 0.07 mm (0.0028 inch) (known to those skilled in the art as 2 oz steel) ). The first and second dielectric layers 48.50 are manufactured by DuPont. It is chosen to be a polyimide such as Cabton.

第１の金属箔層４２は第１の誘電層４８に対して積層される。第２の開口５８は 両層を通して機械的に押抜かれる。次いで、第２の金属箔層４４か第１および第 ２のポリイミド層４８．５０の双方に対して積層される。第１の開口５６は、第 ２の金属箔層４４および第２の誘電層５０を通して押抜かれる機械的ポンチによ って第２の開口５８内の中心に位置される。次いて、第３の金属層４６が第２の 誘電層５０に対し積層されて第４図に図解される構造体を完成する。A first metal foil layer 42 is laminated to a first dielectric layer 48 . The second opening 58 is Mechanically punched through both layers. The second metal foil layer 44 then covers the first and second metal foil layers. 2 polyimide layers 48 and 50. The first opening 56 is A mechanical punch punches through the second metal foil layer 44 and the second dielectric layer 50. is centered within the second opening 58. The third metal layer 46 is then applied to the second metal layer 46. A dielectric layer 50 is laminated to complete the structure illustrated in FIG.

第３の金属箔層４６はグラウンド面を形成し、好ましくは連続箔ノートである。The third metal foil layer 46 forms the ground plane and is preferably a continuous foil note.

リード４２．６０は、箔層の何れにおいても必要とされるすへての他の箔特徴と 同様に、当業者に知られているホトリトグラフィ技術によってパターン化される 。各金属箔層か誘電層に接続された後、箔の接続されない側は感光性化学レジス トによって被覆される。前記レジストは所望の回路パターンを存するマスクを通 じて露出される紫外線のような現像手段に対して露光される。フォトレジストが 、「ポジ形」レジストとして当業者に知られるそれであるか、または、「ネガ形 」レノストとして知られるそれであるかによって、像は、所望の回路パターンで あるか、またはネガ像である。ｆＩ光１麦、フォトレジストの非露光部分は下位 に存在する箔を露出させる適当な溶剤によってリンスして除去される。構造体は 露出された銅を除去するために好適な食刻液中に浸漬される。エツチングおよび すすぎ洗いの後に、残留するフォトレジストは溶剤洗いによって除去される。誘 電層は溶剤および食刻液によって影響されない。誘電層はそのまま残り、金属箔 層は回路トレースの所望輪郭にパターン化される。The lead 42.60 has all the other foil features required in any of the foil layers. Similarly, patterned by photolithographic techniques known to those skilled in the art . After each metal foil layer or dielectric layer is connected, the non-connected side of the foil is coated with a photosensitive chemical resist. covered by The resist is passed through a mask containing the desired circuit pattern. The film is then exposed to a developing means such as ultraviolet light. photoresist , known to those skilled in the art as a "positive tone" resist, or a "negative tone" resist. The statue is shaped with the desired circuit pattern by which it is known as ``renost''. or is a negative image. fI light 1 wheat, unexposed part of photoresist is lower is removed by rinsing with a suitable solvent to expose the foil present. The structure is Immerse in a suitable etchant to remove the exposed copper. etching and After rinsing, the remaining photoresist is removed by solvent washing. Temptation The electrolayer is unaffected by solvents and etching fluids. The dielectric layer remains intact and the metal foil The layers are patterned into the desired contours of the circuit traces.

箔は薄く、かつポリイミド支持層によって支持される。The foil is thin and supported by a polyimide support layer.

リード幅およびリード対リード間隔に関する唯一の制限は、ホトリトグラフィ・ プロセスの解像度および食刻液によるアンダーカットの度合いである。Ｏ，’０ ５ｍｍ（０，００２インチ）輻の間隔を有する０、０５ｍｍ（０，００２インチ ）幅のり−トか、ホトリトグラフィ技術によって容易に得られ、かつ極微細な寸 法が得られる。可撓多層部分４０の内リートピッチは、第１図のリードフレーム の場合の約０．５ｍｍ（０，０２０インチ）に比較するとき、０．　０７６ｍｍ 　〜０．　１０２ｍｍ（０，ＯＯ３インチ〜０．００４インチ）のオーダーであ る。このピッチ差はり一ト密度の５倍増加の可能性に言い換えられる。The only limitations on lead width and lead-to-lead spacing are photolithographic These are the resolution of the process and the degree of undercut caused by the etchant. O,'0 0.05 mm (0.002 inch) with 5 mm (0.002 inch) radius spacing ) easily obtained by wide glue or photolithography technology, and with ultra-fine dimensions. Law is obtained. The inner lead pitch of the flexible multilayer portion 40 is the same as that of the lead frame shown in FIG. 0.5 mm (0,020 inches) in the case of　076mm ~0. On the order of 102mm (0,003 inches to 0.004 inches) Ru. This pitch difference translates into a potential five-fold increase in beam density.

第５図は、本発明の第１実施例に基づく一複合リートフレーム７０を図解する。FIG. 5 illustrates one composite REET frame 70 according to a first embodiment of the invention.

剛性の大きな金属フレーム部分のり一ト１４゛は、０．０２５ｍｍ（０，０１０ インチ）厚さのり一ド１４°及び１オンス銅箔に対応する金属箔層４２．４４． ４６の約６倍の厚さである。剛性の大きな金属リードフレーム部分のり−１”　 １４°は可撓多層部分の外部分に接続される。各金属箔回路トレースは、剛性の 大きな金属リードフレームのリートフィンガに接続される。好ましくは、各外部 分は当該回路トレースに対し最も至近においてリードフィンガに接続される。接 合剤７２は熱圧縮によって作られた拡散接合剤、またはの熱超音波接合、または 金錫または鉛錫共晶のごとき鑞材の何れかである。接合は各可撓リードか次々に 剛性の大きな金属リートフィンガ１４°に接続される単一点であるか、または全 リートか同時に接続される群接合である。The glue 14゛ of the highly rigid metal frame part is 0.025 mm (0.010 mm). inch) thickness of metal foil layer corresponding to 14° and 1 oz copper foil 42.44. It is about 6 times thicker than 46. High rigidity metal lead frame part glue -1” 14° is connected to the outer part of the flexible multilayer part. Each metal foil circuit trace has a rigid Connected to the lead fingers of a large metal lead frame. Preferably each external The lead finger is connected to the lead finger closest to the circuit trace. Contact The mixture 72 is a diffusion bonding agent made by thermal compression, or a thermal ultrasonic bonding agent, or Either a solder metal such as gold-tin or lead-tin eutectic. Join each flexible lead one after the other. Either a single point connected to a rigid large metal leaf finger 14° or a full It is a group junction that is connected at the same time.

複合り一１’フレームか製造されたならば、電子デバイス７４か第３の金属箔層 ４６に接続される。第３の金属箔層は好ましくは銅または銅基合金である。前記 箔はＳ１系集積回路デバイスのそれの概ね３倍の熱膨張係数を有する。熱によっ て発生される機械的応力を防ぐために、好ましくは追従性を有するダイアタッチ 材料（付設金材料）か使用される。−典型的ダイアタッチ材料は銀含有エポキシ 接着剤である。リード線７６は半導体デバイス７４の回路を第１、第２及び第３ の金属箔層４２．４４及び４６に電気的に接続する。大部分のリードフィンガ１ ４゛　は第１の金属箔層４２の外部分５４に電気的に相互接続される。同様に、 少なくとも１個のリードフィンガ１４′は第３の金属箔層４６の外部分７８との 電気的相互接続のために保留される。第２及び第３の金属箔層４４．４６の外部 分６０．７８の位置づけは随意的である。位置づけは対応する剛性の大きなリー ドフィンガ１４’　の位置に依存する。ボジショニングは所望の金属箔面のホト リトグラフィエツチング間に容易に達成される。If a composite frame is manufactured, the electronic device 74 or the third metal foil layer 46. The third metal foil layer is preferably copper or a copper-based alloy. Said The foil has a coefficient of thermal expansion approximately three times that of the S1-based integrated circuit device. due to heat In order to prevent the mechanical stress generated by material (fitting material) used. - Typical die attach material is silver-containing epoxy It is an adhesive. Lead wires 76 connect circuits of semiconductor device 74 to first, second, and third circuits. electrically connected to metal foil layers 42, 44 and 46 of. Most lead fingers 1 4′ is electrically interconnected to the outer portion 54 of the first metal foil layer 42. Similarly, At least one lead finger 14' is in contact with the outer portion 78 of the third metal foil layer 46. Reserved for electrical interconnections. Exterior of second and third metal foil layers 44,46 The positioning of minute 60.78 is arbitrary. The positioning is based on the corresponding lead with large stiffness. It depends on the position of the dofinger 14'. Positioning is done by photo-coating the desired metal foil surface. easily achieved during lithography etching.

本発明の第２実施例は、第６図において断面図として図解されている。この実施 例においては、可撓多層部分４０と剛性金属リードフィンガ１４’　との間のす べての電気的相互接続が第１の金属箔層４２の外部分を通じて行われる。導電バ イア７９は、誘電層４８．５０の１つ以上を横切る。導電バイア７９は、第１の 金属箔層４２を第２、第３の金属箔層４４．４６の双方に電気的に相互接続する 。第２の金属箔層４４上の回路線を第３の金属箔層４６の領域に電気的に相互接 続することもまた本発明の範囲内に入る。A second embodiment of the invention is illustrated in cross-section in FIG. This implementation In the example, the entire area between the flexible multilayer portion 40 and the rigid metal lead finger 14' is All electrical interconnections are made through the outer portion of first metal foil layer 42. conductive bar Ear 79 traverses one or more of dielectric layers 48,50. Conductive via 79 is connected to the first electrically interconnecting the metal foil layer 42 to both the second and third metal foil layers 44,46; . electrically interconnecting the circuit lines on the second metal foil layer 44 to areas of the third metal foil layer 46; It is also within the scope of the present invention to continue.

層間導電路（バイア）を形成するため、２つの金属箔層か電気的に相互接続さる べき点において、小直径の穴か誘電層を通って形成される。前記穴はドリリング のごとき機械的作業、化学的ミリング、またはレーザー揮散によって形成され得 る。前記穴の直径は、第１の金属箔層４２において形成される回路線５２の厚さ のオーダー、すなわち直径０．０５ｍｍ（０，００２インチ）またはそれより大 きいオーダーである。Two metal foil layers are electrically interconnected to form an interlayer conductive path (via) At the point, a small diameter hole is formed through the dielectric layer. The hole is drilled may be formed by mechanical operations such as, chemical milling, or laser ablation. Ru. The diameter of the hole is determined by the thickness of the circuit line 52 formed in the first metal foil layer 42. on the order of , i.e. 0.05 mm (0,002 inch) in diameter or larger This is a great order.

次に、前記穴の表面は導電性にされる。穴を導電性にする一手段は、ブラックホ ールＴＩ″予鍍金法として知られている（ブラックホール１Ｍはコネチカット州 スタッフォード市オリン社の商用名である）。炭素微粒が穴の壁に堆積されて表 面を導電性にする。次に、銅のごとき導電金属が電気鍍金のような化学的プロセ スによって析出される。ブラックホール７Ｍ子鍍金法に関するより詳細な説明は ミンテン他の米国特許第４６１９７４１号に開示されている。Next, the surface of the hole is made conductive. One way to make the holes conductive is to use black holes. Black Hole 1M is known as the "TI" pre-plating method (Black Hole 1M is located in Connecticut). (commercial name of Olin Company, Stafford City). Carbon particles are deposited on the wall of the hole and exposed. Make the surface conductive. A conductive metal such as copper is then processed through a chemical process such as electroplating. It is precipitated by A more detailed explanation of the black hole 7M plating method is available at No. 4,619,741 to Minten et al.

非電着性金属析出法のような導電層を析出するその他の既知の方法も使用され得 る。Other known methods of depositing conductive layers such as non-electrodepositable metal deposition methods may also be used. Ru.

導電性バイア７９か形成されたならば、ワイヤ接合による電気的相互接続か前記 のように行われる。リート線は第１の金属箔層４２、第２の金属箔層４４および 第３の金属箔層４６に延びる。導電性バイア７９は第２の金属箔層４４および第 ３の金属箔層４６から第１の金属箔層４２上の回路線に電気信号を伝達する。剛 性の大きな金属リードフィンガ！４’　と可撓部分４０との間の全ての接合剤７ ２は同し垂直面に存在する。隣接する外部分間の電気的短絡の可能性は減じられ る。さらに、自動化された組立てか容易化される。Once conductive vias 79 have been formed, electrical interconnection by wire bonding or It is done like this. The rieet wire has a first metal foil layer 42, a second metal foil layer 44, and It extends to the third metal foil layer 46. Conductive vias 79 are connected to the second metal foil layer 44 and the second metal foil layer 44. An electrical signal is transmitted from the third metal foil layer 46 to the circuit line on the first metal foil layer 42. Tsuyoshi Sexy big metal lead fingers! 4' and any bonding agent 7 between the flexible part 40 2 also exists in the vertical plane. The possibility of electrical shorts between adjacent externals is reduced. Ru. Additionally, automated assembly is facilitated.

第７図においては横断面図をもって、第８図においては」二図面をもって図解さ れる本発明のさらに別の一実施例において、導電バイア７９は全リード線７６の 接合か第１の金属箔層４２に対して為されることを可能にする。Figure 7 is illustrated with a cross-sectional view, and Figure 8 is illustrated with two drawings. In yet another embodiment of the invention, conductive vias 79 are connected to all leads 76. Enables bonding to be made to the first metal foil layer 42.

１１′Ｌ−の開口５６は第３の金属箔層４６をダイ接合のために露出するに十分 である。もしも、所望の電気的相互接続か信号面に対して行われるならば、回路 線５２かり−１−フィンガ１４′に延びる。もしも、電気的相互接続かパワー面 に対して行われるならば、電気的相互接続か回路トレース５２″に対してなされ る。回路線５２°は第１の金属層４２て形成され、導電バイア７９を含む。導電 バイア７９は、電気的インパルスを第２の金属箔層４４に伝達し、インパルスは 金属箔層４４に沿って第２の導電バイア７９に達し、そこにおいて回路トレース ５２°　に復帰するように伝達されてリートフィンガ１４’　と電気的に相互接 続する。同様に、もし電気的インパルスがグラウンド面信号であるへきならば、 電気的相互接続は第１の金属箔層４２から形成される回路トレース５２”に対し てなされ、回路トレース５２”が導電バイア７９を含み、導！　’＼イア７９は 信号を第３の金属箔層４６に伝達し、それに沿って信号は第２の導電ノくイア７ ９に達するまで進行し、第２の導電バイア７９は信号を第１の金属箔層４２及び 回路トレース５２”に復帰するように伝達する。なおまた、可撓多層部分４０と 剛性金属リードフレーム部分１４’　との間の全ての相互結合を以上詳細に記述 されたごとく一垂直面に有することによって利益か得られる。全てのワイヤ接合 は同一面に対して為される。全てのワイヤ接合剤を同一垂直面に有することは自 動化されたワイヤ接合を容易にする。11'L- opening 56 is sufficient to expose third metal foil layer 46 for die bonding. It is. If the desired electrical interconnections are made to the signal plane, the circuit Line 52 extends from finger 14'. If the electrical interconnection or power side If made to the electrical interconnect or circuit trace 52'' Ru. Circuit line 52° is formed from first metal layer 42 and includes conductive vias 79. conductive Via 79 transmits the electrical impulse to second metal foil layer 44, and the impulse is A second conductive via 79 is reached along the metal foil layer 44 where the circuit trace It is transmitted so that it returns to 52° and is electrically connected to the leaf finger 14'. Continue. Similarly, if the electrical impulse is a ground plane signal, then Electrical interconnections are made to circuit traces 52'' formed from first metal foil layer 42. The circuit trace 52'' includes a conductive via 79, and the conductive via 79 is The signal is transmitted to a third metal foil layer 46 along which the signal is transmitted to a second conductive layer 7. 9, the second conductive via 79 transfers the signal to the first metal foil layer 42 and circuit trace 52''. Additionally, flexible multilayer portion 40 and All interconnections between the rigid metal lead frame section 14' are described in detail above. Benefits can be obtained by having it in one vertical plane as shown. All wire connections is done on the same surface. It is natural to have all wire bonding agents in the same vertical plane. Facilitates automated wire joining.

第９図は、本発明の複合リードフレーム７０を組込まれた電子パッケージを横断 面図をもって図解する。電子パッケージ８０はベース構成要素８２およびカバー 構成要素８４を有する。ベース構成要素８２およびカッく一構成要素８４は、金 属、重合体またはセラミックのごとき任意の好適な材料から形成され得る。好ま しくは、少な（ともベース構成要素８２は導熱率を最大化するために金属または 金属合金である。最も好ましくは、ベース構成要素８２は銅、アルミニウムまた はそれらの合金である。−典型的実施例において、前記ベース構成要素８２は陽 極酸化（水和Ａｌ２０３）面を存するＡ１合金から成る。陽極酸化面は塩スプレ ー腐食の問題を無くするとともにパッケージ８０の導熱率を減じることなしに電 気的絶縁を達成することが判明している。FIG. 9 shows a cross section of an electronic package incorporating a composite lead frame 70 of the present invention. Illustrate with a side view. Electronic package 80 includes a base component 82 and a cover. It has a component 84. Base component 82 and cupboard component 84 are made of gold. It may be formed from any suitable material, such as metal, polymer, or ceramic. Like Alternatively, the base component 82 may be made of metal or metal to maximize heat conductivity. It is a metal alloy. Most preferably, base component 82 is made of copper, aluminum or is their alloy. - In an exemplary embodiment, said base component 82 is It consists of an A1 alloy with extremely oxidized (hydrated Al203) surfaces. Salt spray on anodized surfaces - Eliminates corrosion problems and increases electrical conductivity without reducing the thermal conductivity of the package 80. It has been found that gas insulation can be achieved.

ベース構成要素８２とカバー構成要素８４との間に複合リードフレーム７０か配 置される。密閉剤８６かり−ｌ・フレーム７０をカバー構成要素８４及びベース 構成要素８２の双方に接続する。密閉剤８６は複合リードフレーム７０をベース 構成要素８２およびカッく一構成要素８４から絶縁するために電気的に不伝導性 であるように選ばれる。もしも、陽極酸化Ａ１またはＡＩ合金ヘースおよびカバ ー構成要素か使用されるならば、陽極酸化層は不伝導性密閉剤の必要性を否定す るのに十分な抵抗性を提供する。密閉剤は熱硬化性および熱可塑性重合体樹脂、 密封硝子およびセラミックから構成されるグループから選択され得る。好ましく は、エポキシのごとき熱硬化性重合体樹脂が使用される。エポキシはその追従性 および比較的低い硬化温度の故に好まし、い密閉剤である。Composite lead frame 70 is disposed between base component 82 and cover component 84. be placed. A sealant 86 is used to cover the frame 70 with the component 84 and the base. Connects to both components 82. Sealant 86 is based on composite lead frame 70 electrically non-conductive to insulate from component 82 and cupboard component 84; chosen to be. If anodized A1 or AI alloy heath and cover – If components are used, an anodized layer negates the need for a non-conductive sealant. Provides sufficient resistance to Sealants are thermosetting and thermoplastic polymer resins, It may be selected from the group consisting of sealed glass and ceramic. preferably Thermosetting polymer resins such as epoxies are used. Epoxy has conformability and is a preferred sealant because of its relatively low curing temperature.

追従性は密閉剤８６の望ましい特徴である。複合リードフレーム７０の剛性金属 部分３０は密閉剤内の可撓多層部分４０に接合するからである。追従性を有する 密閉剤は過度の応力を生じることなしに接合剤７２を支持する。Compliance is a desirable feature of sealant 86. Rigid metal of composite lead frame 70 This is because section 30 joins flexible multilayer section 40 within the sealant. Has followability The sealant supports bonding agent 72 without creating undue stress.

可撓多層部分４０の誘電層は約２７５°Ｃを超える温度で劣化し始めるから、比 較的低い温度で接着する密閉剤８６が好ましい。Because the dielectric layers of flexible multilayer section 40 begin to degrade at temperatures above about 275°C, Sealants 86 that bond at relatively low temperatures are preferred.

電子デバイス７４からの熱の除去を最大化するために、銀含有エポキシのごとき 導熱接着剤８８か第３の金属箔層４６をベース構成要素８２の表面９０に接続す るのに使用される。To maximize heat removal from the electronic device 74, a silver-containing epoxy, etc. Connecting thermally conductive adhesive 88 or third metal foil layer 46 to surface 90 of base component 82 used for

第９図に図解されるようにベース構成要素８２の表面９０は、電子デバイス７４ の接合面を複合リードフレーム７０に対し整合するための凹所を示す。凹所は随 意的である。平坦な表面９０は本発明の範囲内である。As illustrated in FIG. A recess is shown for aligning the mating surface of the composite lead frame 70 with respect to the composite lead frame 70. There are many concavities It is intentional. A flat surface 90 is within the scope of the present invention.

第９図に図解されるパッケージはベース構成要素及び封着されたカバー構成要素 ８４を有するが、［窓フレームコパッケージも本発明の範囲内であることは当業 者によって理解されるだろう。窓フレーム形のパッケージにおいては、複合リー ドフレーム７０はベース構成要素８２と密封リング（図示せず）との間に配置さ れそして接続される。その後、密封リングの反対側かカバー構成要素８４に接続 されてパッケージの組立てを完了する。The package illustrated in FIG. 9 includes a base component and a sealed cover component. 84, but it is understood by those skilled in the art that window frame co-packages are also within the scope of the present invention. will be understood by the person. For window frame packages, composite lead The frame 70 is disposed between the base component 82 and a sealing ring (not shown). and connected. Then connect to the opposite side of the sealing ring or cover component 84. has been completed to assemble the package.

パッケージの組立てと電子デバイスの取付けが異なる位置で遂行さるへきときは 、窓フレームパッケージがしばしば使用される。When package assembly and electronic device installation are performed in different locations , window frame packages are often used.

第９図に図解されるパッケージはベース構成要素８２はリードフレーム３０との 間に配置される外部分５４を示すか、外部分５４がカバー要素８４とリードフレ ーム３０との間に配置されることも本発明の範囲内である。The package illustrated in FIG. The outer portion 54 is shown disposed between the cover element 84 and the lead frame. It is also within the scope of the present invention for the device to be placed between the frame 30 and the frame 30.

第９図の電子パッケージは分離したベース構成要素８２とカバー構成要素８４と を示すが、本発明の複合リードフレームはモールドされたエポキシパッケージ内 に組込まれ得ることは理解されるであろう。その内部にエポキシブロックが可撓 多層部分４０及び剛性の大きなリードフィンガ１４’　の少なくとも一部分をカ プセル封止するようなパッケージもまた本発明の範囲内である。The electronic package of FIG. 9 includes a separate base component 82 and cover component 84. The composite lead frame of the present invention is shown in a molded epoxy package. It will be understood that it may be incorporated into Inside it is a flexible epoxy block At least a portion of the multilayer portion 40 and the highly rigid lead fingers 14' are covered. Also within the scope of this invention are packages such as those that are sealed.

以上説明された各実施例によって、可撓多層部分４０に形成された回路線のリー ド密度は従来のリードフレームによって得られるそれより著しく高いことが理解 されるだろう。これは金属箔層か０．０１８ｍｍ（０，０００フインチ）〜約０ ．０７ｍｍ（０，００２８インチ）の厚さのオーダーだからである。典型的には 、０．２５ｍｍ（０，０１０インチ）の輻と０．２５ｍｍ（０，０１０インチ） の間隔とを有する従来のリードフレームとは異なって、０．０５ｍｍ（０，００ ２インチ）幅のリードであって０．０２５ｍｍ（０，００１インチ）〜０．０５ ｍｍ（０，００２インチ）幅間隔を存するものかホトリトグラフィ・技術によっ て容易に得られる。リード密度は従来のリードフレームを組込む金属層または多 層構造を有するリードフレームに比し著しく向上される。外リードフレームは複 合リードフレームの耐久性を増し、かつワイヤ接合を容易ならしめるとともに多 層可撓回路に比し有利である。According to each of the embodiments described above, the leads of the circuit wires formed in the flexible multilayer portion 40 are explained. It is understood that the lead density is significantly higher than that obtained with conventional lead frames. will be done. This is a metal foil layer with a thickness of 0.018 mm (0,000 inches) to approximately 0 ．． This is because the thickness is on the order of 0.07 mm (0.0028 inches). typically , 0.25 mm (0,010 inch) radius and 0.25 mm (0,010 inch) Unlike conventional lead frames which have a spacing of 0.05 mm (0.00 2 inch) wide lead from 0.025 mm (0,001 inch) to 0.05 mm (0,002 inch) width interval or by photolithography technology. can be easily obtained. Lead density is determined by the metal layer or multilayer that incorporates traditional lead frames. This is a significant improvement over lead frames with a layered structure. The outer lead frame is This increases the durability of the joint lead frame, makes wire joining easier, and increases the durability of the lead frame. Advantages compared to layered flexible circuits.

本発明によれば上に記述された目的、手段および利点を完全に満足させる複合多 層リードフレームが得られることは明らかである。本発明その特定実施例と共に 説明されたが、多くの代替形式、修正形式及び変形か以上の説明に鑑みて当業者 に明らかであることは明白である。According to the present invention, a composite polyurethane which fully satisfies the objects, means and advantages described above. It is clear that a layered lead frame is obtained. The invention together with its specific embodiments Although described, many alternatives, modifications and variations will occur to those skilled in the art in view of the foregoing description. It is obvious that

従って、別添請求の範囲の精神及び広い領域内に入るすへてのそのような代替形 式、修正形式及び変形を包含することか意図される。Accordingly, all such alternatives falling within the spirit and broad scope of the appended claims It is intended to cover formulas, modifications, and variations.

ＦＩＣ；、２ ＦＩＧ、３ ＦＩＣ，４ ＦＩＧ、５ ＦＩＣ，６ ＦＩＣ，７ ＦＩＧ、９ 補正書の翻訳文提出書　く特許法ｗ、１８−如７割組平成　４　年　４　月　２ ８　日■FIC;, 2 FIG.3 FIC,4 FIG.5 FIC,6 FIC,7 FIG.9 Submission of Translation of Written Amendment, Patent Law, 18-70%, April 2, 1992 8 days■

Claims (1)

【特許請求の範囲】 １．中心に位置づけられた開口（３２）の周囲にて片持ちの態様で延びる複数の リードフィンガ（１４′）を有する剛性金属リードフレーム部分（３０）；少な くとも１つの誘電層（４８）によって支持された少なくとも１つの金属箔層（４ ２）を有する可撓多層部分（４０）であって少なくとも１つの金属層（４２）が 複数の回路線（５２）にパターン化されるもの；及び前記剛性金属リードフレー ム部分（３０）のリードフィンガ（１４′）に各前記金属箔回路線（５２）を個 別に電気的に相互接続するための手段（７２）を有することを特徴とする複合リ ードフレーム（７０）。 ２．請求項１の複合リードフレーム（７０）であって、各前記金属箔回路線（５ ２）が前記回路線（５２）の最も至近で前記リードフィンガ（１４′）に電気的 に相互接続されることを特徴とする複合リードフレーム（７０）。 ３．請求項２の複合リードフレーム（７０）であって、前記剛性の大きな金属リ ードフレーム部分（３０）に各前記金属箔層（４２）を電気的に相互接続するた めの前記手段（７２）が熱圧縮接合、熱超音波接合または鑞接から成る群から選 択されることを特徴とする複合リードフレーム（７０）。 ４．請求項３の複合リードフレーム（７０）であって、前記剛性の大きな金属リ ードフレーム部分（１４′）に各前記金属箔層（４２）を電気的に相互接続する ための前記手段（７２）が鑞接でありそして前記鑞材がＡｕ−ＳｎおよびＰｂ− Ｓｎ共晶から構成される群から選択されることを特徴とする複合リードフレーム （７０）。 ５．請求項３の複合リードフレーム（７０）であって、前記可撓多層部分（４０ ）が３つの金属箔層（４２、４４、４６）を有することを特徴とする複合リード フレーム（７０）。 ６．請求項５の複合リードフレーム（７０）であって、各前記金属箔層（４２、 ４４、４６）がＩＡＣＳ約１００％の導電率を有するＣｕまたはＣｕ基合金から 選択されることを特徴とする複合リードフレーム（７０）。 ７．請求項６の複合リードフレーム（７０）であって、前記可撓多層部分（４０ ）が第１および第２の開口（５６）および（５８）を有し、前記第１の方形開口 （５６）が前記第１および第２の金属箔層（４２）および（４４）を通り、かつ 第１および第２の誘電層（４８）および（５０）を通って延び、かつ前記第２の 開口（５８）が前記第１の開口（５６）を取り囲みそして前記第１の金属箔層（ ４２）および前記第１の誘電層（４８）を通って延びることを特徴とする複合リ ードフレーム（７０）。 ８．請求項７の複合リードフレーム（７０）であって、前記第１、第２および第 ３の金属箔層（４２、４４）および（４６）が前記剛性の大きな金属リードフレ ーム部分（１４′）との電気的相互接続（７２）のため前記第１および第２の誘 電層（４８）および（５０）の向こう側へ延びる少なくとも１個の外部分（５４ ）を有することを特徴とする複合リードフレーム（７０）。 ９．請求項７の複合リードフレーム（７０）であって、導電バイア（７９）が前 記第１、第２および第３の金属合金箔層（４２、４４）および（４６）を電気的 に相互結合することを特徴とする複合リードフレーム（７０）。 １０．請求項９の複合リードフレーム（７０）であって、前記第１の金属箔層（ ４２）が前記剛性の大きな金属リードフレーム部分（１４′）との電気的相互接 続（７２）のため前記第１および第２の誘電層（４８）および（５０）の向こう 側へ延びる少なくとも１個の外部分（５４）を有することを特徴とする複合リー ドフレーム（７０）。 １１．請求項６の複合リードフレーム（７０）であって、前記可撓多層部分（４ ０）が前記第１および第２の金属箔層（４２）および（４４）および前記第１お よび第２の誘電層（４８）および（５０）を通って延びる開口（５６）を有する ことを特徴とする複合リードフレーム（７０）。 １２．請求項１１の複合リードフレーム（７０）であって、前記第１、第２およ び第３の金属箔層（４２、４４）および（４６）が導電バイア（７９）によって 電気的に相互接続されることを特徴とする複合リードフレーム（７０）。 １３．請求項１２の複合リードフレーム（７０）であって、前記第１の金属箔層 （４２）が前記剛性の大きな金属リードフレーム部分（１４′）との電気的相互 接続（７２）のため前記第１および第２の誘電層（４８）および（５０）の向こ う側へ延びる少なくとも１つの外部分（５４）を有することを特徴とする複合リ ードフレーム（７０）。 １４．電子デバイス（７４）を収容するようにされたパッケージ（８０）であっ て ベース構成要素（８２）； カバー構成要素（８４）； 前記ベース構成要素（８２）と前記カバー構成要素（８４）との間に配置される 複合リードフレーム（７０）；および前記複合リードフレーム（７０）を前記ベ ース構成要素（８２）および前記カバー構成要素（８４）に接続する密封手段（ ８６）を有し、前記複合リードフレーム（７０）が、中心に位置された第１の開 口（３４）の周囲にて片持ちの態様で延びる複数のリードフィンガ（１４′）を 有する剛性の大きな金属リードフレーム部分（３０）と、少なくとも１つの誘電 層（４８）によって支持された少なくとも１つの金属箔層（４２）を有する可撓 多層部分（４０）であって少なくとも１つの金属層（４２）が複数の回路線（５ ２）を有するものと、前記剛性の大きな金属リードフレーム部分（３０）のリー ドフィンガ（１４′）に各前記金属箔回路線（５２）を個別に電気的に相互接続 するための手段（７２）とを有することを特徴とするパッケージ（８０）。 １５．請求項１４のパッケージ（８０）であって、各前記金属箔回路線（５２） が前記回路線の最も至近で前記リードフィンガ（１４′）に電気的に相互接続さ れることを特徴とするパッケージ（８０）。 １６．請求項１５のパッケージ（８０）であって、前記ベース構成要素（８２） および前記カバー構成要素（８４）が金属、プラスチックおよびセラミックから 成る群から選択されることを特徴とするパッケージ（８０）。 １７．請求項１６のパッケージ（８０）であって、前記ベース構成要素（８２） が金属または金属合金であるように選択されることを特徴とするパッケージ（８ ０）。 １８．請求項１７のパッケージ（８０）であって、前記ベース構成要素（８２） がＡｌまたはＡ１基合金であるように選択されることを特徴とするパッケージ（ ８０）。 １９．請求項１８のパッケージ（８０）であって、前記Ａ１またはＡ１基合金ベ ース構成要素（８２）が、環境に露出される少なくともそれらの表面において陽 極酸化層を有することを特徴とするパッケージ（８０）。 ２０．請求項１７のパッケージ（８０）であって、前記密封材（８６）が熱可塑 性重合体樹脂、熱硬化重合体樹脂、密封硝子及びセラミックから成る群から選択 されることを特徴とするパッケージ（８０）。 ２１．請求項２０のパッケージ（８０）であって、前記密封材（８６）が熱硬化 性重合体樹脂であるように選択されることを特徴とするパッケージ（８０）。 ２２．請求項２１のパッケージ（８０）であって、前記複合リードフレーム（７ ０）の前記可撓多層部分（４０）が第１および第２の開口（５６）および（５８ ）を有し、前記第１の開口（５６）が前記第１および第２の金属箔層（４２）お よび（４４）および第１および第２の誘電層（４８）および（５０）を通って延 び、かつ前記第２の開口（５８）が前記第１の開口（５６）を取り囲み、かつ前 記第１の金属箔層（４２）および前記第１の誘電層（４８）を通って延びること を特徴とするパッケージ（８０）。 ２３．請求項２２のパッケージ（８０）であって、第１、第２および第３の金属 箔層（４２、４４）および（４６）が前記剛性の大きな金属リードフレーム部分 （３０）との電気的相互接続（７２）のため前記第１および第２の誘電層（４８ ）および（５０）の向こう側へ延びる外部分（５４、６０、７８）を有すること を特徴とするパッケージ（８０）。 ２４．請求項２３のパッケージ（８０）であって、前記第１、第２および第３の 金属箔層（４２、４４）および（４６）が前記電子デバイス（７４）から前記第 １、第２および第３の金属箔層（４２、４４）および（４６）へ延びるワイヤ接 合によって前記電子デバイス（７４）に電気的に相互接続されることを特徴とす るパッケージ（８０）。 ２５．請求項２２のパッケージ（８０）であって、前記第１の金属箔層（４２） が前記剛性の大きな金属リードフレーム部分（３０）との電気的相互接続（７２ ）のため前記第１および第２の誘電層（４８）および（５０）の向こう側へ延び る外部分（５４）を有することを特徴とするパッケージ（８０）。 ２６．請求項２５のパッケージ（８０）であって、前記可撓多層部分（４０）が 前記第１、第２および第３の金属箔層（４２、４４）および（４６）を相互接続 する導電バイア（７９）を有することを特徴とするパッケージ（８０）。 ２７．請求項２６のパッケージ（８０）であって、前記第１、第２および第３の 金属箔層（４２、４４）および（４６）が前記電子デバイスから前記第１の金属 箔層へ延びるワイヤ接合によって前記電子デバイス（７４）に電気的に相互接続 （７２）されることを特徴とするパッケージ（８０）。 ２８．請求項２１のパッケージ（８０）であって、前記可撓多層部分（４０）が 前記第１および第２の金属箔層（４２）および（４４）および第１および第２の 誘電層（４８）および（５０）を通って延びる開口（５６）を有することを特徴 とするパッケージ（８０）。 ２９．請求項２８のパッケージ（８０）であって、前記第１の金属箔層（４２） が前記剛性の大きな金属リードフレーム（３０）との電気的接続（７２）のため 前記第１及び第２の誘電層（４８）および（５０）の向こう側へ延びる外部分（ ５４）を有することを特徴とするパッケージ（８０）。 ３０．請求項２９のパッケージ（８０）であって、前記可撓多層部分（４０）が 前記第１、第２および第３の金属箔層（４２、４４）および（４６）を相互接続 する導電バイア（７９）を有することを特徴とするパッケージ（８０）。 ３１．請求項３０のパッケージ（８０）であって、前記第１、第２および第３の 金属箔層（４２、４４）および（４６）が前記電子デバイス（７４）から前記第 １の金属箔層（４２）へ延びるワイヤボンドによって前記電子デバイス（７４） に電気的に相互接続されることを特徴とするパッケージ（８０）。 ３２．電子デバイス（７４）を収容するようにされたパッケージ（８０）であっ て 中心に位置された第１の開口（３４）のまわりに片持ちの態様で延びる複数のリ ードフィンガ（１４′）を有する剛性の大きな金属リードフレーム部分（３０） と、なくとも１つの誘電層（４８）によって支持された少なくとも１つの金属箔 層（４２）を有する可撓多層部分（４０）であって少なくとも１つの金属層（４ ２）が複数の回路線（５２）を有するものと、前記剛性の大きな金属リードフレ ーム部分（３０）のリードフィンガ（１４′）に各前記金属箔回路線（５２）を 個別に電気的に相互接続するための手段（７２）とを有する複合リードフレーム （７０）；および 前記可撓多層部分（４０）および前記剛性金属リードフィンガ（１４′）の少な くとも一部分のカプセル封止を行うモールドされた重合体樹脂を有することを特 徴とするパッケージ（８０）。[Claims] 1. a plurality of holes extending in a cantilevered manner around a centrally located aperture (32); Rigid metal lead frame portion (30) with lead fingers (14'); at least one metal foil layer (4) supported by at least one dielectric layer (48); 2) having at least one metal layer (42); patterned into a plurality of circuit lines (52); and said rigid metal leadframe. Each of the metal foil circuit wires (52) is individually attached to the lead fingers (14') of the arm portion (30). A composite network characterized in that it has means (72) for separately electrically interconnecting. card frame (70). 2. The composite lead frame (70) of claim 1, wherein each of said metal foil circuit wires (5) 2) is electrically connected to the lead finger (14') closest to the circuit line (52). A composite lead frame (70) characterized in that it is interconnected to a composite lead frame (70). 3. The composite lead frame (70) according to claim 2, wherein the highly rigid metal link for electrically interconnecting each said metal foil layer (42) to the board frame portion (30). The means (72) for A composite lead frame (70) characterized in that it is selected from the group consisting of: 4. The composite lead frame (70) according to claim 3, wherein the highly rigid metal link electrically interconnecting each said metal foil layer (42) to the board frame portion (14'); The means (72) for soldering are soldering and the soldering material is Au-Sn and Pb- A composite lead frame selected from the group consisting of Sn eutectic. (70). 5. The composite lead frame (70) of claim 3, wherein the flexible multilayer portion (40 ) has three metal foil layers (42, 44, 46) Frame (70). 6. 6. The composite lead frame (70) of claim 5, wherein each of said metal foil layers (42, 44, 46) is made of Cu or Cu-based alloy with a conductivity of about 100% IACS. A composite lead frame (70) characterized in that it is selected. 7. 7. The composite lead frame (70) of claim 6, wherein the flexible multilayer portion (40) ) has first and second apertures (56) and (58), said first rectangular aperture; (56) passes through the first and second metal foil layers (42) and (44), and extending through the first and second dielectric layers (48) and (50); An opening (58) surrounds said first opening (56) and surrounds said first metal foil layer ( 42) and said first dielectric layer (48). card frame (70). 8. 8. The composite lead frame (70) of claim 7, wherein the first, second and third The metal foil layers (42, 44) and (46) of No. 3 are attached to the highly rigid metal lead frame. said first and second leads for electrical interconnection (72) with arm portion (14'); at least one outer portion (54) extending beyond the electrical layers (48) and (50); ) A composite lead frame (70) characterized in that it has a. 9. 8. The composite lead frame (70) of claim 7, wherein the conductive via (79) is The first, second and third metal alloy foil layers (42, 44) and (46) are electrically A composite lead frame (70) characterized in that the composite lead frame (70) is interconnected to each other. 10. The composite lead frame (70) of claim 9, wherein the first metal foil layer ( 42) is electrically interconnected with the rigid metal lead frame portion (14'). beyond said first and second dielectric layers (48) and (50) for connection (72). Composite leash characterized in that it has at least one outer portion (54) extending laterally. deframe (70). 11. 7. The composite lead frame (70) of claim 6, wherein said flexible multilayer portion (4) 0) is the first and second metal foil layer (42) and (44) and the first metal foil layer (42) and (44). and an opening (56) extending through the second dielectric layer (48) and (50). A composite lead frame (70) characterized by: 12. The composite lead frame (70) of claim 11, wherein the first, second and and third metal foil layers (42, 44) and (46) are connected by conductive vias (79). A composite lead frame (70) characterized in that it is electrically interconnected. 13. The composite lead frame (70) of claim 12, wherein the first metal foil layer (42) is electrically interconnected with the rigid metal lead frame portion (14'). across said first and second dielectric layers (48) and (50) for connection (72). a composite ring characterized in that it has at least one outer portion (54) extending towards the caries side; card frame (70). 14. A package (80) adapted to house an electronic device (74). hand Base component (82); cover component (84); disposed between the base component (82) and the cover component (84) a composite lead frame (70); and the composite lead frame (70) sealing means ( 86), wherein the composite lead frame (70) has a centrally located first opening. a plurality of lead fingers (14') extending in a cantilevered manner around the mouth (34); a highly rigid metal lead frame portion (30) having at least one dielectric flexible having at least one metal foil layer (42) supported by a layer (48) a multilayer portion (40), wherein at least one metal layer (42) includes a plurality of circuit lines (5); 2) and the lead of the highly rigid metal lead frame portion (30). Individually electrically interconnect each said metal foil circuit line (52) to the dofinger (14'). and means (72) for. 15. 15. The package (80) of claim 14, wherein each of said metal foil circuit lines (52) is electrically interconnected to said lead finger (14') closest to said circuit line. A package (80) characterized in that: 16. The package (80) of claim 15, wherein the base component (82) and said cover component (84) is made of metal, plastic and ceramic. A package (80) characterized in that it is selected from the group consisting of: 17. 17. The package (80) of claim 16, wherein the base component (82) A package (8) characterized in that: is selected to be a metal or metal alloy. 0). 18. The package (80) of claim 17, wherein the base component (82) is selected such that is Al or Al-based alloy ( 80). 19. 19. The package (80) of claim 18, wherein the A1 or A1-based alloy base the base components (82) are exposed to sunlight at least on their surfaces that are exposed to the environment. A package (80) characterized by having an extremely oxidized layer. 20. The package (80) of claim 17, wherein the sealant (86) is a thermoplastic. selected from the group consisting of thermoset polymer resins, thermosetting polymer resins, sealed glass, and ceramics. A package (80) characterized in that: 21. 21. The package (80) of claim 20, wherein the sealant (86) is thermoset. A package (80) characterized in that it is selected to be a polymeric resin. 22. 22. The package (80) of claim 21, wherein the composite lead frame (7 0) said flexible multilayer portion (40) has first and second openings (56) and (58). ), and the first opening (56) is connected to the first and second metal foil layers (42) and (44) and extending through the first and second dielectric layers (48) and (50). and the second opening (58) surrounds the first opening (56) and extending through the first metal foil layer (42) and the first dielectric layer (48); A package (80) characterized by: 23. 23. The package (80) of claim 22, wherein the first, second and third metals The foil layers (42, 44) and (46) are the highly rigid metal lead frame portions. said first and second dielectric layers (48) for electrical interconnection (72) with (30); ) and having an outer portion (54, 60, 78) extending beyond (50). A package (80) characterized by: 24. 24. The package (80) of claim 23, wherein the first, second and third Metal foil layers (42, 44) and (46) extend from the electronic device (74) to the 1, second and third metal foil layers (42, 44) and (46). electrically interconnected to the electronic device (74) by package (80). 25. 23. The package (80) of claim 22, wherein the first metal foil layer (42) is electrically interconnected (72) with said rigid metal lead frame portion (30). ) extending beyond said first and second dielectric layers (48) and (50). A package (80) characterized in that it has an outer part (54) comprising: 26. 26. The package (80) of claim 25, wherein the flexible multilayer portion (40) comprises: interconnecting the first, second and third metal foil layers (42, 44) and (46); A package (80) characterized in that it has conductive vias (79). 27. 27. The package (80) of claim 26, wherein the first, second and third Metal foil layers (42, 44) and (46) remove the first metal from the electronic device. electrically interconnecting to said electronic device (74) by wire bonds extending to the foil layer; (72) A package (80) characterized by: 28. 22. The package (80) of claim 21, wherein the flexible multilayer portion (40) comprises: the first and second metal foil layers (42) and (44) and the first and second metal foil layers (42) and (44); characterized by having an opening (56) extending through the dielectric layers (48) and (50) package (80). 29. The package (80) of claim 28, wherein the first metal foil layer (42) is for electrical connection (72) with the highly rigid metal lead frame (30). an outer portion extending beyond said first and second dielectric layers (48) and (50); 54) A package (80) comprising: 30. 30. The package (80) of claim 29, wherein the flexible multilayer portion (40) comprises: interconnecting the first, second and third metal foil layers (42, 44) and (46); A package (80) characterized in that it has conductive vias (79). 31. 31. The package (80) of claim 30, wherein the first, second and third Metal foil layers (42, 44) and (46) extend from the electronic device (74) to the said electronic device (74) by a wire bond extending to a metal foil layer (42) of said electronic device (74). A package (80) characterized in that the package (80) is electrically interconnected to. 32. A package (80) adapted to house an electronic device (74). hand a plurality of ribs extending in a cantilevered manner around a centrally located first opening (34); Rigid metal lead frame section (30) with lead fingers (14') and at least one metal foil supported by at least one dielectric layer (48). a flexible multilayer section (40) having a layer (42), the at least one metal layer (42); 2) has a plurality of circuit wires (52) and the metal lead frame with high rigidity. Each metal foil circuit wire (52) is connected to the lead finger (14') of the arm portion (30). and means (72) for individual electrical interconnection. (70); and a small number of said flexible multilayer portions (40) and said rigid metal lead fingers (14'); a molded polymeric resin that provides at least a partial encapsulation; A package (80).
JP2515535A 1989-10-30 1990-10-09 Multilayer lead frame for integrated circuit packages Pending JPH05501939A (en)

Applications Claiming Priority (2)

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US07/429,120 US5025114A (en) 1989-10-30 1989-10-30 Multi-layer lead frames for integrated circuit packages
US429,120 1989-10-30

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US (1) US5025114A (en)
EP (1) EP0500690B1 (en)
JP (1) JPH05501939A (en)
KR (1) KR0184588B1 (en)
AU (1) AU6727490A (en)
CA (1) CA2065295A1 (en)
DE (1) DE69028311T2 (en)
HK (1) HK1008115A1 (en)
PH (1) PH27421A (en)
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PH27421A (en) 1993-06-21
DE69028311T2 (en) 1997-04-03
CA2065295A1 (en) 1991-05-01
US5025114A (en) 1991-06-18
WO1991006978A2 (en) 1991-05-16
AU6727490A (en) 1991-05-31
EP0500690A1 (en) 1992-09-02
HK1008115A1 (en) 1999-04-30
EP0500690B1 (en) 1996-08-28
DE69028311D1 (en) 1996-10-02
EP0500690A4 (en) 1993-05-19
KR0184588B1 (en) 1999-03-20
WO1991006978A3 (en) 1991-06-13

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