JPH0550185B2 - - Google Patents

Description

TECHNICAL FIELD The present invention relates to a monitor device, and particularly to a monitor device that displays data of a plurality of pixels read by a solid-state image sensor at predetermined intervals.

Prior Art Conventionally, as a method for measuring image signals output from an image reading sensor, there is a method in which all image signals continuously output from the image reading sensor are displayed on a display screen of a measuring instrument, and confirmed using this display screen. had been adopted.

However, the amount of image signal data sequentially output from the reading sensor is large, and it is quite difficult to check this on a display, and it takes a lot of time.

Purpose The present invention was made in view of the above-mentioned drawbacks, and extracts the image data read by the reading element at predetermined intervals, and displays the extracted image data at the predetermined intervals. It is an object of the present invention to provide a monitor device that displays data as image data at predetermined intervals within a short period of time so that the overall flow of image data can be grasped visually.

Embodiment An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is an external view of a video monitor device according to an embodiment of the present invention.

The video monitor device of this embodiment has a connector 23,
26, it is connected to an image information reading device and an image information processing device. Part A in the figure is a power switch and ten key switch part, and part B is a mode selection key switch part. These mode selection keys, except for the "SET" key, are illuminated key switches, and an LED is provided at the top right of the key top.
It lights up when the mode is selected, allowing visual confirmation of the currently running mode.

In addition, the upper display section 18 has 7 segments that display the address of image data of a solid-state image sensor (hereinafter abbreviated as CCD) of an image information reading section, which will be described later.
It consists of LEDs, and 19 is a 7-segment LED that displays CCD pixel data.

FIG. 2 shows a block diagram of the video monitor device of this embodiment.

In the figure, 2 is an image information reading device 25 for reading image information converted into a digital signal.
The pixel data output from the CCD is transferred to connector 2.
3, the input buffer received via 1 is as described above.
an output buffer for sending pixel data to the image processing device 28 for processing the pixel data from the CCD; 3 a holding register consisting of a shift register for temporarily holding the pixel data from the input buffer 2; 4 is a read register for reading pixel data in the holding register, and 8 is a read register for reading pixel data in the holding register.
A microcomputer (hereinafter referred to as "microcomputer") that controls the entire monitor device, including display processing of CCD pixel data.
5 is an address register that holds the CCD pixel data read address from CPU 8, 6 is a decimal subtraction counter that counts the 4-digit pixel data read address, 7 is a NAND gate, 9 and 10 are decoders, Reference numerals 18 and 19 are seven-segment LED displays with the same numbers as shown in Fig. 1, 20 is an LED for illuminating the mode selection key shown in Fig. 1, and 11, 12, and 13 are the above-mentioned indicators. 16 is the keyboard of this device; 14 is a driver that transmits the output of the CPU 8 to the keyboard; and 15 is a key input register that transmits the key input state of the keyboard to the CPU 8.
17 is the total number of pixel data for one line in the main scanning direction of the image reading device connected to the connector 23;
That is, it is an address switch for inputting the maximum address to the CPU 8. Further, 25 is an image information reading device that reads image information using a CCD and converts the read analog signal into a digital signal. 23 is inserted or directly connected to the IC to extract pixel data, a clock CLK30 to be described later, and a data load timing signal LDE29.
28 is an image processing device that takes in pixel data and processes image information;
Pixel data is output to the IC socket 27 of the input buffer IC No. 8.

In addition, although the image information reading device and the image processing device are shown as separate devices here, if both devices are integrated, pixel data is read into this device by converting the pixel data read by the CCD from analog to digital. By connecting to a converted buffer IC using an IC clip or the like and extracting various signals, pixel data can be monitored without changing the image information reading section or processing section.

Figure 3 is a diagram schematically showing a CCD.
For each pixel element A, B, C, D... of the CCD, all the pixel elements are numbered 0, 1, 2, 3,... in order from the left end of the diagram, and from now on, this number corresponding to each pixel element is assigned. is called an address.

The operation of this embodiment device is explained below by CPU8 in Figure 4.
This will be explained with reference to the operation control flowchart.
Note that the steps shown in this flowchart are
8 is pre-stored in the built-in memory ROM.

In the video monitor device of this embodiment, the following execution modes are selected and executed using the mode selection switch on the keyboard. There are seven types of execution modes as follows.

1 A mode in which the address of the CCD pixel data is specified and the pixel data at that address is displayed {Fig. 4C} 2 Pixel data of the CCD pixel data from address 0 to the maximum address specified by the address switch 17 is sequentially displayed Display mode {Figure 4 D} 3. Mode that displays maximum and minimum value data of the pixel data from address 0 to the maximum address of the image data of the solid-state imaging device {Figure 4 E} 4. Solid-state imaging A mode that displays a number greater than the specified value in the pixel data from address 0 to the maximum address of the device {Figure 4F} 5 Specify the address of the pixel data of the solid-state image sensor and display the pixel data. A mode in which the data at the same address is read at least once again and the maximum value of the difference between those data and the address are displayed {Figure 4G} 6. Specify the address of the image data of the solid-state image sensor and display the adjacent Mode for displaying the difference from pixel data {Figure 4H} 7 In the low-speed monitor mode, read and display the pixel data for one line in the main scanning direction of the image by any number of pixels for each scan of the image. A mode in which all pixels for one line are displayed by repeating {Fig. 4 I} In addition to the above seven modes, it is executed by pressing the "Average" key of the mode selection keys, and after pressing the "Average" key, it is executed by pressing the numeric keypad. Enter the number of data reads and then select mode 1 to 4 or 6.
There is an average value mode process {shown in FIG. 4K} in which the CPU 8 reads pixel data for one address a specified number of times and uses the average value of the obtained pixel data as the pixel data of that address.

The operation when executing each mode will be explained below with reference to FIG.

As shown in FIG. 4A, when the power of the embodiment device is turned on, initial processing is executed in step 42, various flags and registers are initialized, and then step 42 is performed.
44 mode key input processing is performed, keyboard 16
It has more key input.

The mode key input process in step 44 is shown in FIG. 4B. First, in step 46, mode selection key input data is read from the key input register 15, and as shown in step 48, it is checked whether a new key input operation has been performed, and if there is no new key input, nothing is done. Ends mode key input processing.

If a mode key has been input, the process proceeds to steps 50 and below, and checks which mode key has been input in steps 50 to 64. Then, execution mode processing is performed according to each mode key input.

If there is an "average" key input at step 64, the process advances from step 64 to step 66, where it is checked whether the average flag is set. This is to check whether average value mode processing was performed in the previously executed execution processing mode.If average value mode processing was previously performed and the average flag was set, the average value It is considered as mode release,
The average flag is reset and mode key input processing is ended.

If the average flag is not set in step 66, when average value processing is to be performed in the execution mode processing to be selected from now on, the number of times to read pixel data is input using the numeric keypad, and the step continues until the "SET" key is input. 68 and step 76.

If you do not want to perform average value processing, use “Average” again.
Pressing the key is regarded as canceling, and the process proceeds to step 76, YES, to cancel the average value processing.

When performing average value processing, the operator inputs the number of times to read pixel data using the numeric keypad, and then inputs the "SET" key. When the “SET” key is input, the process advances to step 70, where the CPU 8 inputs the average number of readings for calculating the input average value, and
An average flag is set in step 72, and average value processing is performed during subsequent execution mode processing.

When the "mode 1" key of the mode selection key is input in the mode key input process, the process proceeds from step 50 to step 51, mode 1 process. Details of this mode 1 processing are shown in FIG. 4C.

When the "mode 1" key of the mode selection keys is input, execution mode 1 processing (step 51) is proceeded to, and step 90 is then executed. In step 90,
The CPU 8 receives the decoder 9 from the output ports P6 and P7.
10, display device 18 via drivers 11 and 12;
At step 19, the initial state shown in FIG. 5 is displayed. In this state, the operator inputs the address of the read pixel data of the CCD using the ten keys of the keyboard 16, and after completing the input, presses the "SET" key. CPU8
monitors whether or not the "SET" key is input in step 92, and when the "SET" key is input, inputs the pixel data read address input in step 94, and executes the average value processing in step 80. .

Details of this average value processing are shown in FIG. 4K. In the average value processing, first in step 190 it is checked whether the average flag is set. This is to check whether or not the average value mode process is specified to execute the average value mode process in steps 64 to 76 of the mode key input process, and if the average value mode process is specified and the average flag is set. If so, proceed from step 191 onwards.
If the average value mode processing is not specified, only the reading processing at step 82 is performed. Details of the reading process at step 82 are shown in FIG. 4J.

In the loading process (step 82), first step
At 180, the CPU 8 first outputs the specified pixel data read address from the output port P7 to the address register 5 and decoder 9 as a 4-digit BCD code. The address output to the decoder 9 is decoded by the decoder 9 and automatically displayed on the display 18 via the driver 11. After outputting four digits of address data to the address register, the CPU 8 outputs an address latch enable signal (LE signal) from the output port P8 in step 181, and sets the output address in the address register. The address data set in this address register is synchronized with the CCD address “0” sent from the image information reading device 25.
LDE signal 29 is the load input terminal LD of counter 6
It is preset in the counter 6 at the time when it is input. Further, in step 182, the CPU 8 outputs an output permission signal (high level) from the output port P9 to the NAND gate 7, so that the clock signal CLK30 is applied to the clock input terminal CK of the counter 6.
is input. This CLK30 is a pixel data transfer clock, and is a clock that is output one clock for one pixel data.In synchronization with this CLK30, pixel data is transferred from the image information generating section 25 to the input buffer 2 via the socket 24 and the connector 23. is input to. This transferred pixel data is sequentially stored in the holding register 3 in synchronization with CLK30. When the pixel data is stored in the holding register 3 and the NAND gate 7 is satisfied, the CLK signal is also input to the counter 6, and the counter 6 is counted down in order from the value of the address register 5 preset by the LDE signal 29 mentioned above. . Then, the countdown is performed in order, and the number of CLK signals 30 specified by the address register 5 is input to the counter 6. When the pixel data at the specified address position is input to the holding register 3, the counter 6 outputs a borrow signal BLW31. Output.
This BLW signal 31 serves as an interrupt input (INT) of the CPU 8 and a set signal to the read register 4, and the pixel data at the address position of the CCD specified by the output port P7 of the CPU 8 is reset to the read register 4. CPU8
This becomes an interrupt request for.

After the CPU 8 sets the output port P9 to a high level in step 182, the process proceeds to step 183. The CPU 8 inputs an interrupt request signal to the interrupt terminal INT, and when the pixel data at the desired address is set in the read register 4, an interrupt is generated. Since the request signal is received, the process proceeds to step 184, where the pixel data in the read register 4 is read from the input port P1, and the input pixel data is stored in step 185. Then, the loading process ends.

If the average flag was set in step 190 of average value processing (step 80), the step
Proceeding to step 191, after reading out the average number of times set in step 70 of the mode key input (step 44) process, perform the above-mentioned read process (step 82),
After reading out the pixel data, the process proceeds to step 193, where it is checked whether or not the reading process has been executed for the average number of times read out at step 191. If the reading process has not been performed for the average number of times, the reading process is performed for the average number of times (step 82). Then, in step 194, the pixel data obtained by averaging the pixel data read the average number of times is used as valid pixel data, and the averaging process (step 80) is completed.

Here, the average number of readings and the read pixel data are stored in the RAM built in the CPU 8 (not shown).
(random access memory).

In the above execution mode 1 processing (step 51), when the average value processing in step 80 is completed, the process proceeds to step 96, where the read pixel data is converted into 4-digit data.
Convert to BCD code. Then, the 4-digit BCD code converted in step 97 is output to the decoder 10 from the output port P6 of the CPU 8, and the decoder 10 outputs the 7-segment LED corresponding to the BCD code.
It is converted into a display pattern of the display device and displayed on the display device 19 by the driver 12. Then step
98, wait for 1 second, check whether another execution mode is selected in step 44, execute the hold process in step 84, then return to the average value process in step 80 to update the read pixel data, and press the mode key. In the process (step 44), pixel data is repeatedly read out and display data is updated until the next execution mode is selected.

Here, the hold processing in step 84 will be explained.
Details of this hold processing are shown in FIG. 4L. In the hold process (step 84), it is first checked in step 196 whether or not the "hold" key on the keyboard 16 has been input. If the "hold" key is not input, the process returns directly and ends the process. When the “Hold” key is input, the CPU 8 outputs the “Hold” key illumination LED from the output port P5.
Drive the driver 13 to turn on the
197, wait for the "hold" key to be input again. This is to put the device in a hold state without reading pixel data or updating display data after pressing the "Hold" key. By pressing the "Hold" key again, output port P5 Illuminated LED for “Hold” key
turns off, completes the hold process, and returns.

CPU8 is connected to keyboard 16 from output port P5.
The illumination LED of the upper illuminated key is controlled in the same manner as above for the corresponding LED each time the mode selection key is pressed.

Furthermore, the display data on the displays 18 and 19 maintains the current display state unless updated.

When the “mode 2” key is pressed to execute execution mode 2, mode key input processing (step 44)
The process advances from step 52 to step 53 and executes the mode 2 (step 53) process shown in FIG. 4D.

First, in step 100, the address to be read is set to "0", then in step 80, the above-mentioned average value processing is executed, the pixel data at address 0 is read out, and in step 102, the read pixel data is changed to a 4-digit BCD code. Output port P of CPU8
6 and displayed on the display 19. Then, in step 104, after waiting for 0.5 seconds, the mode key input process in step 44 and the hold process in step 84 are executed. Next, in step 106, it is checked whether the pixel data address currently being displayed is the maximum address specified by the address switch 17, and if it is not the maximum address, the pixel data read address is increased by 1 and the processes from step 80 are repeated. Then, pixel data is displayed sequentially for each address.
When the maximum address and the address of the pixel data being displayed are equal, the process returns to step 100 and pixel data is displayed sequentially from address 0 again.

The maximum address specified by the address switch 17 is determined mainly by the number of pixels of a solid-state image sensor (CCD) in the image information reading device 25.

When you press the “mode 3” key to execute execution mode 3, mode key input processing (step
The process proceeds from step 54 in step 44) to step 55, and the mode 3 processing (step 55 and subsequent steps) shown in FIG. 4E is executed.

First, in step 110, "0" is set as the pixel data read address, and the average value processing in step 80 is executed, and the pixel data at address 0 is first read. Next, in step 112, it is checked whether the pixel data read out is the minimum value, and in step 113, it is checked whether the pixel data is the maximum value, and if it is the maximum value or the minimum value, the maximum or minimum value and Remember that address. In the case of address 0, there is no previous read data, so the value is set to the minimum value. After storing the maximum value, minimum value and their address, and if the maximum value or minimum value is not the same, proceed to step 116, check whether the pixel data has been read up to the maximum address set by the address switch 17, and read it. If not, the address is incremented by 1 in step 118, and steps 80 and subsequent steps are executed in order to process the pixel data at the new address again. After reading all the pixel data, in step 117, the minimum value and its address are displayed on the display 19 and 18, respectively. After that, wait for 1 second in step 119, execute the mode key input process in step 44, and the hold process in step 84, then change the value to the minimum value in step 121, and set the maximum value on the display 1.
At step 9, the address is displayed on the display 18. After waiting for one second in step 122, the mode key input process in step 44 and the hold process in step 84 are executed, and then pixel data is read again from address 0, and the maximum value is updated to the minimum value.

When selecting execution mode 4, press keyboard 16
Press the “Mode 4” key. When the “Mode 4” key is pressed, mode key input processing (step
44) Proceed to step 57 from step 56 in Figure 4 F.
The mode 4 process (step 57) shown in FIG.

In execution mode 4 processing, first, in step 130, the displays 18 and 19 are set to the initial display state as shown in FIG.
Wait for the key to be pressed and input, and when the "SET" key is input, the input reference pixel data is read in step 132, the read reference data is output from the output port P6 of the CPU 8, and the decoder 10 and driver 12 It is displayed on the display 19 via. Then, the designated counter is cleared by setting the pixel read address to "0", and then the average value processing in step 80 is executed. Then, in step 134, it is checked whether the read data is equal to or greater than the set reference data, and only if it is equal to or greater than the reference data, the designated counter is incremented by 1, and in step 136, the read data is determined to be equal to or less than the maximum address designated by the address switch 17, i.e. If reading of all pixel data has not been completed, the address is incremented by 1 in step 138, average value processing is executed in step 80, and processing is performed on the pixel data at the next address. If reading of all pixel data has been completed in step 136, that is, if the maximum address has been read, the process advances to step 137, and the number of pixel data exceeding the specified counter value, that is, the reference data, is read from the output port 7 of the CPU 8. It is displayed on the display 18 via the decoder 9 and driver 11. After continuing the display for 2 seconds in step 139, the mode key input in step 44 and the hold process in step 84 are executed, and the process returns to step 132 to read the pixel data again and update the data.

When executing execution mode 5, press keyboard 16
Press the “Mode 5” key to input. “Mode 5”
When the key is input, the mode key input process (step 44) proceeds from step 58 to step 59, and the mode 5 process shown in FIG. 4G is executed.

First, in step 140, the displays 18 and 19 are set to the initial state as shown in FIG. 5, and in step 141, the system waits for the "SET" key to be input. The operator first inputs the address of the pixel data to be read using the ten keys on the keyboard 16, and then presses the "SET" key. When the “SET” key is input, step 141
The program then proceeds to step 142 to read the input address, output the read address from the output port P7, and display it on the display 18. and step 143
Proceed to the next “SET” key input. After inputting the address, the operator inputs the number of readings using the numeric keypad as described above and presses the "SET" key to specify the number of readings, and the process proceeds from step 143 to step 144, where the input specified number of readings is read. Then, the data reading process in step 82 is performed the specified number of times (step 82 and
loop 146). After reading the specified number of times, the process proceeds from step 146 to step 147, where the maximum value of the difference between the read pixel data is calculated, and the maximum value of the difference between the pixel data calculated at step 148 is sent to the output port P6.
The signal is output to the display 19 via the decoder 10 and driver 12. After the display continues for 2 seconds, the mode key input processing at step 44 and the hold processing at step 84 are executed, and the display returns to step 14 again.
Go back and update the data.

Keyboard 1 when executing execution mode 6
Press and input the "Mode 6" key on the top of the screen. When the “Mode 6” key is pressed and input, the mode input process (Step 44) is executed from Step 60 to Step 61.
Then, the mode 6 process of FIG. 4H is executed.

In mode 6 processing (step 61), first step
At 150, set the display to the initial state shown in Figure 5,
In step 151, the operator presses the ``SET'' key, presses the ``mode 6'' key, selects the mode 6 process, inputs the specified address using the numeric keys of the keyboard 16, and then inputs the ``SET'' key. When the "SET" key is input, the process advances from step 151 to step 152, where the input designated address is read, and the designated address is output from the output port P7 and displayed on the display 18.

Then, execute the average value processing in step 80, read the pixel data at the specified address, and then proceed to step 80.
Add 1 to the specified address at step 154 and proceed to step 80
After executing the average value processing and reading out the pixel data at the specified address +1 address, the difference between the two read pixel data is determined in step 156, and the difference determined in step 157 is outputted from the output port P6 of the CPU 8. It is displayed on the display 19. Subsequent steps
149, the display continues for 2 seconds on the display 19, and then the mode key input processing in step 44 and the step
Execute 84 hold processing. and step
Returning to step 144, the pixel data difference is updated.

Keyboard 1 when executing execution mode 7
6 Press and input the "low speed" key above. When the “low speed” key is input, mode key input processing (step
44) During execution step 62, the process advances to step 63 and executes the low speed mode process shown in FIG.

In the low-speed mode processing (step 63), the operator first enters an arbitrary number of pixels and the keyboard 16 in step 160.
Input from the numeric keypad above and press the “SET” key. Operator enters the number of pixels and press “SET”
When the key is input, the process advances from step 160 to step 161, where the input specified number of pixels is read, and then at step 162, the maximum address specified by the address switch 17 is divided by the input specified number of pixels.
If the quotient is not an integer, round it up to the nearest whole number. Let this counting result be N. and step
Proceed to step 163 and set the start address to “0”.
In step 164, the start address is set to the pixel data read address, and in step 80, average value processing is executed, pixel data corresponding to the address value is read out, and in step 166, the read pixel data is displayed on the display 19. Then step 167
After waiting for 0.5 seconds at step 44, mode key input processing and step 84 hold processing are executed.
Subsequently, in step 169, the value N obtained in step 162 is added to the read address. and step 170
It is checked whether the address to which N is added is less than the maximum address specified by the address switch 17, and if it is less than the maximum address, the process returns to step 80, where the pixel data of the new address value is determined and displayed. If the address in step 170 is greater than or equal to the maximum address, proceed to step 171 and increment the start address by 1, check whether the added start address is greater than or equal to the maximum address in step 172, and if it is greater than or equal to the maximum address, proceed to step 163. Returning, the start address is set to "0" again and the following process is performed. If the start address is not greater than or equal to the maximum address, the process proceeds to step 164, where this start address is set as the pixel data read address and the following process is executed.

As explained above, by processing the output signal after A/D conversion of the pixels of the solid-state image sensor (CCD) using the microcomputer (CPU 8), the desired pixel density level can be digitally displayed with high precision and at high speed. I can do it.

By selecting and executing execution mode 1
Pixel data at the address specified by the CCD is immediately digitally displayed on the display. Therefore, rapidly changing pixel data at the required address can be easily read, sequentially specified, and measured. By using this, it is possible to know the shedding characteristic of the light source in the image reading device, and it is possible to correct the light source and pixel data based on this shedding characteristic.

By selecting and executing execution mode 2, pixel data is sequentially displayed in address order. This mode allows the operator to measure pixel data without specifying addresses. Furthermore, measurement is easy because CCD pixel data such as a video signal that changes at high speed is displayed at predetermined time intervals. Moreover, since the pixel data to be displayed is displayed in the order of the addresses, the pixel data covering the entire address range can be grasped.

By selecting and executing execution mode 3, the maximum value and minimum value of the pixel data for one line in the main scanning direction of the image and their addresses are displayed. This eliminates the need for the operator to sample all five pixel data. Also, by measuring the maximum and minimum values, the dynamic range of the CCD can be determined, which can be useful for image processing.

By selecting and executing execution mode 4, pixel data greater than the specified value is displayed. Therefore, when an image reading device is connected to an image processing device such as a printer, it is possible to very easily measure the correlation between the original document density, pixel data value, and print density, and this can be used as correction data. By using this, highly accurate correction can be easily performed.

By selecting and executing execution mode 5, pixel data at a specified address can be read a specified number of times, and the maximum value of the difference between the pixel data can be displayed. Using this data, it is possible to measure variations in CCD pixel data reading and A/D conversion, and the resolution of image density can be determined very easily.

By selecting and executing execution mode 6
It is possible to measure the difference between adjacent bits at the address specified by the CCD. By measuring this in a certain section of one line of image reading, it can be used to improve the reading accuracy of the shading of the original, focus the light incident on the CCD surface, etc.

By selecting and executing execution mode 7 (low speed mode), pixel signals that are read out at high speed are sampled every several tens to hundreds of pixels (N determined in step 162) and displayed. Changes in the data signal can be reduced to 1/N and displayed. This allows the flow of pixel data signals to be visually monitored.

Additionally, in averaging processing, the pixel data is averaged by reading the pixel data a specified number of times for a certain address and treating the averaged value as the pixel data at that address, which eliminates the problem of temporal variations in pixel data. . By eliminating the problem of temporal variations in reading in this way, it is possible to measure changes over time in the light source luminous intensity of the image reading device, the light receiving sensitivity of the CCD, etc.

In addition, by pressing the "hold" key during execution of each mode processing to enter the hold mode, the contents displayed at that time maintain their state. By using this mode, it is possible to temporarily stop the display contents that change at regular intervals and easily perform recording, etc.

Furthermore, in this embodiment, the pixel data capture is pin compatible with an IC such as a pixel data latch on the image reading device board, so that the flow of pixel data on the image reading device board is not stopped.

It is also possible to return the captured pixel data onto the board, and it goes without saying that it is also possible to use a single input/output connector and connect it to an IC chip on the image reading device board with a clip or the like.

It goes without saying that each input/output signal may be connected to an individual clip, which can be easily connected to an IC leg or an IC clip, in the same way as a logic analyzer, etc., instead of a connector. FIG. 6 shows an example in which individual clips are used for sending and receiving input/output signals. In the figure, 201a to 201e are individual clips.

Effects of the Invention As explained above, according to the present invention, image data can be read at predetermined intervals, and the image data from the reading element can be displayed as image data at predetermined intervals within a short time, thereby displaying the image data as a whole. You can visually grasp the outline of the flow of image data.

[Brief explanation of drawings]

FIG. 1 is an external view of a monitor device according to an embodiment of the present invention, FIG. 2 is a block configuration diagram of the device of this embodiment,
Fig. 3 is a diagram schematically representing a solid-state image sensor (CCD), Figs. 4 A to L are a control flowchart of the device of this embodiment, and Fig. 5 shows the initial display state of the display section of the device of this embodiment. The figure shown in FIG. 6 is a diagram showing another example of the input/output connector of the device of this embodiment. In the figure, 3...hold register, 4...read register, 5...address register, 6...
Counter, 8... Microcomputer (CPU), 16... Keyboard, 17... Address switch, 18, 19... Display, 20... Keyboard LED group, 23, 26... Connector, 2
5... Image reading device.

Claims (1)

[Scope of Claims] 1. Input means for inputting data of a plurality of pixels read by a reading element; Extraction means for extracting at predetermined intervals the plurality of pixel data input by the input means; Pixel data by the extraction means A monitor device comprising: a setting means for setting a data extraction interval; and a display means for displaying pixel data at a predetermined interval extracted by the extraction means.