JPH0550175B2 - - Google Patents

Info

Publication number
JPH0550175B2
JPH0550175B2 JP58054117A JP5411783A JPH0550175B2 JP H0550175 B2 JPH0550175 B2 JP H0550175B2 JP 58054117 A JP58054117 A JP 58054117A JP 5411783 A JP5411783 A JP 5411783A JP H0550175 B2 JPH0550175 B2 JP H0550175B2
Authority
JP
Japan
Prior art keywords
loop
signal
priority
transmission right
signal block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58054117A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59178843A (ja
Inventor
Hiroshi Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP58054117A priority Critical patent/JPS59178843A/ja
Priority to EP83112151A priority patent/EP0111277B1/en
Priority to DE8383112151T priority patent/DE3382313D1/de
Priority to CA000442460A priority patent/CA1201784A/en
Publication of JPS59178843A publication Critical patent/JPS59178843A/ja
Priority to US06/824,035 priority patent/US4627051A/en
Publication of JPH0550175B2 publication Critical patent/JPH0550175B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H04L12/427—Loop networks with decentralised control
    • H04L12/433—Loop networks with decentralised control with asynchronous transmission, e.g. token ring, register insertion

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)
  • Small-Scale Networks (AREA)
JP58054117A 1982-12-03 1983-03-30 ル−プネツトワ−クにおける優先権制御方式 Granted JPS59178843A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP58054117A JPS59178843A (ja) 1983-03-30 1983-03-30 ル−プネツトワ−クにおける優先権制御方式
EP83112151A EP0111277B1 (en) 1982-12-03 1983-12-02 Loop network system controlled by a simple clock station
DE8383112151T DE3382313D1 (de) 1982-12-03 1983-12-02 Ringnetzsystem gesteuert durch eine einfache taktstation.
CA000442460A CA1201784A (en) 1982-12-03 1983-12-02 Loop network system controlled by a simple clock station
US06/824,035 US4627051A (en) 1982-12-03 1986-01-30 Loop network system controlled by a simple clock station

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58054117A JPS59178843A (ja) 1983-03-30 1983-03-30 ル−プネツトワ−クにおける優先権制御方式

Publications (2)

Publication Number Publication Date
JPS59178843A JPS59178843A (ja) 1984-10-11
JPH0550175B2 true JPH0550175B2 (enrdf_load_stackoverflow) 1993-07-28

Family

ID=12961650

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58054117A Granted JPS59178843A (ja) 1982-12-03 1983-03-30 ル−プネツトワ−クにおける優先権制御方式

Country Status (1)

Country Link
JP (1) JPS59178843A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01112846A (ja) * 1987-10-26 1989-05-01 Nec Corp 伝送路アクセス制御回路

Also Published As

Publication number Publication date
JPS59178843A (ja) 1984-10-11

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