JPH0546153A - Display controller - Google Patents

Abstract

PURPOSE:To reduce the cost required for a VRAM and to reduce the occupation area of the VRAM by suppressing an increase in the capacity of the VRAM of the display controller which displays blinking characters on the screen of a CRT, etc. CONSTITUTION:The display controller which displays characters on the screen is provided with a character code storage means 1 stored with plural character codes, a character data storage means 3 which is stored with plural character data corresponding to character codes and outputs the character data corresponding to character codes outputted from the character storage means 1, and a blinking control means 5 which discriminates whether or not the character codes are to be blinked according to the character codes outputted from the character code storage means 1; and the character codes themselves include information about whether or not the character codes are blinked.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display control device, and more particularly to a display control device for displaying a blinking character on the screen of a CRT or the like. In recent years, on-screen displays that display characters and figures on CRTs, etc.
In a controller (OSDC: display control device), blink display is used as a method for emphasizing characters or the like to be displayed. Further, it is desired to further simplify the display control device having the blink function.

[0002]

2. Description of the Related Art Conventionally, an on-screen display controller (OSDC) has been provided for displaying characters such as characters and figures on the screen of a CRT or the like. In such a display control device, blink display is used to emphasize the displayed character.

Specifically, for example, in a home-use video camera, the letters "BATTERY" and the image of the battery shape are made to blink to warn of the remaining capacity of the battery, or
When making a program reservation for a home video tape recorder, it is performed to check the operation point by blinking the reservation time, the channel, and the like.

[0004]

As described above, in the conventional display control device, the blink function is used to emphasize the character to be displayed. by the way,
As one method for realizing such a blink function, there is a method of designating a blink for each screen. However, an application that blinks all one screen is not actually used and is not practical.

Actually, the characters for blink display are limited to specific characters and images, and these characters are almost always used for blinking when used. Therefore, a code (blink designating bit) indicating whether or not to blink for each character (image) is provided for each character in addition to the character code, and blinking is performed by the blinking code in the code read from the VRAM. It is designed to determine whether or not.

FIG. 6 is a diagram showing a configuration of an example of a character code applied to a conventional display control device. As shown in the figure, conventionally, each character is defined by, for example, 7-bit codes CB00 to CB06,
In addition to the 7-bit character codes CB00 to CB06, a blink designating bit BB for designating whether to blink the character is further added.
Here, although a plurality of character codes are stored in the VRAM, if a 1-bit blink designation bit BB is further added to the 7-bit character code CB00 to CB06, a plurality of character codes will be stored. The capacity of the VRAM for storing the code must be increased, which not only increases the cost of the VRAM but also increases the area of the VRAM.

In view of the problems of the above-described conventional display control device, the present invention suppresses an increase in the capacity of the VRAM, reduces the cost required for the VRAM, and reduces the VRA.
The purpose is to reduce the area occupied by M.

[0008]

According to the present invention, there is provided a display control device for displaying a character on a screen, which corresponds to the character code storage means 1 for storing a plurality of character codes and the plurality of character codes. A plurality of character data stored therein, and character data storage means 3 for outputting character data corresponding to the character code output from the character code storage means 1,
And a blink control means 5 for determining whether the character code output from the character code storage means 1 is to blink or not, and whether the character code blinks to itself or not. Provided is a display controller characterized in that it includes information.

[0009]

According to the display control device of the present invention, the blink control means 5 determines from the character code output from the character code storage means 1 whether or not the character code should be blinked. Here, the character code includes information on whether or not to perform blinking, and it is not necessary to add a bit for designating blinking. As a result, it is possible to prevent the capacity of the character code storage means 1 from increasing.

[0010]

Embodiments of the display control device according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a display control device according to the present invention. As shown in the figure, the display control device includes a VRAM 1, a character code latch unit 2, a CGROM 3, a blink cycle counter 4,
The blink control unit 5 and the screen display control unit 6 are provided.

The VRAM 1 holds a character code for one screen, is composed of an area for 288 (24 × 12) characters, and stores a character code corresponding to the character to be displayed in each character area. It is supposed to be done. Here, the character is not limited to a character, and for example, one image may be displayed in an area of two characters or four characters.

The character code latch unit 2 is a VRAM.
The character codes CB0 to CB6 read from 1 are latched, and CGROM (character generator RO
The character code is output to M) and the blink information (S1) included in the character code itself indicating whether or not to blink is output to the blink control unit 5. The CGROM 3 is a ROM that holds various character data (character data or image data)
For example, one character is made up of 12 × 18 dots and holds the dot image data.

The blink cycle counter 4 is a counter for counting the blink cycle, and outputs a blink signal BLNK which defines the timing of the blink by counting a predetermined number of vertical synchronization signals VSYNCX. Specifically, this blink cycle counter 4
For example, it is composed of a 6-bit counter and outputs a blink signal BLNK at a cycle of about 1 second. That is, about 0.5 seconds (vertical synchronization signal VSYNCX × 32)
The blink signal BLNK is switched to 0/1 every time. Here, for example, the blink signal BLNK =
0 corresponds to the off period of the character display, and the blink signal BLNK = 1 corresponds to the on period of the character display.

The blink control unit 5 takes the logic of the blink information S1 output from the character code latch unit 2 and the blink signal BLNK output from the blink cycle counter 4 and outputs the blink control signal S2 to the screen display control unit 6. When the character code output to VRAM1 is for blinking, the corresponding character is turned on / off for a predetermined time (for example, about 0.5 seconds). The screen display control unit 6 is C
The character data CHRD from the GROM 3 is received, and, for example, a normal or blinking character is combined with a photographed image or an image of a predetermined background color and displayed on the display device.

FIG. 2 is a diagram showing a configuration of an example of a character code applied to the display control device of the present invention. As shown in the figure, the character code applied to the display control device of the present invention is, for example, a 7-bit code CB0-
Specified by CB6. The blink information indicating whether or not to perform the blink is indicated by, for example, the upper 3 bits CB0, CB1 and CB2 of the character code, and when the upper 3 bits CB0 to CB2 are all "1". It is designed to blink. As a result, the conventional character code CB00 shown in FIG.
The blink designation bit BB added to CB06 can be omitted.

FIG. 3 shows a VR in the display control device of the present invention.
It is a figure which shows the structure of an example of AM. As shown in the figure, the VRAM1 has a 7-bit character code CB0.
~ CB6 only, the upper 3 of the character code
Blinking is performed when the bits CB0 to CB2 are all "1". That is, in the VRAM1, the character code stored in the area in which the upper 3 bits CB0 to CB2 of the character code are all "1" is assumed to correspond to the character for blink display, and the other area, that is, the upper area. 3-bit CB0
The character code stored in the area in which at least one bit is "0" in CB2 is set to correspond to a character for normal display.

FIG. 4 is a circuit diagram showing an example of the blink control section in the display control device of the present invention, and FIG. 5 is a timing chart for explaining an example of the operation in the display control device of the present invention. As shown in FIG. 4, the blink controller 5 includes a 3-input AND gate 51 and a 2-input AND gate 52, and the upper 3 bits CB0 to CB2 of the character code are supplied to each input of the AND gate 51. The output (S1 _N, S1 _B ) of the AND gate 51 and the blink signal BLNK which is the output of the blink cycle counter 4 are supplied to the input of the AND gate 52.

That is, as shown in FIG.
The upper 3 bits CB0 to CB2 of the Kuta code are all "1"
When (high level), the output of the AND gate 51 is at a high level.
Le (S1_B) And blink from the AND gate 52
Blink control signal S2 corresponding to the cycle of the signal BLNK
(S2_B) Is supplied to the screen display control unit 6.
ing. On the other hand, the upper 3 bits of the character code CB0
~ At least one of CB2 is "0" (low level)
At this time, the output of the AND gate 51 is low level (S1 _N) When
And the AND gate 52 always blinks at a low level.
Control signal S2 (S2_N) Is supplied to the screen display control unit 6.
Will be. Here, the screen display control unit 6 blinks.
Control signal is low level (S2_N) Of the character
The display is continuously displayed, and the blink control signal has a high level.
Le (S2_B), The character is not displayed
To control it.

In the above embodiment, the bit designating whether or not to perform blinking is the upper 3 bits of each character code.
However, the present invention is not limited to this, and the blink control unit 5 can have various configurations other than the circuit shown in FIG.

[0020]

As described above in detail, according to the display control device of the present invention, it is not necessary to add a blink designating bit for each character other than the character code to indicate whether or not to blink. Therefore, it is possible to suppress an increase in the capacity of the VRAM and reduce the cost required for the VRAM.
The area occupied by the VRAM can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a display control device according to the present invention.

FIG. 2 is a diagram showing a configuration of an example of a character code applied to the display control device of the present invention.

FIG. 3 is a diagram showing a configuration of an example of a VRAM in the display control device of the present invention.

FIG. 4 is a circuit diagram showing an example of a blink control unit in the display control device of the present invention.

FIG. 5 is a timing chart for explaining an example of an operation in the display control device of the present invention.

FIG. 6 is a diagram showing a configuration of an example of a character code applied to a conventional display control device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Character code storage means (VRAM) 2 ... Character code latch section 3 ... Character data storage means (CGROM) 4 ... Blink cycle counter 5 ... Blink control section 6 ... Screen display control section

Front page continued (72) Inventor Satoshi Genma 2-6-1, Marunouchi, Chiyoda-ku, Tokyo Inside Fujitsu Device Co., Ltd.

Claims (5)

[Claims] 1. A display control device for displaying a character on a screen, comprising a character code storage means (1) for storing a plurality of character codes, and a plurality of character data corresponding to the plurality of character codes. A character data storage means (3) for outputting character data corresponding to the character code output from the character code storage means, and the character code blinking from the character code output from the character code storage means. And a blink control means (5) for determining whether or not the character code contains the information as to whether or not the character code should blink. 2. The display control device according to claim 1, wherein each of the character codes specifies whether or not a predetermined bit of the character code blinks. 3. The display control device according to claim 2, wherein the bit designating whether or not to perform blinking is a predetermined upper bit of each character code. 4. The blink control means (5) latches a signal (BLNK) output by counting a predetermined number of vertical synchronization signals (VSYNCX) and a character code output from the character code storage means. By taking a logic with the output of the character code latch unit (2),
Turn on / off the display of the character that blinks.
The display control device according to claim 1, wherein the display control device is adapted to be turned off. 5. The display control device according to claim 1, wherein the character that blinks is a predetermined character or graphic that is determined in advance.