JPH0546112U - IC for tuner and IC chip for tuner - Google Patents

IC for tuner and IC chip for tuner

Info

Publication number
JPH0546112U
JPH0546112U JP101457U JP10145791U JPH0546112U JP H0546112 U JPH0546112 U JP H0546112U JP 101457 U JP101457 U JP 101457U JP 10145791 U JP10145791 U JP 10145791U JP H0546112 U JPH0546112 U JP H0546112U
Authority
JP
Japan
Prior art keywords
tuner
circuit
intermediate frequency
terminals
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP101457U
Other languages
Japanese (ja)
Inventor
正彦 斎藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alps Alpine Co Ltd
Original Assignee
Alps Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alps Electric Co Ltd filed Critical Alps Electric Co Ltd
Priority to JP101457U priority Critical patent/JPH0546112U/en
Publication of JPH0546112U publication Critical patent/JPH0546112U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】 【目的】 出力される不要信号が少なく、混信やビ−ト
障害を生じないチュ−ナ用ICを簡単な構成で実現す
る。 【構成】 チュ−ナ用IC21には、接地端子5を挟ん
で一方の側に周波数混合回路26の出力端子6,7を設
け、他方の側に中間周波増幅回路27の入力端子3,4
を設ける。またチュ−ナ用ICチップ31には周波数混
合回路32と中間周波増幅回路33との間に、接地線路
35または電力供給線路36を布設する。
(57) [Summary] [Purpose] To realize a tuner IC with a simple configuration that outputs few unnecessary signals and does not cause interference or beat failure. The tuner IC 21 is provided with output terminals 6 and 7 of a frequency mixing circuit 26 on one side of the ground terminal 5 and input terminals 3 and 4 of an intermediate frequency amplifier circuit 27 on the other side.
To provide. Further, a ground line 35 or a power supply line 36 is laid between the frequency mixing circuit 32 and the intermediate frequency amplifier circuit 33 on the tuner IC chip 31.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

この考案はチュ−ナ用ICおよびチュ−ナ用ICチップに関し、特に周波数混 合回路と中間周波増幅回路とを内蔵したチュ−ナ用ICに好適な構造を提供する ものである。 The present invention relates to a tuner IC and a tuner IC chip, and particularly provides a structure suitable for a tuner IC having a frequency mixing circuit and an intermediate frequency amplifier circuit built therein.

【0002】[0002]

【従来の技術】[Prior Art]

図2は、VHF帯およびUHF帯のテレビ放送を、ス−パ−ヘテロダイン方式 で受信するチュ−ナ用IC41の一例であるフィリップス社製のTDA5332 T型ICの内部ブロックおよび端子配列を示すものである。 FIG. 2 shows the internal block and terminal arrangement of a TDA5332 T-type IC manufactured by Philips, which is an example of a tuner IC 41 that receives VHF band and UHF band television broadcasts by a super-heterodyne system. is there.

【0003】 図2において、1ないし20はIC41の端子配列順に付けられた端子番号で ある。IC41において、入力端子18,19から入力されるVHF帯の受信信 号は、VHF増幅回路22で増幅され、VHF混合回路42に入力される。VH F混合回路42にはVHF発振回路24から局部発振波が入力され、VHF混合 回路42において、受信信号は中間周波信号に変換されて端子13,14に出力 される。In FIG. 2, 1 to 20 are terminal numbers assigned in the order of terminal arrangement of the IC 41. In the IC 41, the VHF band received signal input from the input terminals 18 and 19 is amplified by the VHF amplifier circuit 22 and input to the VHF mixing circuit 42. A local oscillation wave is input from the VHF oscillating circuit 24 to the VHF mixing circuit 42, and the received signal is converted into an intermediate frequency signal in the VHF mixing circuit 42 and output to the terminals 13 and 14.

【0004】 また、入力端子16,17から入力されるUHF帯の受信信号は、UHF増幅 回路23で増幅され、UHF混合回路43に入力される。UHF混合回路43に はUHF発振回路25から局部発振波が入力され、UHF混合回路43において 、受信信号は中間周波信号に変換されて端子13,14に出力される。Further, the received signals in the UHF band input from the input terminals 16 and 17 are amplified by the UHF amplification circuit 23 and input to the UHF mixing circuit 43. A local oscillation wave is input to the UHF mixing circuit 43 from the UHF oscillating circuit 25, and in the UHF mixing circuit 43, the received signal is converted into an intermediate frequency signal and output to the terminals 13 and 14.

【0005】 ここで、VHF発振回路24とUHF発振回路25とは、バンドスイッチ28 から出力される切換信号により、いずれか一方が動作状態にされ、他方が非動作 状態にされて、受信信号の周波数帯が選択される。Here, one of the VHF oscillating circuit 24 and the UHF oscillating circuit 25 is activated by the switching signal output from the band switch 28, and the other is inactivated, so that the reception signal A frequency band is selected.

【0006】 端子13,14に出力される中間周波信号は、選択すべきテレビ放送チャンネ ルの中間周波信号以外に、これに隣接するチャンネルの中間周波信号や、高周波 信号,局部発振波などの不要信号を含んでいる。そこで、IC41の外部に中間 周波フィルタ(図示せず)を設けて、中間周波信号に含まれた不要信号を除去し た後、端子11,12から再びIC41に入力して、中間周波増幅回路27で増 幅し、端子9,10から出力する。The intermediate frequency signals output to the terminals 13 and 14 are not required to be the intermediate frequency signal of the TV broadcasting channel to be selected, the intermediate frequency signal of the adjacent channel, the high frequency signal, or the local oscillation wave. Includes a signal. Therefore, an intermediate frequency filter (not shown) is provided outside the IC 41 to remove unnecessary signals contained in the intermediate frequency signal, and then input to the IC 41 from the terminals 11 and 12 again, and the intermediate frequency amplifier circuit 27 To increase and output from terminals 9 and 10.

【0007】 なお、端子1,3および4〜7は共振回路を接続する端子である。また接地端 子20は、平衡型に構成された入力端子16〜19に対して設けられた高周波入 力回路の接地端子である。もう一つの接地端子2は、IC41内部に布設された 接地線路(図示せず)をIC41外部の接地線路に接続する接地端子である。The terminals 1, 3 and 4 to 7 are terminals for connecting the resonance circuit. The ground terminal 20 is a ground terminal of a high-frequency input circuit provided for the balanced-type input terminals 16 to 19. The other ground terminal 2 is a ground terminal that connects a ground line (not shown) laid inside the IC 41 to a ground line outside the IC 41.

【0008】[0008]

【考案が解決しようとする課題】[Problems to be solved by the device]

上記のように、IC41は機能が異なる複数の高周波回路を備えており、それ ぞれの高周波回路で扱う信号の周波数も異なっている。そこで、チュ−ナをディ スクリ−ト部品で構成する場合には、内部を導電性の区隔壁で仕切ったシ−ルド ケ−ス内の個々の区隔に各回路を収納して、各回路間の容量結合や磁界結合を防 いでいる。しかしチュ−ナをICで構成する場合には、各回路を導電性の区隔壁 で仕切ることは実用上不可能である。 As described above, the IC 41 includes a plurality of high frequency circuits having different functions, and the frequencies of the signals handled by the respective high frequency circuits are different. Therefore, when the tuner is composed of disc parts, each circuit is housed in each compartment in a shield case whose interior is partitioned by electrically conductive partition walls. Prevents capacitive coupling and magnetic field coupling between them. However, when the tuner is composed of an IC, it is practically impossible to partition each circuit with conductive partition walls.

【0009】 そこで従来は、IC41を設計するに際し、各回路間の結合をできるだけ小さ くするようにICペレット上の回路配置を工夫したり、また各回路を平衡型にす ると共に平衡線路で接続するなどして解決を図っていた。しかしIC内部では回 路間が接近せざるを得ず、各回路間のストレ−容量が大きく、各回路間の結合を 十分に小さくすることはできなかった。また理想的な平衡線路を実現することも 困難であると共に、中間周波増幅回路の負荷を不平衡型で設計することが多い現 状では、不平衡型の負荷の影響で、中間周波増幅回路およびその前段回路の平衡 状態がくずれて、障害となる結合が生じやすかった。Therefore, conventionally, when designing the IC 41, the circuit arrangement on the IC pellet is devised so that the coupling between the circuits is made as small as possible, or each circuit is made a balanced type and connected by a balanced line. I was trying to solve it. However, the circuits had to be close to each other inside the IC, and the storage capacitance between the circuits was large, and the coupling between the circuits could not be made sufficiently small. In addition, it is difficult to realize an ideal balanced line, and under the present circumstances where the load of the intermediate frequency amplifier circuit is often designed as an unbalanced type, the influence of the unbalanced type load causes The equilibrium state of the circuit at the preceding stage collapsed, and it was easy to cause an obstructive coupling.

【0010】 各回路間の結合のうち最も問題になるのは、VHF混合回路42およびUHF 混合回路43の出力線路が、ストレ−容量によって中間周波増幅回路27の入力 線路に結合することである。そしてこの結合が大きいと、中間周波増幅回路27 に入力される信号は不要信号を多く含んだものとなり、端子9,10からは不要 信号が多く出力され、混信やビ−ト障害を生じるという問題があった。The most problematic coupling among the circuits is that the output lines of the VHF mixing circuit 42 and the UHF mixing circuit 43 are coupled to the input line of the intermediate frequency amplifier circuit 27 by the storage capacitance. If this coupling is large, the signal input to the intermediate frequency amplifier circuit 27 contains a large amount of unnecessary signals, and a large amount of unnecessary signals are output from the terminals 9 and 10, causing interference and beat interference. was there.

【0011】 そこで、この考案の目的は、出力される不要信号が少なく、混信やビ−ト障害 を生じないチュ−ナ用ICおよびチュ−ナ用ICチップを簡単な構成で実現する ことにある。Therefore, an object of the present invention is to realize a tuner IC and a tuner IC chip with a simple configuration, which outputs few unnecessary signals and does not cause interference or beat failure. ..

【0012】[0012]

【課題を解決するための手段】[Means for Solving the Problems]

第1の考案によるチュ−ナ用ICは、接地端子を挟んで一方の側に周波数混合 回路の出力端子を配設し、他方の側に中間周波増幅回路の入力端子を配設したも のである。 In the tuner IC according to the first invention, the output terminal of the frequency mixing circuit is arranged on one side and the input terminal of the intermediate frequency amplifying circuit is arranged on the other side of the ground terminal. ..

【0013】 また、第2の考案によるチュ−ナ用ICチップは、周波数混合回路を設けた第 1の領域と中間周波増幅回路を設けた第2の領域との間に、接地線路および電力 供給線路の少なくとも一方を布設したものである。In the tuner IC chip according to the second invention, the ground line and the power supply are provided between the first region in which the frequency mixing circuit is provided and the second region in which the intermediate frequency amplifier circuit is provided. At least one of the tracks is laid.

【0014】[0014]

【作用】[Action]

チュ−ナ用ICにおいては、周波数混合回路の出力端子と中間周波増幅回路の 入力端子とは、それらの間に設けた接地端子によって容量結合や磁界結合が減少 し、またチュ−ナ用ICチップにおいては、第1に領域と第2の領域とは、それ らの間に布設した接地線路または電力供給線路によって容量結合や磁界結合が減 少する。 In the tuner IC, the output terminal of the frequency mixing circuit and the input terminal of the intermediate frequency amplifier circuit have capacitive coupling and magnetic field coupling reduced by the ground terminal provided therebetween, and the IC chip for the tuner is also provided. In the first area and the second area, the capacitive coupling and magnetic field coupling are reduced by the ground line or the power supply line laid between them.

【0015】[0015]

【実施例】【Example】

図1(A)に第1の考案による一実施例としてIC21の端子配置と主要回路 ブロック間の信号の流れを示す。図1(A)において図2における回路ブロック と同等の機能の回路ブロックには同じ符号を付けて詳細な説明を省略する。なお 符号1ないし20は端子の配列順に付けられた端子番号であり、図2に示したI C41の端子番号には対応していないが、この考案に関係のない端子については 説明を省略する。また、より詳細な回路ブロックは、この出願と同一出願人の出 願による特開平3−216027号公報の第3図のものと同等である。 FIG. 1A shows a terminal arrangement of the IC 21 and a signal flow between main circuit blocks as an embodiment according to the first invention. In FIG. 1A, the circuit blocks having the same functions as the circuit blocks in FIG. 2 are designated by the same reference numerals, and detailed description thereof will be omitted. It should be noted that reference numerals 1 to 20 are terminal numbers assigned in the arrangement order of the terminals and do not correspond to the terminal numbers of the IC 41 shown in FIG. 2, but the description of the terminals not related to the present invention will be omitted. A more detailed circuit block is the same as that shown in FIG. 3 of Japanese Patent Laid-Open No. 3-216027 filed by the same applicant as this application.

【0016】 図1(A)に示したチュ−ナ用IC21は、特開平3−216027号公報に も記載されているように、周波数混合回路(以下、混合回路という)26が、V HF帯のテレビ放送を受信する場合とUHF帯のテレビ放送を受信する場合とで 共用される。この混合回路26から出力される中間周波信号は、出力端子6,7 から出力され、IC21の外部に設けられた中間周波フィルタ(図示せず)で不 要信号を除去された後、入力端子3,4から再びIC21に入力され、中間周波 増幅回路29で増幅され、出力端子1,2から出力される。In the tuner IC 21 shown in FIG. 1A, as described in Japanese Patent Laid-Open No. 3-216027, a frequency mixing circuit (hereinafter referred to as a mixing circuit) 26 has a VHF band. It is shared between the case of receiving the TV broadcast of and the case of receiving the UHF band TV broadcast. The intermediate frequency signal output from the mixing circuit 26 is output from the output terminals 6 and 7, and after unnecessary signals are removed by an intermediate frequency filter (not shown) provided outside the IC 21, the input terminal 3 , 4 again to be input to the IC 21, amplified by the intermediate frequency amplifier circuit 29, and output from the output terminals 1 and 2.

【0017】 IC21において、接地端子5はIC21内の接地線路をIC21外部の接地 線路に接続するものであって、出力端子6,7と入力端子3,4の間に設けられ ている。したがって出力端子6,7と入力端子3,4とはそれらの間にO電位の 電界が存在し、出力端子6,7と入力端子3,4とが、直接に容量結合すること が阻止され、また磁界結合も減少する。In the IC 21, the ground terminal 5 connects the ground line inside the IC 21 to the ground line outside the IC 21, and is provided between the output terminals 6 and 7 and the input terminals 3 and 4. Therefore, an electric field of O potential exists between the output terminals 6 and 7 and the input terminals 3 and 4, and direct capacitive coupling between the output terminals 6 and 7 and the input terminals 3 and 4 is prevented, Also, magnetic field coupling is reduced.

【0018】 次に、図1(B)に第2の考案による一実施例としてICチップ31の要部を 示し、図1(B)に基いて第2の考案によるチュ−ナ用ICチップについて説明 する。Next, FIG. 1B shows a main part of an IC chip 31 as one embodiment according to the second invention. Based on FIG. 1B, the tuner IC chip according to the second invention will be described. explain.

【0019】 図1(B)において、31はICチップであって、例えば単結晶シリコンのウ ェハに回路が形成されている。すなわち、32は混合回路26が形成された第1 の領域、33は中間周波増幅回路27が形成された第2の領域、34は他の回路 が形成された第3の領域である。20および1ないし7はボンディングパッドで あって、図1(A)に示したIC21の同じ符号で示した端子に接続される。In FIG. 1B, reference numeral 31 is an IC chip, for example, a circuit is formed on a wafer of single crystal silicon. That is, 32 is a first region in which the mixing circuit 26 is formed, 33 is a second region in which the intermediate frequency amplifier circuit 27 is formed, and 34 is a third region in which other circuits are formed. Reference numerals 20 and 1 to 7 are bonding pads, which are connected to the terminals indicated by the same reference numerals of the IC 21 shown in FIG.

【0020】 35は一部を省略して図示した接地線路であって、ボンディングパッド6,7 とボンディングパッド3,4との間に設けられたボンディングパッド5に一端が 接続され、第1の領域32と第2の領域33の間に布設されてICチップ31の 中央部に延設されている。また、36は一部を省略して図示した電力供給線路で あって、一端がボンディングパッド20に接続され、他端が第2の領域33と第 3の領域34の間に布設されている。Reference numeral 35 denotes a ground line, a part of which is omitted, and one end of which is connected to a bonding pad 5 provided between the bonding pads 6 and 7 and the bonding pads 3 and 4, and which is a first region. It is laid between the second region 33 and the second region 33 and extends in the central portion of the IC chip 31. Reference numeral 36 is a power supply line shown with a part omitted, one end of which is connected to the bonding pad 20 and the other end of which is provided between the second region 33 and the third region 34.

【0021】 この電力供給線路36は、常套手段としてICチップ31上において、および IC21の外部回路において、中間周波信号に対するインピ−ダンスが十分に小 さい大容量のコンデンサ(図示せず)を介して接地線路35に接続されているの で、中間周波信号に対して接地線路35と同等に機能する。したがって第1の領 域32と第2の領域33とを、電力供給線路36で区隔しても良い。The power supply line 36 is, as a conventional means, on the IC chip 31 and in an external circuit of the IC 21 via a large-capacity capacitor (not shown) having a sufficiently small impedance to an intermediate frequency signal. Since it is connected to the ground line 35, it functions similarly to the ground line 35 for intermediate frequency signals. Therefore, the first area 32 and the second area 33 may be separated by the power supply line 36.

【0022】[0022]

【考案の効果】[Effect of the device]

チュ−ナ用IC21は、混合回路26の出力端子6,7と中間周波増幅回路2 7の入力端子3,4とが接地端子5によって区隔され、チュ−ナ用ICチップ3 1は、中間周波増幅回路27を設けた第2の領域33が、接地線路35または電 源供給線路36によって第1の領域32および第3の領域34と区隔されている ので、端子間および回路間の容量結合は、実用上で無視できる程度の僅かなもの である。 In the tuner IC 21, the output terminals 6 and 7 of the mixing circuit 26 and the input terminals 3 and 4 of the intermediate frequency amplifier circuit 27 are separated by the ground terminal 5, and the tuner IC chip 3 1 has an intermediate portion. Since the second region 33 provided with the frequency amplifier circuit 27 is separated from the first region 32 and the third region 34 by the ground line 35 or the power supply line 36, the capacitance between terminals and between circuits is reduced. Coupling is negligible in practice.

【0023】 したがってこの考案によれば、たとえ回路や線路が理想的な平衡状態でなくて も、出力端子1,2から不要信号が出力されることがなく、このチュ−ナ用IC 21またはチュ−ナ用ICチップ31を用いて受信機を構成すれば、混信やビ− ト障害を生じることがないという効果が得られる。Therefore, according to the present invention, even if the circuit or the line is not in an ideal balanced state, an unnecessary signal is not output from the output terminals 1 and 2, and the tuner IC 21 or the tuner is not output. -If the receiver is configured using the IC chip 31 for the radio, it is possible to obtain the effect of not causing interference or bit failure.

【図面の簡単な説明】[Brief description of drawings]

【図1】 (A)第1の考案の一実施例を示す構成図である。 (B)第2の考案の一実施例を示す要部図面である。FIG. 1A is a configuration diagram showing an embodiment of a first device. (B) It is a principal part drawing which shows one Example of a 2nd invention.

【図2】従来のチュ−ナ用ICの構成図である。FIG. 2 is a configuration diagram of a conventional tuner IC.

【符号の説明】[Explanation of symbols]

3,4 入力端子 5 接地端子 6,7 出力端子 21 チュ−ナ用IC 26 周波数混合回路 27 中間周波増幅回路 31 チュ−ナ用ICチップ 32 第1の領域 33 第2の領域 35 接地線路 36 電力供給線路 3,4 Input terminal 5 Ground terminal 6,7 Output terminal 21 Tuner IC 26 Frequency mixing circuit 27 Intermediate frequency amplification circuit 31 Tuner IC chip 32 First area 33 Second area 35 Ground line 36 Power Supply line

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】 中間周波信号を出力する周波数混合回路
と、中間周波フィルタを通過した前記中間周波信号を入
力するように構成された中間周波増幅回路とを備えたチ
ュ−ナ用ICであって、該チュ−ナ用IC内部に布設さ
れた接地線路に接続した接地端子を挟んで一方の側に前
記周波数混合回路の出力端子を配設し、他方の側に前記
中間周波増幅回路の入力端子を配設したことを特徴とす
るチュ−ナ用IC。
1. A tuner IC comprising: a frequency mixing circuit for outputting an intermediate frequency signal; and an intermediate frequency amplifying circuit configured to input the intermediate frequency signal passed through an intermediate frequency filter. An output terminal of the frequency mixing circuit is disposed on one side of the ground terminal connected to a ground line laid inside the tuner IC, and an input terminal of the intermediate frequency amplifier circuit on the other side. An IC for a tuner, characterized in that
【請求項2】 周波数混合回路を設けた第1の領域と中
間周波増幅回路を設けた第2の領域との間に接地線路お
よび電力供給線路の少なくとも一方を布設したことを特
徴とするチュ−ナ用ICチップ。
2. A tubing characterized in that at least one of a ground line and a power supply line is laid between a first region provided with a frequency mixing circuit and a second region provided with an intermediate frequency amplifier circuit. IC chip for computer.
JP101457U 1991-11-13 1991-11-13 IC for tuner and IC chip for tuner Pending JPH0546112U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP101457U JPH0546112U (en) 1991-11-13 1991-11-13 IC for tuner and IC chip for tuner

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP101457U JPH0546112U (en) 1991-11-13 1991-11-13 IC for tuner and IC chip for tuner

Publications (1)

Publication Number Publication Date
JPH0546112U true JPH0546112U (en) 1993-06-18

Family

ID=14301229

Family Applications (1)

Application Number Title Priority Date Filing Date
JP101457U Pending JPH0546112U (en) 1991-11-13 1991-11-13 IC for tuner and IC chip for tuner

Country Status (1)

Country Link
JP (1) JPH0546112U (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5530210A (en) * 1978-08-25 1980-03-04 Hitachi Ltd Transistor amplifier circuit
JPS60124954A (en) * 1983-12-09 1985-07-04 Fujitsu Ltd Transistor
JPS637007A (en) * 1986-06-27 1988-01-12 Sharp Corp Frequency conversion circuit
JPH01194707A (en) * 1987-12-18 1989-08-04 Rockwell Internatl Corp Active low-pass filter device
JPH01198808A (en) * 1988-02-03 1989-08-10 Sharp Corp Frequency mixer
JPH02215209A (en) * 1989-02-16 1990-08-28 Matsushita Electric Ind Co Ltd Microwave low noise converter
JPH0341806A (en) * 1989-07-07 1991-02-22 Sharp Corp Fet mixer circuit

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5530210A (en) * 1978-08-25 1980-03-04 Hitachi Ltd Transistor amplifier circuit
JPS60124954A (en) * 1983-12-09 1985-07-04 Fujitsu Ltd Transistor
JPS637007A (en) * 1986-06-27 1988-01-12 Sharp Corp Frequency conversion circuit
JPH01194707A (en) * 1987-12-18 1989-08-04 Rockwell Internatl Corp Active low-pass filter device
JPH01198808A (en) * 1988-02-03 1989-08-10 Sharp Corp Frequency mixer
JPH02215209A (en) * 1989-02-16 1990-08-28 Matsushita Electric Ind Co Ltd Microwave low noise converter
JPH0341806A (en) * 1989-07-07 1991-02-22 Sharp Corp Fet mixer circuit

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