JPH0541680A - Echo canceller dealing with circuit slip - Google Patents

Abstract

PURPOSE:To obtain the echo canceller dealing with circuit slip capable of eliminating an echo signal even when the data is deviated by one sample cycle. CONSTITUTION:The echo canceller is provided with first delay devices 7 and 8 delaying an transmission-side input signal by two taps, an H register 12 holding the tap coefficient value of the echo canceller, second delay devices 9 and 10 delaying the tap coefficient value of the H register by two taps when sum of products of a reception-side input signal is taken, three subtracters 15, 16, and 17 subtracting a pseudo echo signal from two outputs of the first delay device and a transmission-side input signal, a level comparator 18 comparing the level of the three output results, and a changeover circuit 11 deciding whether or not sum of products with an X register 13 is taken by performing the delay of the H register taking sum of products based on the decision result of the level by how many taps.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to an echo canceller.

[0002]

2. Description of the Related Art Conventionally, this type of echo canceller 1 '
Is a subtractor 17, calculation circuit 14, H (tap coefficient value holding) register 12, X register 13, tap coefficient correction circuit 19, transmission side input terminal 3, reception side output terminal 4, transmission side output terminal 5, reception side It consists of an input terminal 6 and an echo path 2
Of the echo canceller 1 ′, an X register 13, a tap coefficient correction circuit 19, an H register 12 and a calculation circuit 14 in the echo canceller 1 ′ generate a pseudo echo signal, and a subtracter 17 generates a pseudo echo signal and an actual echo. There was a method of canceling the actual echo signal by taking the difference from the signal.

The operation will be described below. The signal transmitted from the far-end talker on the communication line is
Due to impedance mismatch in the transformer circuit, it becomes an echo and returns to the far-end speaker. In order to cancel this echo signal, the echo canceller 1'of FIG. 2 is used.
In general, the echo path 2 that wraps around can be regarded as a stationary linear path. Therefore, if the impulse response of the echo path 2 is h (i) (i = 0, 1, 2, ..., N-1), the actual echo signal Y (j) at time j is the received signal x.
From (j), it can be expressed by the following mathematical formula 1.

[0004]

[Equation 1]

An echo path model having the same characteristics as this is generated inside the echo canceller 1 '. When the impulse response inside the echo canceller 1'which generates the pseudo echo signal Y '(j) is expressed by using h' (i), it can be expressed by the following formula 2.

[0006]

[Equation 2]

When h (i) = h '(i) holds,
Y (j) = Y '(j), and the echo signal Y (j) is erased. This is the echo canceller algorithm. In order to realize this, the input signal sent from the far-end talker side is input from the reception side input terminal 6, the signal is held in the X register 13, and the H register 12 holds
The impulse response is stored as a tap coefficient, the product h ′ (i) × (j−i) of each tap is calculated by the calculation circuit 14, and the N products are summed. The value obtained here is Y '(j) above, and based on the output result of the calculation circuit 14, the echo signal Y input from the transmission side input terminal 3 is obtained.
Subtractor 17 subtracts (j). The calculation result of the subtracter 17 is transmitted to the output terminal 5 on the transmission side and is sent out of the circuit as a signal in which the echo signal is erased. The output of the H register 12, the difference signal of the calculation result of the subtractor 17, and the output of the X register 13 are input to the tap coefficient correction circuit 19.
The output of the tap coefficient correction circuit 19 is the H register 12
The h '(i) above is made as close as possible to h (i) by modifying the type coefficient inside. Thus, the echo signal Y (j) is erased as much as possible.

[0008]

However, in the above-mentioned echo canceller 1 ', when the data is deviated by one sample period due to the jitter caused in the digital line or the slip caused by the variation of the annual delay,
The pseudo echo signal is significantly different from the true echo signal, the estimation operation in the H register 12 must be performed, and it takes a considerable time to complete the correction. As a result, there is a drawback in that the echo signal is significantly wraparound immediately after the slip occurs.

An object of the present invention is to provide a line-slip compatible echo canceller capable of removing an echo signal even if data is deviated by one sample period due to a slip caused by a jitter occurring in a digital line or an annual delay variation. is there.

[0010]

According to the present invention, an echo signal generated from a signal transmitted from the far-end talker side is erased by adaptively changing the tap coefficient in accordance with the impulse response of the echo path. In the echo canceller, a first delay device that delays the input signal on the transmission side by two taps, a tap coefficient value holding register that holds the tap coefficient value of the echo canceller, and a tap function when calculating the sum of products of the input signal on the reception side A second delay device for delaying the tap coefficient value of the numerical value holding register by two taps, three subtractors for subtracting the pseudo echo signal from the two outputs of the first delay device and the transmission side input signal, and three outputs How many tap delays the level comparator that compares the level of the result and the tap coefficient value holding register that takes the product sum according to the judgment result of the level and the product sum with the X register An echo canceller is obtained, characterized in that it comprises a switching circuit for determining.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIG. 1, a line slip compatible echo canceller 1 according to an embodiment of the present invention includes a delay device 7 for delaying a signal input from a transmission side input terminal 3 by one sample period. The delay device 8 outputs the output signal of the delay device 7 to 1
Delay by the sample period. H register tap delay device 9
And 10 each have a tap coefficient of 1 in the H register 12.
Delay tap. The switching circuit 11 is the level comparator 1
From the result of 8, the tap number of the coefficient value of the H register 12 is determined. The H register 12 estimates the echo path 2 and holds tap coefficient values of its impulse response for N taps. The X register 13 receives the signal input from the reception side input terminal 6 (for the number of taps +
Hold the data of 1). The calculation circuit 14 is the H register 1
The product of 2 and the contents of the X register 13 is calculated for each tap, and the sum of products for N taps is calculated. Subtractor 1
Reference numeral 7 subtracts the output signal of the calculation circuit 14 from the signal received from the transmission side input terminal 3. The subtractor 16 subtracts the output signal of the calculation circuit 14 from the signal after the signal received from the transmission side input terminal 3 passes only the delay device 7. Subtractor 15
Subtracts the output signal of the calculation circuit 14 from the signal received from the input terminal 3 on the transmission side and passed through the delay units 7 and 8. The level comparator 18 compares the calculation results of the subtracters 15, 16 and 17 with each other and outputs the comparison result to the switching circuit 1.
The delay coefficient is output to 1, and the tap coefficient of the H register 12 is not shifted, the delay unit 9 delays by 1 tap, and the delay units 9 and 10 delay by 2 taps.
The tap coefficient correction circuit 19 uses the difference signal transmitted to the transmission side output terminal 5 and the value of the X register 13 to make the H register 1
The tap coefficient value in 2 is brought closer to the impulse response of the echo path 2.

The operation of the echo canceller 1 of FIG. 1 will be described below. The signal transmitted from the far-end speaker is received by the receiving-side input terminal 6, held in the X register 13, and transmitted to the receiving-side output terminal 4. The signal output from the transmission-side output terminal 4 passes through the echo path 2 and is input to the transmission-side input terminal 3. This becomes an echo signal. The signal is applied to the subtractor 17 as it is, the signal applied to the subtractor 16 after being delayed by one sample by the delay device 7, and the signal applied to the delay devices 7 and 8 to 2
It is divided into three echo signals including the signal delayed by the sample and given to the subtractor 15. On the other hand, the calculation circuit 14
Is the tap coefficient value in the H register 12 and the X register 13
The product with the value of is calculated for each tap, and the sum of products for N taps is calculated. Subtractors 15, 16 and 17
Subtracts the output result of the calculation circuit 14 from each of the three echo signals. In standard time, the result of the subtractor 16 is transmitted to the output terminal 5 on the transmission side. Further, using the result of the subtracter 16 and the value of the X register 13, the tap coefficient correction circuit 19
Then, the tap coefficient of the H register 12 is corrected to bring the tap coefficient value of the X register 13 closer to the impulse response of the echo path 2. By the way, at this time, the one-sample period data may be shifted due to a jitter or a slip caused by an annual delay variation on the digital line. When this slip phenomenon occurs, the echo canceller 1 determines that the echo path 2 has remarkably changed, and starts correction of the tap coefficient again. It will take a considerable amount of time to complete the modification. However, when the slip phenomenon actually occurs, the deviation occurs around one sample. That is, if the impulse response h '(i) inside the echo canceller 1 is sufficiently equal to the impulse response h (i) of the echo path 2, the actual echo signal Y (j) at time j is Almost coincides with any one of the pseudo echo signals Y '(j), Y' (j-1), and Y '(j-2) represented by Equations 3, 4, and 5, respectively. Should be there.

[0013]

[Equation 3]

[0014]

[Equation 4]

[0015]

[Equation 5]

That is, in the echo canceller 1, the signal Y (j-1) obtained by delaying Y (j) by one sample is used in the standard time for the calculation and estimation, and the data is forwarded by the slip. If it is shifted to Y, the echo signal should be canceled by subtracting Y '(j), and if the data is shifted to the rear, subtracting Y' (j-2). In order to realize the principle, in the echo canceller 1 of the present invention, the input signal from the transmission side input terminal 3 is output to Y (j), Y (j-1), Y (j- It is divided into 3 types of 2), and at the standard time, a signal obtained by delaying the tap coefficient value in the H register 12 by one sample is given to the calculation circuit 14, and the output signal of the calculation circuit 14 and Y ′ represented by the following formula 6 are given. Subtraction with (j) is performed by the subtractors 15, 16 and 17, and the level comparison is performed by the level comparator 18.

[0017]

[Equation 6]

If a slip phenomenon occurs on the line, the output level of the subtractor 17 becomes the lowest if the slip occurs forward, and the output level of the subtracter 15 if it occurs backward. It will be the lowest. If the output level of the other subtractor becomes lower than the output level of the subtractor 16, the correction operation of the H register 12 of the echo canceller is temporarily stopped, the level of several tens of samples is detected, and the level of the subtractor 15 is detected. When is the lowest, the value of the H register 12 is delayed by one sample only once, and the calculation circuit 14 is caused to perform the operation of the following formula 7.

[0019]

[Equation 7]

When the level of the subtractor 17 is the lowest, the value of the H register is not delayed once, and the calculation circuit 14 is made to perform the operation of the following formula 8.

[0021]

[Equation 8]

After that, the same operation as the normal route is performed, and the H register 12 is delayed by one sample to perform an operation with the tap coefficient value of the H register 12. The subtracter 16 subtracts the echo signal to remove the echo signal. Send the signal from.
Then, the tap coefficient is corrected using this difference signal, and the echo signal is erased while performing the correction operation. In this case, the data of N + 1 taps are actually held inside the X register 13, but the tap coefficient is forcibly set to 0 for the terms for which the sum of products cannot be obtained. If this is done, some errors will occur for a moment, but the difference will be extremely small, and if the correction is repeated, it will hardly affect the value.

[0023]

As described above, according to the present invention, when one sample period data is deviated due to the jitter caused in the digital line or the slip caused by the variation in the annual delay, the pseudo echo is remarkably different from the actual echo signal. As a result of solving the disadvantage that the estimation operation in the H register has to be performed and the correction takes a considerable amount of time, the echo signal of the echo signal is remarkably increased immediately after the slip occurs. This has the effect of solving the drawback of wraparound.

[Brief description of drawings]

FIG. 1 is a block diagram of a line slip capable echo canceller according to an embodiment of the present invention.

FIG. 2 is a block diagram of a conventional line-slip-enabled echo canceller. 1 Echo Canceller 2 Echo Path 3 Transmitter Input Terminal 4 Receiver Output Terminal 5 Transmitter Output Terminal 6 Receiver Input Terminal 7,8 Delay Device 9,10 H Register Tap Delay Device 11 Switching Circuit 12 H Register 13 X Register 14 Calculation Circuits 15, 16, 17 Subtractor 18 Level comparator 19 Tap coefficient correction circuit.

Claims (1)

[Claims] 1. An echo canceller for adaptively changing a tap coefficient according to an impulse response of an echo path and canceling an echo signal generated from a signal transmitted from a far-end talker side, wherein an input signal of a transmission side is set to 2 A first delay device for delaying the tap, a tap coefficient value holding register for holding the tap coefficient value of the echo canceller, and a tap coefficient value of the tap coefficient value holding register for tapping 2 taps when the sum of products of the reception side input signal is taken. A second delay device for delaying the first delay device;
Of the output of the delay device and three subtractors that subtract the pseudo echo signal from the input signal on the transmission side, a level comparator that compares the levels of the three output results, and a tap that takes the sum of products according to the judgment results of the levels An echo canceller having a switching circuit that determines how many tap delays are made to a coefficient value holding register and a product sum with the X register is taken.