JPH0541615A - Amplifier circuit - Google Patents

Abstract

PURPOSE:To provide an amplifier circuit provided with a circuit which detects a steep phase change in a FET amplifier and controls an input signal level so as to prevent a spread spectrum at an output terminal from affecting the adjacent channel when a multi-valued PSK modulation wave is amplified. CONSTITUTION:The circuit is provided with a field effect transistor (FET) amplifier 2, a gate current detection circuit 6 provided on the gate terminal 5 of the FET amplifier 2 and an input signal level control circuit 7 controlling the input signal level of the FET amplifier 2 to avoid a steep phase change by the FET amplifier 2, thereby reducing the influence on the adjacent channel.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an amplifier circuit for amplifying a modulated wave in a digital communication device without phase distortion.

[0002]

2. Description of the Related Art In recent years, in digital radio communication equipment such as portable telephone equipment, transmission amplifiers are required to have high output and high efficiency and low phase distortion, and especially phase distortion is regarded as a problem. A conventional amplifier circuit will be described below with reference to the drawings.

As shown in FIG. 4, the input signal is the input terminal 2
The signal is input from 1 and amplified by a field effect transistor (hereinafter abbreviated as FET) amplifier 22 and then output from an output terminal 23. Here, the FET amplifier 22 has a drain terminal 24 and a gate terminal 25 for inputting and outputting a DC power source.

The operation of the amplifier circuit using the FET configured as described above will be described below.

First, the FET amplifier 22 generally operates sufficiently even if the voltage of the drain terminal 24 is low, the DC power consumption efficiency of the amplifier with respect to the output power is good, and the distortion characteristic is excellent, so that the FET amplifier 22 is suitable for portable telephone devices and the like. It is used frequently. In order to use the FET amplifier 22 efficiently, F
The voltage of the gate terminal 25 of ET, that is, the operating voltage is used near the pinch-off voltage (class AB or class B). Further, in the amplitude characteristic, a linear compensating circuit (for example, see Japanese Patent Publication No. 2-206906) is used as a linear amplifier.

[0006]

However, in the above-mentioned conventional configuration, an excessive multi-value PS is input to the input terminal of the FET amplifier.
When a K-modulated signal is input, the amplitude and phase of the FET amplifier become non-linear, the spectrum at the output terminal spreads, and there is a problem in that it interferes with an adjacent channel.

The present invention solves the above-mentioned conventional problems. When amplifying a multilevel PSK modulated wave, a steep phase change of the FET amplifier is detected so that the spread of the spectrum at the output terminal does not affect the adjacent channel. It is an object of the present invention to provide an amplifier circuit including a circuit for controlling the input signal level.

[0008]

In order to achieve the above object, an amplifier circuit of the present invention comprises a circuit for detecting a gate current of an FET amplifier and an input signal of the FET amplifier according to the value of the gate current of the FET amplifier. It has a structure for controlling the level.

[0009]

In the above structure, when amplifying a multilevel PSK modulated wave, a steep phase change of the FET amplifier is detected,
By controlling the input signal level of the amplifier, the spread of the spectrum at the output terminal prevents interference with the adjacent channel.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, an input signal is input from the input terminal 1, amplified by the FET amplifier 2, and then output from the output terminal 3. Here, the FET amplifier 2 has a drain terminal 4 and a gate terminal 5 for inputting and outputting a DC power source.
The gate terminal 5 of the FET amplifier 2 is provided with a gate current detection circuit 6 for detecting a DC gate current. Further, an input signal level control circuit 7 is provided to control the input signal level of the FET amplifier 2 according to the current value obtained by the gate current detection circuit 6.

The operation of the amplifier circuit configured as described above will be described below with reference to FIGS. 1, 2 and 3.

As shown in FIG. 1, the input signal input from the input terminal 1 is controlled in gain by the input signal level control circuit 7, and the AC signal is input from the input side of the FET amplifier 2 and amplified. Output from the output terminal 3 on the output side. Here, a DC power supply for operating the FET amplifier 2 is added to the drain terminal 4 and the gate terminal 5.

Next, FIG. 2 shows the input / output characteristics of the FET amplifier, showing the output power, the gate current, and the phase change with respect to the input power. When the input power of the FET amplifier 2 is increased, a large amount of negative gate current starts to flow near the point (a) on the horizontal axis, and the negative gate current of the FET becomes maximum at the point (b). Input power was further increased from point (b) (c)
It can be seen that at the points, the phase changes sharply.

Next, FIG. 3 shows the relationship between the input power of the FET amplifier and the gate current. The gate current at the input power (near point (a) in FIG. 2) shown by the solid line is the drain-gate voltage. However, in the case of the input signal indicated by the broken line (near point (c) in FIG. 2), the gate-source voltage is momentary, but it is applied in the positive direction at point (d), resulting in a large positive current. You can see that is flowing. The phase changes greatly in accordance with this phenomenon.

As described above, according to the present embodiment, by providing the control circuit 7 for detecting the gate current of the FET amplifier 2 by the current detection circuit 6 and controlling the input signal level of the FET amplifier according to the gate current value, It is possible to avoid the steep phase change of the FET amplifier.

In order to prevent a large positive current from flowing to the gate side of the FET amplifier circuit 2 and causing a large phase change, it is an effective method to make the gate current detecting circuit 6 have a peak current detecting function.

Further, depending on the gate current value, the FET amplifier 2
Instead of controlling the input signal level of the FET amplifier 2, a gain varying circuit for controlling the input signal level is provided, or separately, a level varying circuit for controlling the level of the baseband signal input to the input side of the FET amplifier 2 is provided. A circuit may be provided.

[0019]

As is apparent from the above description of the embodiments, the present invention is an FET for amplifying a multilevel PSK modulated wave.
The gate current of the amplifier 2 is detected by the gate current detection circuit,
By providing the control circuit for controlling the input signal level of the FET amplifier by the gate current value, it is possible to realize an excellent amplifier circuit that can avoid the steep phase change of the FET amplifier and reduce the influence on the adjacent channel.

[Brief description of drawings]

FIG. 1 is a block diagram of an amplifier circuit according to a first embodiment of the present invention.

FIG. 2 is an input / output characteristic diagram of the FET amplifier of the same embodiment.

FIG. 3 is a gate current characteristic diagram of the FET amplifier of the same embodiment.

FIG. 4 is a block diagram of a conventional amplifier circuit.

[Explanation of symbols]

 2 FET amplifier 4 Drain terminal 5 Gate terminal 6 Gate current detection circuit 7 Input signal level control circuit

Claims (4)

[Claims] 1. A field effect transistor amplifier, and a current detection circuit for detecting a DC gate current of the field effect transistor amplifier. The input signal level input to the field effect transistor amplifier is controlled according to a DC gate current value. An amplifier circuit that is arranged to do so. 2. The amplifier circuit according to claim 1, wherein the current detection circuit for detecting the DC gate current has a peak current detection function. 3. The amplifier circuit according to claim 1, further comprising a gain variable circuit for controlling an input signal level on the signal input side of the field effect transistor. 4. The amplifier circuit according to claim 1, further comprising a level variable circuit for controlling the level of a baseband signal input to the field effect transistor.