JPH0541613A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To suppress the deterioration in the detection sensitivity and the increase in detection noise when the semiconductor integrated circuit formed by integrating a low noise amplifier and a detector is activated by a single power supply. CONSTITUTION:A circuit connected to ground to a ground plane 12 through a transmission line 15 whose length is 1/4 wavelength with respect to an operating frequency and a capacitor 21 is provided on the input terminal 14 of a diode 6 and a DC ground extract terminal 22 of the diode 6 is drawn out between the transmission line 15 and the capacitor 21. At the time of mounting of an IC, the DC ground leading out terminal 22 and a DC ground plane 17 are connected by a gold wire and a source of a FET of the low noise amplifier 1 is connected to the DC ground plane 17 via a bias resistor 16 giving a self- bias. The bias current of the diode 6 does not pass through the bias resistor of the FET to avoid deterioration in the detection sensitivity and the increase in noise.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit, and more particularly to a circuit configuration of a receiver in a microwave integrated circuit which operates in a super high frequency band.

[0002]

2. Description of the Related Art FIG. 5 is an equivalent circuit diagram showing an example of a conventional semiconductor integrated circuit. FIG. 6 is an equivalent circuit diagram when the conventional semiconductor integrated circuit of FIG. 5 is mounted in a package. Hereinafter, a conventional example will be described in detail with reference to FIGS. In FIG. 5, reference numeral 1 denotes, for example, a gallium arsenide field effect transistor (hereinafter, GaAsFET)
And a low noise amplifier composed of an input and output matching circuit composed of a transmission line such as a microstrip line and a bias circuit composed of a resistor and a capacitor, and 2 is a high frequency input terminal (hereinafter, RF input terminal), Reference numeral 3 is a drain bias terminal of the low noise amplifier 1, and 4 is a gate bias terminal. The output of the low noise amplifier 1 is connected to the cathode of the diode 6 via the interstage capacitor 5. The anode of the diode 6 is connected to the diode bias terminal 8 via the diode bias resistor 7, the ground plane 12 via the capacitor 9, and further connected to the detection output terminal 11 via the capacitor 10. Usually, the circuit elements such as 1 to 11 are formed monolithically on an integrated circuit substrate such as gallium arsenide (hereinafter, GaAs). In addition, the source of the low noise amplifier 1 and the ground plane 12 formed on the back surface of the GaAs substrate from the capacitor 9 are electrically connected via a via hole portion 13 penetrating the GaAs substrate. Further, the diode 6 has a length of about ¼ wavelength of a desired frequency band of the integrated circuit from the input end 14 thereof, and is connected by a via hole portion 13 via a transmission line 15 such as a microstrip line. It is configured to be connected to the ground 12.

In FIG. 6, 1 to 15 are the same parts as in FIG. Low noise amplifier 1 when mounting a semiconductor integrated circuit
When a single power supply is operated, the DC grounding surface 1 which is a package housing is connected from the grounding surface 12 through the bias resistor 16.
7 (hereinafter, DC ground plane). Further, in the package, the ground plane 12 is formed by the capacitor 18 having a capacitance value that sufficiently lowers the impedance in the frequency band used.
(Hereinafter, RF ground plane) and DC ground plane 17 are equivalently connected. The capacitor 18 may have a structure of, for example, a DC ground plane 17-insulating layer-RF ground plane 12 configured in the package.

The gate bias terminal 4 is connected to the DC ground plane 17 by using a gold wire or a gold ribbon.

Next, the operation will be described. When the low noise amplifier 1 shown in FIG. 6 is used in, for example, a system of a single power source having only a positive power source, it is possible to apply a gate bias voltage to the gate bias terminal 4 in a self-generated manner by the drain current of a GaAsFET. A bias resistor 16 is inserted between the DC ground plane 17 and the RF ground plane 12. As a result, a high frequency signal such as a microwave (hereinafter referred to as an RF signal) input from the RF input terminal 2 is amplified by the low noise amplifier 1 that operates as a single power source, and the diode 6 is passed through the interstage capacitor 5. Is transmitted to the input terminal 14 of the. Drain current Id of GaAs FET
The resistance value R _GB of the bias resistor 16 that determines s can be obtained by the following equation (1) with the required gate bias voltage Vgs.

[0006]

[Equation 1]

For example, the GaAs FET of the low noise amplifier 1
In this case, the resistance value R _GB usually has a resistance value of 10 ohms to 100 tens ohms. In addition, since the capacitor 18 formed in the package has a capacitance value of about several tens of pF, R at a frequency above the microwave band
The F ground plane 12 may be regarded as an equipotential plane when viewed from the DC ground plane 17 and the RF signal. However, in terms of direct current, Vg
Since it has a potential difference of s, it is possible to obtain a desired amplifier operation. On the other hand, a forward bias voltage is applied to the diode 6 from the diode bias terminal 8 through the diode bias resistor 7 in order to improve the detection sensitivity of the RF signal. This forward bias current If is applied to the diode bias resistor 7, the diode 6, and λ.
They flow through the / 4 transmission line 15 and the bias resistor 16, respectively. At the input end 14 of the diode 6, the transmission line 15 is considered to be open in terms of RF, the RF signal is detected by the diode 6, the high frequency carrier frequency component is grounded by the capacitor 9, and the detected signal is transmitted via the capacitor 10. It appears between the detection output terminal 11 and the DC ground plane 17.

[0008]

Since the conventional semiconductor integrated circuit is configured as described above, when the low noise amplifier 1 is mounted so as to operate with a single power source, the bias resistor 16 is provided on the source side of the FET. Since a diode bias current also flows through the bias resistor 16 because of the problem that the reception sensitivity is extremely lowered and the detection noise is also increased, it is not practical to use a single power supply. It was possible.

The present invention has been made in order to solve the above problems, and lowers the receiving sensitivity even if a semiconductor integrated circuit in which a low noise amplifier and a detection circuit are integrated is operated by a single power source. It is an object of the present invention to provide a semiconductor integrated circuit having a circuit configuration that can be actually operated without the detection noise being suppressed.

[0010]

In a semiconductor integrated circuit according to the present invention, the other end of a transmission line connected to the input end of a diode and having a length of ¼ wavelength of the operating frequency band is connected via a capacitor. R common to FET source of noise amplifier
The circuit configuration is such that it is connected to the F ground plane and the DC ground lead terminal of the diode is provided between the transmission line and the capacitor.

An inductor or a resistor is used instead of the transmission line.

[0012]

In the present invention, the circuit configuration is such that the DC ground lead-out terminal of the diode is connected between the capacitor and the transmission line or inductor or resistor connected to the input end of the diode. In the case of mounting so as to operate as a power supply, the diode forward bias current If of the diode is grounded by grounding the diode DC grounding lead-out terminal and the DC grounding plane with a gold wire.
It is possible to apply without passing through the bias resistance of the sFET. Therefore, it is possible to suppress the detection noise caused by the bias resistance of the GaAsFET and to operate the single power supply without lowering the receiving sensitivity.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is an equivalent circuit diagram showing a semiconductor integrated circuit according to a first embodiment of the present invention. Further, FIG. 2 is an equivalent circuit diagram at the time of mounting the semiconductor integrated circuit of the first embodiment mounted in a package.

The present embodiment will be described in detail below with reference to the drawings. In FIG. 1, 1 to 15 indicate the same parts as in the conventional example, and the circuit elements and terminals connected to the low noise amplifier 1 are also the same as in the conventional example. From the input end 14 of the diode 6, the length of the desired frequency band is approximately ¼ wavelength, and the transmission line 1 such as a microstrip line is used.
5 and a capacitor 21 having, for example, a metal-insulating film-metal (hereinafter, MIM) structure are sequentially connected, and are connected to the ground plane 12 of the semiconductor substrate through a via hole portion 13. Furthermore, between the transmission line 15 and the capacitor 21,
A DC grounding lead-out terminal 22 of the diode is provided and configured.

In FIG. 2, 16 to 18 indicate the same parts as in the conventional example. At the time of mounting the semiconductor integrated circuit of this embodiment,
When operating with a single power supply, the connections of 16 to 18 are the same as in the conventional example. In addition to the conventional example, the DC grounding lead-out terminal 22 of the diode 6 is configured to be connected to the DC grounding surface 17 which is, for example, a package housing by using, for example, a gold wire or a gold ribbon.

Next, the operation will be described. The amplifying action of the RF signal input from the RF input terminal 2 by the low noise amplifier 1 and the transmission to the input end 14 of the diode 6 are the same as in the conventional example. On the other hand, a forward bias voltage If is applied to the diode 6 from the diode bias terminal 8 through the diode bias resistor 7, and the forward bias current If is transmitted to the diode bias resistor 7, the diodes 6, and the transmission line of λ / 4. 15, the DC grounding lead-out terminal 22 of the diode 6 and the DC grounding surface 17 respectively. As a result, the RF signal is detected by the diode 6 to which the bias voltage is applied in the forward direction, the high frequency carrier frequency component is grounded by the capacitor 9, and the detected signal is detected by the capacitor 10 via the detection output terminal 11 and the DC ground plane. Appears between 17 and.

FIG. 3 is an equivalent circuit diagram in the state where the semiconductor integrated circuit according to the second embodiment of the present invention is mounted in a package. In this figure, 1 to 14 and 16 to 1
8, 21 and 22 show the same parts as in the first embodiment.
Reference numeral 23 is an inductor, which connects between the input end 14 of the diode 6 and the capacitor 21, and is provided with a DC grounding lead-out terminal 22 of the diode 6 between the inductor 23 and the capacitor 21. The quarter-wavelength transmission line 15 shown in the first embodiment is normally used in the frequency band higher than the C band, but in the C band and lower, the wavelength becomes long, so that it can be handled as a lumped constant circuit element. The inductor 23 is used. The forward bias current If of the diode 6 flows through the diode bias resistor 7, the diode 6, the inductor 23, the DC grounding take-out terminal 22 of the diode 6 and the DC grounding surface 17, respectively, and the detected signal is the same as in the first embodiment. To the detection output terminals 11 and D
It operates so as to be obtained from between the C ground planes 17. Inductor 2
The inductance value of 3 is determined by the frequency band and the RF characteristics of the diode 6, but is usually several nH to 20 nH.
It is a degree.

FIG. 4 is an equivalent circuit diagram showing a semiconductor integrated circuit according to a third embodiment of the present invention mounted in a package. In this figure, 1 to 14 and 16 to 1
8, 21 and 22 show the same parts as in the first embodiment.
Reference numeral 24 denotes a resistor, which connects and connects the input end 14 of the diode 6 and the capacitor 21. The DC ground lead-out terminal 22 of the diode 6 is provided between the resistor 24 and the capacitor 21. In the circuit configuration using the ¼ wavelength transmission line 15 shown in the first embodiment, the receiving sensitivity is high but the operating frequency is a narrow band. When a wide band receiving characteristic is required, as shown in the third embodiment, a resistor 24 having a resistance value of, for example, about 50 to 100 ohms is used. In this case, the forward bias current If of the diode 6 flows through the diode bias resistor 7, the diode 6, the resistor 24, the DC ground lead terminal 22 of the diode 6 and the DC ground plane 17, respectively, and is detected as in the above embodiment. It operates so as to obtain a detection signal from between the output terminal 11 and the DC ground plane 17.

In the above embodiment, the case where GaAs is used as the integrated circuit substrate has been described, but other semiconductor substrates such as indium phosphide (InP) and silicon (Si) may be used.

In the above embodiment, the case where monolithic integrated circuits are formed on the same semiconductor substrate has been described. However, alumina ceramic or the like is used as the integrated circuit substrate, and each circuit element is individually mounted on the substrate. Connect, M
It may be configured as an IC.

Further, in the above embodiment, the low noise amplifier 1 is constituted by one stage, and the circuit constitution using only the capacitor as the low pass filter is shown, but the low noise amplifier of two or more stages, the capacitor and the inductor are shown. It goes without saying that the same operation can be achieved even if a low pass filter is configured by combining the above.

[0022]

As described above, according to the present invention,
Between the transmission line or the inductor or the resistor connected to the input end of the diode and the capacitor, the circuit configuration is to connect the DC ground lead terminal of the diode.
When the low noise amplifier is mounted so that it operates with a single power supply, the diode's DC ground lead-out terminal and the DC ground plane are connected with a gold wire or the like to allow the diode's forward bias current If to pass through the GaAs FET's bias resistor. It is possible to apply without any problem. Therefore, the detection noise caused by the bias resistance of the GaAs FET is suppressed, and the reception sensitivity is not lowered,
It is possible to operate with a single power supply.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram showing a semiconductor integrated circuit according to a first embodiment of the present invention.

2 is an equivalent circuit diagram in a state where the semiconductor integrated circuit of FIG. 1 is mounted in a package.

FIG. 3 is an equivalent circuit diagram in a state where the semiconductor integrated circuit according to the second embodiment of the present invention is mounted in a package.

FIG. 4 is an equivalent circuit diagram in a state where a semiconductor integrated circuit according to a third embodiment of the present invention is mounted in a package.

FIG. 5 is an equivalent circuit diagram showing a conventional semiconductor integrated circuit.

6 is an equivalent circuit diagram in a state where the semiconductor integrated circuit of FIG. 5 is mounted in a package.

[Explanation of symbols]

 1 Low Noise Amplifier 2 High Frequency Input Terminal 3 Drain Bias Terminal 4 Gate Bias Terminal 5 Interstage Capacitor 6 Diode 7 Diode Bias Resistor 8 Diode Bias Terminal 9 Capacitor 10 Capacitor 11 Detection Output Terminal 12 Ground Plane 13 Via Hole 14 Input End 15 Transmission Line 16 Bias resistance 17 DC ground plane 18 Capacitor 21 Capacitor 22 DC ground extraction terminal 23 Inductor 24 Resistance

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H04B 1/18 C 9298-5K

Claims (3)

[Claims] 1. A low noise amplifier comprising an active circuit element and its input matching circuit, output matching circuit and bias circuit, a diode connected in series to the output section of the low noise amplifier, its bias circuit and low band. In a semiconductor integrated circuit in which a detection circuit composed of a filtering filter is formed on the same integrated circuit substrate, a transmission line having a length of ¼ wavelength of an operating frequency band and a capacitor are sequentially connected from the input end of the diode. Then, the semiconductor integrated circuit is characterized in that it is connected to the ground plane of the integrated circuit board, and a DC ground lead-out terminal of the diode is provided between the transmission line and the capacitor. 2. The semiconductor integrated circuit according to claim 1, wherein an inductor is used instead of the transmission line having a length of ¼ wavelength of the operating frequency band. 3. The semiconductor integrated circuit according to claim 1, wherein a resistor is used instead of the transmission line having a length of ¼ wavelength of the operating frequency band.