JPH0535972B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention applies to PCM (Pulse code)
This relates to a pulse number listening circuit that detects the number of pulses of a modulation signal, converts some of this number of pulses into sound, and outputs the sound.

[Conventional technology]

Conventionally, a circuit as shown in FIG. 4 has been used as a circuit for converting the number of pulses of an input PCM signal into sound. This circuit is composed of an M・S (mono stable multivibrator) 1, an amplifier 2, and a speaker 3.
Expand the pulse width of the PCM signal by M・S1,
This pulse-width-extended signal is amplified by an amplifier 2 and output as an audible sound from a speaker 3, thereby determining whether the input pulse is large or small. In this circuit, the pulse width is once expanded by a pulse stretching circuit such as M/S, so even if a single pulse with a narrow pulse width is supplied as input, an audible sound can be output from the speaker 3. I'm starting to be able to do it.

[Problem that the invention seeks to solve]

However, in the circuit described above, the number of pulses of the input signal increases, and the pulse interval is M・
When it becomes shorter than the pulse width of the output pulse of S1,
If a retrigger type M/S1 is used, the output of the M/S1 will continue to maintain the H(1) state as shown in Figure 5a, and no audible sound will be output from the speaker 3. There was a problem.
Furthermore, if a non-retrigger type M/S1 is used, the output of the M/S1 becomes unstable as shown in Figure 5b, and the speaker 3 outputs a high frequency sound higher than the audible sound. There was a problem with being exposed. For this reason, in any of the cases described above, it was not possible to accurately determine the number of pulses.

Therefore, in order to solve the above-mentioned problem, a circuit as shown in FIG. 6 is used. This circuit is the fourth
In addition to the configuration of the M/S 1, amplifier 2, and speaker 3 shown in the figure, it is equipped with an oscillator 4 and a gate circuit 5, and the oscillation frequency of the signal (Figure 7 3) output from the oscillator 4 can be audible. This oscillation signal as an audible sound is gated and intermittent by the gate circuit 5 at the timing of the output signal of M・S1, and is output from the speaker 3 (Fig. 7, 4). It is a judgment of how much.

However, in the circuit described above, since a signal with a certain constant frequency (oscillation frequency) is continued by the output signal of M・S, the frequency as a sound, that is, the pitch of the sound, as shown in Figure 9. Basically, the number of sounds remains unchanged and is proportional to the repetition frequency of the input pulse. Therefore, since this circuit cannot appeal to the pitch of the sound to which the auditory sense is most sensitive, there is a problem in that it is not possible to determine whether the input pulse is large or low based on the pitch of the sound.
Further, while the input pulses handled are short, as short as several nanoseconds, the gate time in the gate circuit 5 is long, so that when the number of input pulses increases, the input pulses ring continuously, making it impossible to determine the magnitude of the input pulses. Furthermore, since the signal with a constant oscillation frequency and the input pulse are input randomly, their phase relationship is not constant, and therefore the time width of the output of A・S1 is constant as shown in Figure 8. Even if the input pulse is input under the same conditions, the waveform of the output pulse is not constant, resulting in a difference in the sound quality of the output.

Therefore, the present invention has been made in view of the above-mentioned problems, and its purpose is to limit the number of input pulses to the audible range and to distinguish the number of input pulses by the pitch of the sound. The purpose of the present invention is to provide a pulse number listening circuit that can perform the following steps.

[Means for solving problems]

In order to achieve the above object, the pulse number listening circuit according to the present invention includes a bistable circuit 6 which is fed back to perform an inversion operation according to an input pulse, and a bistable circuit 6 which limits the output of the bistable circuit 6 to a predetermined pulse width. A pulse control section 7 that controls the inversion operation of the bistable circuit 6, and a pulse sound generation section that converts the signal outputted with the inversion operation of the bistable circuit 6 into an audible sound according to the number of pulses and outputs the audible sound. It is characterized by having 8.

[Effect]

When the number of input pulses supplied to the bistable circuit 6 is small, a signal with a number of pulses proportional to this number of pulses is supplied to the pulse sound generator 8, and an audible sound corresponding to this number of pulses is output.

Further, when the number of input pulses supplied to the bistable circuit 6 is large, the pulse control section 7 limits the signal outputted via the bistable circuit 6 to a predetermined pulse width, and the bistable circuit 6 is inverted. control. and,
The pulse sound generating section 8 converts the signal outputted with the inversion operation of the bistable circuit 6 into a sound corresponding to the number of pulses and outputs the sound.

〔Example〕

FIG. 1 is a block diagram showing an embodiment of a pulse number listening circuit according to the present invention, and FIG. 2 is a timing chart of each part of the circuit based on the number of input pulses.

In this embodiment, the same components as those of the conventional circuit will be described with the same reference numerals.

The pulse number listening circuit according to this embodiment is a D-type flip-flop circuit (hereinafter referred to as a bistable circuit).
DFF) 6, a pulse control section 7, and a pulse sound generation section 8, which controls the inversion operation by limiting the pulse width of the output of the bistable circuit 6 according to the amount of input pulse. The signal outputted with this inversion operation is converted into a sound corresponding to the number of pulses and output, and the number of input pulses is determined by the pitch of the sound.

The DFF 6 as a bistable circuit has its output terminal, Q terminal 6a, connected to the pulse sound generating section 8, and is also connected via the pulse control section 7 to one input terminal, the D terminal 6b. Also,
An output terminal of a device (not shown) is connected to the other input terminal 6c, and an input pulse (PCM signal) of a predetermined repetition frequency is input thereto. In this DFF 6, a feedback signal supplied to the D terminal 6b via the pulse control section 7 is transferred by an input pulse.

The pulse control section 7 includes a delay circuit 9 and an inversion circuit 10, and limits the pulse width of the signal output from the Q terminal 6a of the DFF 6, and feeds it back to the D terminal 6b. To explain in more detail, Q terminal 6a of DFF6
As shown in FIG. 2c, the signal output from the circuit is delayed by a predetermined time t by the delay circuit 9, and the delayed signal is sent to the D terminal 6b whose polarity is inverted by the inverter 10. It is output as a feedback signal.

By the way, in the DFF6, the feedback signal supplied to the D terminal 6b is transferred by an input pulse, but if you look at the timing chart in Figure 2,
The inversion operation of the DFF 6 differs depending on the amount of input pulse. This is because the feedback signal whose pulse width is limited by the pulse control section 7 is supplied to the D terminal 6b of the DFF6, so that the DFF6 can maintain the previous input pulse from the rising edge of the feedback signal until the next input pulse is supplied. This is because the state is maintained. Thereby, even if the number of input pulses increases, the repetition frequency of the output signal of the DFF 6 can be saturated to a frequency within the audible band. In other words, the pulse control section 7
constitutes a synchronous frequency divider, and is controlled so that the input pulse does not have a high frequency with a pulse width exceeding the delay time t of the delay circuit 9.

The pulse sound generating section 8 includes a differentiating circuit 11, an M.S. (monostable multivibrator) 1, an amplifier 2, and a speaker 3, and is output from the Q terminal 6a in accordance with the inverting operation of the DFF 6, which is a bistable circuit. It converts the signal into sound according to the number of pulses and outputs it.

The differentiating circuit 11 differentiates the rising and falling edges of the signal output from the Q terminal 6a of the DFF 6, limits the pulse to a short length, and outputs this differentiated signal (FIG. 2d) to the M/S1.
M.S1 expands the differential signal supplied from the differentiating circuit 11 to a predetermined pulse width, and outputs this expanded signal to the amplifier 2.

The amplifier 2 amplifies the signal supplied from the M/S 1 to a predetermined degree of amplification, and outputs an audible sound (FIG. 2e) from the speaker 3.

Here, FIG. 3 shows the relationship between the repetition frequency of the input pulse and the repetition frequency of the output pulse (signal output from the speaker) based on the frequency characteristics of sound intensity.

As shown in the figure, the signal output from the speaker 3 is a signal below the maximum audible frequency (approximately 20 kHz) and is an audible sound.

Incidentally, in this figure, changes that appear with steps at several locations indicate switching portions of the number of output pulses.

In the configuration explained above, it is a bistable circuit.
When the number of input pulses supplied to DFF6 is small, a signal with a number of pulses proportional to this number of pulses is generated.
The signal is supplied to the pulse sound generator 8 which is output from the Q terminal 6a of the DFF 6. Then, the pulse sound generator 8
, an audible tone (20Hz) depending on the number of pulses supplied.
~20KHz) is output from speaker 3.

Furthermore, when the number of input pulses supplied to the DFF6, which is a bistable circuit, is large, the pulse width of the output signal of the DFF6 is limited by the pulse control section 7,
DFF is held in the previous state from the rise of the feedback signal until the next input pulse is supplied. As a result, the upper limit of the output signal of the DFF 6 is limited to below the audible frequency. Then, the signal output from the Q terminal 6a in response to the inversion operation of the DFF 6 is converted into an audible sound according to the number of pulses in the pulse sound generating section 8, and is output from the speaker 3.

Therefore, in the circuit described above, when the number of input pulses is small, it is possible to output a number of pulses proportional to this number of pulses, convert it into an audible sound, and output it from the speaker 3. Furthermore, even when the number of pulses increases, the frequency of the output pulses is limited to within the audible band by the operation of the pulse control section 7, so that the output pulses can be output from the speaker 3 as audible sounds.

Incidentally, although the above-described embodiment uses the DFF6 as the bistable circuit, the present invention is not limited to this, and other circuits such as flip-flop circuits may be used.

In addition, in the above-described embodiment, the pulse sound generating section 8 is provided with a differentiating circuit 11, but this differentiating circuit 11 has the minimum necessary power to output the output of the DFF 6 as a bistable circuit as an audible sound. This is for limiting the pulse width and does not need to be provided. Note that in this case, the sound output from the speaker 3 depends on the frequency of the pulse expanded by M.S1 based on the signal output from the DFF 6.

〔Effect of the invention〕

As explained above, according to the pulse number listening circuit according to the present invention, the frequency of the output pulse can be controlled to an audible frequency regardless of the number of input pulses, and the number of input pulses can be determined by the pitch of the sound. The effect is that it can be done.

[Brief explanation of the drawing]

Fig. 1 is a block configuration diagram showing an embodiment of the pulse number listening circuit according to the present invention, Fig. 2 is a timing chart of each part based on the number of input pulses in the circuit, and Fig. 3 is the frequency of sound intensity. A diagram showing the relationship between the input pulse repetition frequency and the output pulse repetition frequency based on the characteristics, FIG. 4 is a diagram showing an example of a conventional pulse number listening circuit, and FIG.
b is a diagram showing the relationship between the repetition frequency of input pulses and the repetition frequency of output pulses when M·S in the circuit of FIG. 4 is of the retrigger type and when it is not of the retrigger type; Fig. 6 is a diagram showing another example of the conventional pulse number listening circuit, Fig. 7 is a timing chart of each part depending on the number of input pulses in the circuit of Fig. 6, and Fig. 8 is a diagram of the circuit of Fig. 6. A timing chart diagram of each part to explain the phase relationship between the input pulse in the circuit and the signal output from the oscillator,
FIG. 9 is a diagram showing the relationship between the repetition frequency of input pulses and the repetition frequency of output pulses based on the frequency characteristics of sound intensity in the circuit of FIG. 6. DESCRIPTION OF SYMBOLS 1...M-S, 6... Bistable circuit (DFF), 7... Pulse control part, 8... Pulse sound generation part, 9... Delay circuit, 10... Inversion circuit, 11... Differential circuit.

Claims (1)

[Claims] 1 A bistable circuit 6 which is fed back to perform inversion operation according to an input pulse, and the bistable circuit 6
a pulse control section 7 for controlling the inversion operation of the bistable circuit 6 by limiting the output of the bistable circuit 6 to a predetermined pulse width; A pulse number listening circuit comprising: a pulse sound generating section 8 that converts the sound into an audible sound and outputs the sound.