JPH0535493A - General reverse-assembler processing system for assembler - Google Patents

Abstract

PURPOSE:To reduce the number of reverse-assembler programs by attaining a general reverse-assembler processing. CONSTITUTION:This system has a load module data reading means 2 which reads data from a load module file 1, CPU information table expanding means 8 which expands information concerned with a CPU a table, command code retrieving means 3 which decides a command code from a CPU information table 9 by using the load module data as a key, operand assembly means 4 which assembles assemble data by inserting actual data into an operand, and assembler data writing means 5 which writes the assembler data in an assembler source file 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a general-purpose disassembler processing system for an assembler in an electronic computer.

[0002]

2. Description of the Related Art Conventionally, as a method for performing disassembler in an electronic computer, a program for executing a dedicated disassembler for each CPU has been developed and used. However, in this case, it was necessary to develop a disassembler program for each of hundreds of CPUs.

[0003]

The disassembler processing method in the conventional assembler has the problem that the disassembler program must be redeveloped for each of the hundreds of CPUs, and the development cost consumed for it becomes enormous. ..

It is an object of the present invention to provide a general-purpose disassembler processing method in an assembler that significantly reduces the development man-hours of a disassembler program in order to solve the above problems.

[0005]

DISCLOSURE OF THE INVENTION A disassembler processing method in an assembler of the present invention is a load module data reading means for reading data from a load module file, and a CPU for expanding information on the CPU in a table.
Information table expanding means, instruction code searching means for searching the CPU information table using the load module data as a key, operand assembling means for inserting actual data into operands to assemble assembler data, and assembler from the instruction codes and operands It has an assembler data writing means for writing data to an assembler source file.

[0006]

In the disassembler processing method in the assembler of the present invention, the CPU information table expanding means reads the CPU information file and expands it in the CPU information table, and the instruction code searching means determines the instruction code from the CPU information table, and the operand assembling means. Inserts actual data into the operand to assemble the assembler data, and the assembler data writing means writes the assembler data in the assembler source file, so that general-purpose disassembler processing can be performed.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a general-purpose disassembler processing system in an assembler according to an embodiment of the present invention.
The present embodiment is composed of the following parts.

Load module data reading means (2) which is a part for sequentially reading data from the load module file (1), and a part for determining an instruction code by searching the CPU information table using the data as a key. Instruction code search means
(3),-Operand assembling means (4), which is the part that replaces the dummy argument of the operand with actual data, and-is the part that writes the assembler data to the assembler source file (6) from these instruction codes and operands. Assembler data writing means (5), CPU information table expanding means (8) which is a part for reading the CPU information file (7) in advance and expanding it in the CPU information table (9), FIG. It is a block diagram of the data regarding. In FIG. 2, the following items are included.

A part defining the machine language code (10) a part defining the length of only the instruction code (11) a part defining the entire length including the instruction part and the operand part (1
2) -A part that defines the number of dummy arguments in the operand- (13) -Instruction code part (14) -Operand part (15) These items enable a general-purpose disassembler processing method that does not depend on the CPU. Become.

FIG. 3 is a diagram showing an example of the disassembler of the present invention. The operation will be described with reference to FIG. The contents 16 of the load module file is 12,1001 at the address 1000
34 at address, 56 at 1002, 78 at 1003
If is included, the contents of the CPU information file 17
Are machine code 10 and 12; instruction length 11 is 2; overall length 12 is 4; dummy argument number 13 is 2; instruction code 14
Is LOAD, operand 15 is (IX + $ (3,1),
If it is defined as $ (4,1), and then disassemble it, the machine language code of contents 17 of the CPU information file is 12,
Since 34 matches the contents address 1000 of the load module file 16 and addresses 12 and 34 of address 1001, the instruction code LOAD is selected.

The operand of this instruction code is (IX +
Since the number of temporary arguments in $ (3,1) and $ (4,1) is 2, the actual argument is replaced. First, from $ (3,1), select 5 6 which is the 1st byte data from the 3rd in the content 16 of the load module file. Selected,
Create a real operand.

The assembler data 18 after the disassembler can be obtained from these instruction codes and actual operands.

[0014]

As described above, according to the present invention, the disassembler can be performed only by creating the CPU information file for each CPU, so that the man-hours for developing the disassembler program can be greatly reduced. effective.

[Brief description of drawings]

FIG. 1 is a block diagram of a general-purpose disassembler processing method in an assembler according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of data relating to CPU information in the present invention.

FIG. 3 is a diagram showing an example of a disassembler in an embodiment of the present invention.

[Explanation of symbols]

(1) Load module file to be input to the disassembler (2) Load module data reading means (3) Instruction code searching means (4) Operand assembling means (5) Assembler data writing means (6) Assembler source file (7) CPU information file (8) CPU information table expansion means (9) CPU information table (15) Operand including dummy argument (16) Example of assembler data after disassembler

Claims (1)

Claim: What is claimed is: 1. A load module data reading means for reading data from a load module file, a CPU information table expanding means for reading a CPU information file in advance and expanding information about a CPU in a table, Instruction code search means for determining an instruction code by searching the CPU information table with the load module data read by the load module data reading means as a key;
Operand assembling means for assembling assembler data by inserting actual data into the operand from the CPU information table, and writing the assembler data by the instruction code determined by the instruction code searching means and the operand by the operand assembling means into an assembler source file. A general-purpose disassembler processing method in an assembler having assembler data writing means.