JPH05347373A - Molding structure for semiconductor element and soldering method therefor - Google Patents

Molding structure for semiconductor element and soldering method therefor

Info

Publication number
JPH05347373A
JPH05347373A JP4153831A JP15383192A JPH05347373A JP H05347373 A JPH05347373 A JP H05347373A JP 4153831 A JP4153831 A JP 4153831A JP 15383192 A JP15383192 A JP 15383192A JP H05347373 A JPH05347373 A JP H05347373A
Authority
JP
Japan
Prior art keywords
solder
semiconductor element
lead
mounting structure
soldering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4153831A
Other languages
Japanese (ja)
Inventor
Mitsuo Hirabayashi
光男 平林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP4153831A priority Critical patent/JPH05347373A/en
Publication of JPH05347373A publication Critical patent/JPH05347373A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3468Applying molten solder

Landscapes

  • Molten Solder (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To enable manufacturing of high reliability and high yield and to realize good use durability by forming solder of a small amount stably at a lead end part, by enabling sure solder connection and by realizing a constitution which enables ready assurance of conduction and strength. CONSTITUTION:In a conventional method, solder is applied to the side of a substrate; however, in this method, solder 3 is applied to the side of a lead 2 alone by a spin coater. In the case of mounting a semiconductor element 1, a fillet is formed below the lead by heating and pressurizing by a thermocompression tool, thereby realizing connection.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、高密度の半導体素子リ
ード部の半田付け性を向上した半導体封止構造とその方
法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor encapsulation structure and method for improving the solderability of high density semiconductor element leads.

【0002】[0002]

【従来の技術】家庭電気製品やAV機器の小型高密度化
とパーソナルコンピューター・ワークステーションの小
型高精度多機能化に伴い、半導体素子を含む実装部品の
細密表面実装技術(以下SMTという)が求められてき
た。一般に表面実装用半導体素子(以下QFPという)の
実装方法は、回路基板に半田クリームを塗布する時、マ
スク作用をする板(以下ステンシルという)でパターン
を描きながら印刷し、実装部品を上から位置決めしつつ
載せ、熱風炉(以下リフローという)に通して半田付けを
する。また、細密な回路基板の実装用として10ミクロ
ンから50ミクロンまでの粒子径をもつ半田クリームが
実用化されている。前記半田クリームに含まれる有機性
のフラックスは流動性・非乾燥性・粘性・イオン性・無
洗浄性等から溶剤・樹脂の複数の混合物とからなってい
る。
2. Description of the Related Art With the miniaturization and high density of household electric appliances and AV equipment and the miniaturization and high precision and multi-functionalization of personal computers and workstations, a fine surface mounting technology (hereinafter referred to as SMT) for mounting parts including semiconductor elements is required. Has been. Generally, the method of mounting a semiconductor element for surface mounting (hereinafter referred to as QFP) is that when solder cream is applied to a circuit board, it is printed while drawing a pattern on a plate (hereinafter referred to as stencil) that acts as a mask, and the mounted components are positioned from above Then, it is put on it, and it is soldered by passing it through a hot air oven (hereinafter referred to as reflow). Further, solder cream having a particle size of 10 to 50 microns has been put into practical use for mounting a fine circuit board. The organic flux contained in the solder cream is composed of a mixture of a plurality of solvents and resins because of its fluidity, non-drying property, viscosity, ionic property, non-cleaning property and the like.

【0003】そして、加熱溶融・硬化するリフロー炉に
は、前記のほかN2リフロー炉・赤外線併用リフロー炉
・ベーパーフューズ法などが実用化されている。
In addition to the above, N2 reflow furnace, infrared combined reflow furnace, vapor fuse method, etc. have been put to practical use as a reflow furnace for heating, melting and hardening.

【0004】[0004]

【発明が解決しようとする課題】しかし、このように従
来法によって作製されるQFP実装方法の回路基板で
は、塗布される半田クリーム量の増減や加わる熱量のバ
ラツキにより、半導体素子のリードにブリッジ不良・浮
き不良・未半田不良が発生し易く、またそれによる製造
歩留りの低下という欠点もある。
However, in the circuit board of the QFP mounting method manufactured by the conventional method as described above, a bridging defect is caused in the leads of the semiconductor element due to the variation of the applied solder cream amount and the variation of the applied heat amount.・ Floating defects and unsoldered defects are likely to occur, and there is also a drawback that the manufacturing yield is reduced.

【0005】そして、製品品質を確保するため後工程で
外観検査をしているが、検出するフィレット形状が不定
形で、かつその検出できるリード先端部の半田付け形状
が大小まちまちである場合が多く、リードタイムの助長
・不良品の見逃しをまねくと言う不利がある。
Then, in order to ensure product quality, visual inspection is performed in a later step. In many cases, the shape of the fillet to be detected is indefinite, and the soldering shape of the lead tip that can be detected is large or small. However, it has the disadvantage of promoting lead time and overlooking defective products.

【0006】更に回路基板分野では0.4mmピッチ以
下対応の細密化実装技術確立という市場要求に対し、現
行の半田クリーム塗布方式では、いわゆるブリッジ・未
半田・浮き不良が多発している。1005チップに代表
される微小な抵抗、コンデンサー類の半田クリームによ
る実装についても同様にツームストン・未半田不良が発
生し、抜本的提案が待たれている。従来法に共通する欠
点としては、半田実装不良が多く、後工程での検査費用
の増加がみられ、生産性の低下を余儀なくされてきた。
Further, in the circuit board field, so-called bridges, unsolders, and floating defects frequently occur in the current solder cream coating method, in response to the market demand for establishing a fine mounting technology for 0.4 mm pitch or less. Even when mounting minute resistors and capacitors, such as the 1005 chip, with solder cream, tombstones and unsoldered defects similarly occur, and drastic proposals are awaited. As a drawback common to the conventional methods, there are many solder mounting defects, an increase in inspection cost in a post process, and a decrease in productivity has been forced.

【0007】また、リード間隔が0.4mmピッチ以下
の狭ピッチQFPになると、スクリーン印刷した時半田
クリームが「かまぼこ」状になって、リードをその上に
正確に重ねにくく、印刷形状がくずれることが多く、リ
ード間に半田ブリッジの発生や、ランドとの半田濡れ性
にバラツキがあるなどの課題がある。またステンシルも
狭ピッチになるとツマリ・カスレ・形状不良などの半田
クリームの抜け性による塗布不良が発生して、部品の細
密実装化を阻んでいる。更に半田クリームに含まれる有
機性のフラックスは経時的に乾燥し、ひいては粘度変
化、塗布量のバラツキ、半田不良による電気的接続不良
・接合強度不足の発生がどうしても回避できない項目と
なっている。
Further, when the lead pitch is a narrow pitch QFP of 0.4 mm pitch or less, the solder cream becomes a "kamaboko" shape when screen-printed, and it is difficult to accurately stack the leads on the solder cream, and the printed shape collapses. However, there are problems such as the formation of solder bridges between leads and variations in solder wettability with lands. In addition, when the stencil has a narrow pitch, defective coating due to solder cream dropout such as stickiness, scraping, and defective shape occurs, which hinders the miniaturization of components. Furthermore, the organic flux contained in the solder cream dries over time, which in turn makes it impossible to avoid the occurrence of electrical connection defects and insufficient joint strength due to viscosity changes, coating amount variations, and solder defects.

【0008】これに対して、高速半田メッキ技術でリー
ド側だけに半田を電解メッキで付け、基板を熱圧着する
方法が電波新聞(平成4年2月13日号)に提案されて
いる。しかし、この提案では、本来半田の電気メッキで
あるかぎり金属性のリード側にすず組成がリッチになり
易く、また共晶合金の組成変化が加味されると、溶融状
態の均一性を確保しずらくなる。かつこのリード先端部
の半田組成に不均一性が生じると、接続特性にバラツキ
があり信頼性に疑問を持ってくる。さらに正方形の半導
体素子QFPの四隅部は電解密度がリッチになるため、
メッキ厚が他のリードと比べ不均一になり、実装時の半
田品質が安定化しないと考えられる。
On the other hand, a method of applying solder to only the lead side by electrolytic plating by high-speed solder plating technology and thermocompressing the substrate has been proposed in the Denpa Shimbun (February 13, 1992 issue). However, in this proposal, the tin composition is likely to become rich on the metallic lead side as long as it is originally electroplating of solder, and if the composition change of the eutectic alloy is taken into consideration, the uniformity of the molten state cannot be ensured. It'll be easy. Moreover, if the solder composition at the tip of the lead becomes non-uniform, the connection characteristics will vary and the reliability will be questioned. Furthermore, since the electrolytic density becomes rich in the four corners of the square semiconductor device QFP,
It is considered that the plating thickness becomes uneven compared to other leads, and the solder quality during mounting is not stable.

【0009】また、前記新聞に述べられているように、
それぞれのリードに半田メッキされるため、プリント基
板の反りやQFPのリード位置のバラつきがそのまま残
り、実装時に浮きや位置ズレが起きる等の欠点がある。
メッキ液の濃度管理が必要で量産時での組成と厚みバラ
つきはどうしても避けられないところである。また、メ
ッキ処理工程が増えるため、処理されるQFP毎の治具
作成とメッキ条件だし等でコスト高になる。具体的には
メッキ処理により違うが、現状のリフロー半田印刷方式
より高くなる。
Also, as described in the newspaper,
Since each lead is solder-plated, there are drawbacks such as the warp of the printed circuit board and the variation in the lead position of the QFP, which causes floating and positional deviation during mounting.
Since it is necessary to control the concentration of the plating solution, variations in composition and thickness during mass production are inevitable. Further, since the number of plating processing steps is increased, the cost is increased by making a jig for each QFP to be processed and setting plating conditions. Although it depends on the plating process, it will be higher than the current reflow solder printing method.

【0010】つまり、実装部品の各電極部に均一に位置
精度良く半田クリームを供給できればこういった問題は
起きていない。したがって、これらの欠点が解決される
構成を有する回路基板の実装に使用する細密の半田付け
技術の開発が熱望されている。
That is, if the solder cream can be uniformly supplied to each electrode portion of the mounted component with high positional accuracy, such a problem does not occur. Therefore, development of a fine soldering technique used for mounting a circuit board having a configuration capable of solving these drawbacks has been earnestly desired.

【0011】本発明は、上記課題にかんがみ成されたも
ので、均一な組成の半田を極く微少まで一定量をリード
先端部のみに安定して付与し、位置精度良く半田を回路
基板のランド部に集中し、確実に簡略な成分構成により
高信頼性高歩留りで微細表面実装の電子部品を製造する
ことができ、しかも使用耐久性に優れた半導体素子実装
構造とその半田付け方法の提供を目的とし、実装基板と
接続する半導体素子のリード部の先端のみに組成変化の
ない簡便な方法で半田を付与し、加熱ツールでリード先
端部の半田を溶融し基板に固定したことを特徴とする半
導体素子実装構造で達成した。
The present invention has been made in view of the above-mentioned problems, and a fixed amount of solder having a uniform composition is stably applied only to the tip of the lead so that the solder can be accurately positioned on the land of the circuit board. We provide a semiconductor element mounting structure and soldering method that can produce highly reliable and high-yield electronic components with fine surface mounting that are highly reliable and have a high yield by using a simple composition. The feature is that solder is applied only to the tips of the lead parts of the semiconductor element connected to the mounting board by a simple method without composition change, and the solder at the lead tips is melted and fixed to the board with a heating tool. Achieved with a semiconductor element mounting structure.

【0012】1,極細密なQFPの表面実装方法におい
て、接続に必要でかつ十分な量の半田を組成変化のない
簡便な方法でリード先端部のみに安定して付与すること
が出来、しかも耐久性・経時的に信頼性の高く安定した
半導体素子構造とその半田付け方法 2,細密パターン回路にプリフラックス等の前処理が必
要なく、安定したフィレット形状を精度良く製造でき且
つ、検査工程の抜き取り化はたまた全廃が可能な高密度
表面実装を実現した半導体素子構造とその半田付け方法 3,半田印刷環境の変動やメッキ組成の経時的変化に左
右されず、歩留り良く忠実に回転加工され、廃棄量の少
ない半田量で高い接続強度を有する半導体素子構造とそ
の半田付け方法 4,高価な半田印刷装置や半田メッキ装置を用いず、作
業性が良く簡略な製造方法により固定実装できる半導体
素子構造とその半田付け方法、を提供することも本発明
の他の目的である。
1. In the ultra-fine surface mounting method of QFP, a sufficient amount of solder necessary and sufficient for connection can be stably applied only to the tip of the lead by a simple method with no composition change, and it is durable. Stable semiconductor element structure with high reliability over time and its soldering method 2. Pre-treatment such as pre-flux is not required for fine pattern circuit, stable fillet shape can be manufactured accurately, and sampling process is extracted The semiconductor element structure that realizes high-density surface mounting that can be abolished and its soldering method 3, It is faithfully rotated with good yield without being affected by changes in the solder printing environment or changes in the plating composition over time. A semiconductor element structure that has a high connection strength with a small amount of waste and a soldering method therefor 4. Easy to use without expensive solder printing equipment or solder plating equipment It is another object of the present invention to provide a soldering method, a semiconductor device structure can be fixed mounting by the method.

【0013】[0013]

【課題を解決するための手段】このような諸目的を達成
する本発明の半導体素子構造とその半田付け方法は、ス
ピンコーターの回転軸上に溶融半田を滴下し、回転中の
半導体素子のリード先端に半田付け膜を成形し、フラッ
クスを予め塗布した実装基板のランド上に加熱ツールで
前記リード部の半田を溶融固定したことを特徴とする半
導体素子実装構造とその半田付け方法である。今回の手
法は、従来基板側に半田を付ける手法だったのに対し、
リード側だけに半田を遠心力で付け、基板側には半田を
供給しない。実装する場合は、熱圧着する。ツールで加
熱・加圧するとリードの下部にフィレットが形成され接
続できる。
SUMMARY OF THE INVENTION A semiconductor element structure and a soldering method thereof according to the present invention that achieves the above-mentioned various objects are formed by dropping molten solder onto a rotating shaft of a spin coater and then rotating the leads of the rotating semiconductor element. A semiconductor element mounting structure and a soldering method thereof, characterized in that a soldering film is formed at a tip, and the solder of the lead portion is melted and fixed by a heating tool on a land of a mounting substrate to which flux is previously applied. In contrast to the conventional method of soldering on the board side,
The solder is applied only to the lead side by centrifugal force, and the solder is not supplied to the board side. When mounting, thermocompression bonding is used. When heated and pressed with a tool, a fillet is formed under the lead and can be connected.

【0014】[0014]

【実施例】(実施例1)以下、実施例に基づき本発明を
詳細に説明する。
EXAMPLES Example 1 The present invention will be described in detail below based on examples.

【0015】0.5ミリピッチ205ピンのQFPをス
ピンコーター(MIKASA製1H−360)に真空吸引(7
0cmHg)させセットする。図2のようにリード先端
形状2は、0.20mm幅で0.15mm高さの断面形
状でリード長さ2.5mmで使用した。第一段階の回転
速度を400RPMとし11秒で立ち上げ、第二段階の
回転速度を900RPMとし8秒間保持した条件設定し
た。活性ロジン(RA)タイプの半田を摂氏250度に
溶かし、第一段階の回転時にリード部に50CCだけ滴
下した。スピンコーター5の回転による遠心力と温度低
下による粘性増加とが相まってリード先端部には、0.
12CCから0.20CCまでの半田量3が99.8%
の確率で付いた。図1のようにリード先端部に選択的に
半田3が集中し形状を再現良く作った。
Vacuum suction of QFP of 0.5 mm pitch 205 pin to a spin coater (1H-360 made by MIKASA) (7
0 cmHg) and set. As shown in FIG. 2, the lead tip shape 2 was used with a lead length of 2.5 mm with a cross-sectional shape of 0.20 mm width and 0.15 mm height. The conditions were set such that the rotation speed in the first stage was 400 RPM and the system was started up in 11 seconds, and the rotation speed in the second stage was 900 RPM and held for 8 seconds. Active rosin (RA) type solder was melted at 250 degrees Celsius, and 50 CC was dropped onto the lead portion during the first rotation. The centrifugal force due to the rotation of the spin coater 5 and the increase in viscosity due to the temperature decrease are combined with each other, and
Solder amount 3 from 12CC to 0.20CC is 99.8%
It was attached with the probability of. As shown in FIG. 1, the solder 3 was selectively concentrated at the tip of the lead, and the shape was reproduced well.

【0016】あらかじめ、0.5ミリピッチの実装配線
が施されたガラスエポキシ回路基板に、ハンダ印刷機
(NP−04AN2・日立テクノ製)を使い、パターン
が刻まれたNi製アデイティブ法のステンシルを挟みつ
つRAタイプの半田クリームを印刷した。チップマウン
ター(CM85C−ME・九州松下製)で、冠状部品
{電解コンデンサー・可変抵抗器}、チップ部品{コン
デンサー・抵抗・フィルター}等の部品を搭載した。
[0016] A solder printing machine (NP-04AN2, made by Hitachi Techno) was used in advance on a glass epoxy circuit board on which mounting wiring of 0.5 mm pitch was applied, and a stencil made of Ni additive was sandwiched with a pattern. While printing RA type solder cream. A chip mounter (CM85C-ME, manufactured by Kyushu Matsushita) was used to mount parts such as coronal parts {electrolytic capacitor / variable resistor} and chip parts {capacitor / resistor / filter}.

【0017】前記回路基板18のQFPランド部にフラ
ックスを塗布し、チップマウンターで、本発明の半導体
素子1を搭載した。図7のように上からヒートパルス方
式の加熱ツール17で本発明のリード先端部2を抑え通
電温度上昇し、先端部の半田を溶かしランドとの接続フ
ィレット19を作成した。断電冷却後加熱ツールを上昇
し結合工程は終了した。
Flux was applied to the QFP land portion of the circuit board 18, and the semiconductor element 1 of the present invention was mounted by a chip mounter. As shown in FIG. 7, the lead tip 2 of the present invention was suppressed from above by the heating tool 17 of the heat pulse system to raise the energization temperature, the solder at the tip was melted, and the connection fillet 19 with the land was created. After disconnection cooling, the heating tool was raised and the bonding process was completed.

【0018】結果、本発明の半導体素子のリード端子の
フィレット形状は、図5に示すように確実に電気的な接
合と機械的強度の実現ができた。
As a result, the fillet shape of the lead terminal of the semiconductor element of the present invention could surely realize electrical connection and mechanical strength as shown in FIG.

【0019】図8の従来法で示したような半田クリーム
の過剰塗布・熱履歴によるブリッジ不良の発生は認めら
れなかった。かりに半導体素子の取扱い上のリード不揃
いやリード端子のそり上がりがあったとしても、ヒート
パルス方式の加熱ツール17でリードのばたつきを上か
ら抑え込んでしまうので、未半田や浮き不良の発生はな
く安定均一なフイレット形状の製造が可能となった。
No occurrence of bridging defects due to excessive application of solder cream and heat history as shown in the conventional method of FIG. Even if there is unevenness in the handling of the semiconductor elements or the lead terminals are warped, the heating tool 17 of the heat pulse method suppresses the flapping of the leads from the top, so there is no unsoldered or floating defect and it is stable. It has become possible to manufacture uniform fillet shapes.

【0020】個々のリード先端部の半田量が均一のた
め、過剰な半田量の横方向への飛び出しによるブリッジ
不良(図9)の発生や半田量のリード毎の遍在による未
半田不良(図10)の発生は皆無になった。
Since the amount of solder at the tip of each lead is uniform, a bridging defect (FIG. 9) occurs due to an excessive amount of solder popping out in the lateral direction, and an unsoldered defect due to uneven distribution of the solder amount among the leads (see FIG. The occurrence of 10) has disappeared.

【0021】逆に0.65mmピッチとの混在による半
田量偏りへの改良へとつながった。その理由として、半
田量は基本的にリード先端の表面積に依存するため、リ
ード間隔つまりピッチ間隔が0.65mmになっても、
たとえ0.2mmになったとしても、上記の半田付け作
用は有効であるし、同様な作用が働くと考える。
On the contrary, it led to the improvement in the deviation of the amount of solder due to the mixture with the pitch of 0.65 mm. The reason is that the amount of solder basically depends on the surface area of the tips of the leads, so even if the lead spacing, that is, the pitch spacing is 0.65 mm,
Even if it becomes 0.2 mm, it is considered that the above-mentioned soldering action is effective and the same action works.

【0022】半田のプレコート方法としてリフローソル
ダーリング・半田クリーム印刷方法・溶融半田の滴下が
あり、加熱方法として、リフロー炉・赤外線炉・熱風循
環・レーザー加熱・光ビーム加熱・加熱ツール・エァヒ
ーター・ホットプレート・気化潜熱などがある。これら
の加熱方法は単独でも良くかつ、複数の併用や繰り返し
でも可能である。スピンコーターへのQFPの取付・取
り外しや基板へのマウントは、水平多関節型やスカラー
型などのロボットの使用を前提に高速化・量産化をはか
っている。
There are reflow soldering, solder cream printing, and molten solder dripping as solder precoating methods, and heating methods include reflow furnace, infrared furnace, hot air circulation, laser heating, light beam heating, heating tool, air heater, hot. There are plates and latent heat of vaporization. These heating methods may be used alone, or may be used in combination or repeatedly. Mounting / removing the QFP to / from the spin coater and mounting it on the board are intended for high speed / mass production, assuming the use of horizontal articulated robots or scalar robots.

【0023】使用できる半田組成には、スズ・ビスマス
・鉛やスズ・鉛・銀などの低融点半田の特性を加味でき
る金属成分を0.1%から50%添加したものも可能で
ある。 使われるフラックス組成に純ロジン(R)・弱
活性ロジン(RMA)・活性ロジン(RA)やフェノー
ル系などの合成樹脂やフッ素含有の合成活性剤や有機酸
・有機塩・合成樹脂などの低残さ用の特性を加味できる
成分を添加したことや水溶性の無機酸・無機塩・有機酸
・塩基・有機塩・有機ハロゲンを添加したものも使用可
能である。
As the solder composition which can be used, it is possible to add 0.1 to 50% of a metal component such as tin, bismuth, lead, tin, lead, silver, etc., which can take into account the characteristics of the low melting point solder. The flux composition used is pure rosin (R), weakly active rosin (RMA), active rosin (RA), synthetic resins such as phenolic compounds, fluorine-containing synthetic activators and low residues such as organic acids, organic salts and synthetic resins. It is also possible to use a component to which properties for use are added, or a substance to which a water-soluble inorganic acid / inorganic salt / organic acid / base / organic salt / organic halogen is added.

【0024】比抵抗(Ω・cm)・接合強度(g/リート゛)・
フ゛リッシ゛不良発生率(%)・半田不良発生率(%)の各品
質特性を調べた結果を表1にまとめた。
Specific resistance (Ω ・ cm) ・ Joint strength (g / lead) ・
Table 1 shows the results of examining the quality characteristics of the bridging defect occurrence rate (%) and the solder defect occurrence rate (%).

【0025】[0025]

【表1】 [Table 1]

【0026】(実施例2)0.4ミリピッチ260ピン
のQFPを溶融状態の半田バスに0.5秒間漬け、リー
ド部に半田付け膜を図3のように10から50ミクロン
の厚さで成形した。その後前記QFPをスピンコーター
(MIKASA製1H−360)に真空吸引(70cmHg)
させセットする。リード先端形状2は、0.15mm幅
で0.12mm高さの断面形状でリード長さ2.3mm
で使用した。第一段階の回転速度を350RPMとし1
0秒で立ち上げ、第二段階の回転速度を1100RPM
とし10秒間保持した条件設定した。半田組成にスズ・
ビスマス・鉛やスズ・鉛・銀などの低融点半田の特性を
加味できる金属成分を20%添加した半田を第一段階の
回転時からレーザー光で加熱し始めた。スピンコーター
5の回転による遠心力と温度低下による粘性増加とが相
まってリード先端部には、0.12CCから0.20C
Cまでの半田量が99.8%の確率で付いた。図1のよ
うにリード先端部に選択的に半田3が集中し形状を再現
良く作った。
(Embodiment 2) 0.4 mm pitch 260-pin QFP is immersed in a molten solder bath for 0.5 seconds, and a soldering film is formed on the lead portion with a thickness of 10 to 50 μm as shown in FIG. did. Then, the QFP is vacuum sucked (70 cmHg) into a spin coater (1H-360 manufactured by MIKASA).
Let it set. Lead tip shape 2 has a cross-sectional shape of 0.15 mm width and 0.12 mm height and a lead length of 2.3 mm.
Used in. Rotation speed of the first stage is 350 RPM 1
Start up in 0 seconds and set the second stage rotation speed to 1100 RPM
The condition was set for 10 seconds. Tin for solder composition
We started heating the solder with 20% of the metal component that can take into account the characteristics of low melting point solder such as bismuth / lead and tin / lead / silver from the first stage of rotation with laser light. The centrifugal force due to the rotation of the spin coater 5 and the increase in viscosity due to the decrease in temperature are combined, so that the lead tip may have a thickness of 0.12 CC to 0.20 C.
The amount of solder up to C was attached with a probability of 99.8%. As shown in FIG. 1, the solder 3 was selectively concentrated at the tip of the lead, and the shape was reproduced well.

【0027】あらかじめ、0.5ミリピッチの実装配線
が施されたガラスエポキシ回路基板に、ハンダ印刷機
(NP−04AN2・日立テクノ製)を使い、パターン
が刻まれたNi製アデイティブ法のステンシルを挟みつ
つRAタイプの半田クリームを印刷した。チップマウン
ター(CM85C−ME・九州松下製)で、冠状部品
{電解コンデンサー・可変抵抗器}、チップ部品{コン
デンサー・抵抗・フィルター}等の部品を搭載した。
Using a solder printer (NP-04AN2, made by Hitachi Techno), a stencil made of Ni additive method is engraved on a glass epoxy circuit board having 0.5 mm pitch mounting wiring in advance. While printing RA type solder cream. A chip mounter (CM85C-ME, manufactured by Kyushu Matsushita) was used to mount parts such as coronal parts {electrolytic capacitor / variable resistor} and chip parts {capacitor / resistor / filter}.

【0028】前記回路基板のQFPランド部にフラック
スを塗布し、チップマウンターで、本発明の半導体素子
1を搭載した。図4のように上からレーザー光で本発明
のリード先端部2の半田を選択的に加熱し溶融し、接続
フィレットを形成し自重または治具加圧で沈み込ませ、
基板に半導体素子を実装し結合工程は終了した。
Flux was applied to the QFP land portion of the circuit board, and the semiconductor element 1 of the present invention was mounted by a chip mounter. As shown in FIG. 4, the solder of the lead tip portion 2 of the present invention is selectively heated and melted by laser light from above to form a connection fillet, which is sunk by its own weight or jig pressure.
The semiconductor element was mounted on the substrate and the bonding process was completed.

【0029】結果、本発明の半導体素子のリード端子の
フィレット形状は、図5に示すように確実に電気的な接
合と機械的強度の実現ができた。
As a result, the fillet shape of the lead terminal of the semiconductor element of the present invention could surely realize electrical connection and mechanical strength as shown in FIG.

【0030】図8の従来法で示したような半田クリーム
の過剰塗布・熱履歴によるブリッジ不良の発生は認めら
れなかった。かりに半導体素子の取扱い上のリード不揃
いやリード端子のそり上がりがあったとしても、ヒート
パルス方式の加熱ツール17でリードのばたつきを上か
ら抑え込んでしまうので、未半田や浮き不良の発生はな
く安定均一なフイレット形状の製造が可能となった。
No occurrence of bridging failure due to excessive application of solder cream and heat history as shown in the conventional method of FIG. Even if there is unevenness in the handling of the semiconductor elements or the lead terminals are warped, the heating tool 17 of the heat pulse method suppresses the flapping of the leads from the top, so there is no unsoldered or floating defect and it is stable. It has become possible to manufacture uniform fillet shapes.

【0031】個々のリード先端部の半田量が均一のた
め、過剰な半田量の横方向への飛び出しによるブリッジ
不良(図9)の発生や半田量のリード毎の遍在による未
半田不良(図10)の発生は皆無になった。
Since the amount of solder at the tip of each lead is uniform, a bridging defect (FIG. 9) occurs due to an excessive amount of solder popping out in the lateral direction, and an unsoldered defect due to the uneven distribution of the solder amount among the leads (see FIG. The occurrence of 10) has disappeared.

【0032】逆に0.65mmピッチとの混在による半
田量偏りへの改良へとつながった。その理由として、半
田量は基本的にリード先端の表面積に依存するため、リ
ード間隔つまりピッチ間隔が0.65mmになっても、
たとえ0.2mmになったとしても、上記の半田付け作
用は有効であるし、同様な作用が働くと考える。
On the contrary, it led to the improvement in the deviation of the amount of solder due to the mixture with the pitch of 0.65 mm. The reason is that the amount of solder basically depends on the surface area of the tips of the leads, so even if the lead spacing, that is, the pitch spacing is 0.65 mm,
Even if it becomes 0.2 mm, it is considered that the above-mentioned soldering action is effective and the same action works.

【0033】半田のプレコート方法としてリフローソル
ダーリング・半田クリーム印刷方法・溶融半田の滴下が
あり、加熱方法として、リフロー炉・赤外線炉・熱風循
環・レーザー加熱・光ビーム加熱・加熱ツール・エァヒ
ーター・ホットプレート・気化潜熱などがある。これら
の加熱方法は単独でも良くかつ、複数の併用や繰り返し
でも可能である。スピンコーターへのQFPの取付・取
り外しや基板へのマウントは、水平多関節型やスカラー
型などのロボットの使用を前提に高速化・量産化をはか
っている。
There are reflow soldering, solder cream printing, and molten solder dripping as solder precoating methods, and heating methods include reflow oven, infrared oven, hot air circulation, laser heating, light beam heating, heating tool, air heater, hot. There are plates and latent heat of vaporization. These heating methods may be used alone, or may be used in combination or repeatedly. Mounting / removing the QFP to / from the spin coater and mounting it on the board are intended for high speed / mass production, assuming the use of horizontal articulated robots or scalar robots.

【0034】比抵抗(Ω・cm)・接合強度(g/リート゛)・
フ゛リッシ゛不良発生率(%)・半田不良発生率(%)の各品
質特性を調べた結果を表1にまとめた。
Specific resistance (Ω ・ cm) ・ Joint strength (g / lead) ・
Table 1 shows the results of examining the quality characteristics of the bridging defect occurrence rate (%) and the solder defect occurrence rate (%).

【0035】[0035]

【表2】 [Table 2]

【0036】(実施例3)0.3ミリピッチ304ピン
のQFPを溶融状態の半田バスに0.5秒間漬け、リー
ド部に半田付け膜を図6のように5から45ミクロンの
厚さ回転させながら先端のみに半田を成形した。つまり
前記QFPをスピンコーター(MIKASA製1H−360)
に真空吸引(70cmHg)させセットする。リード先
端形状2は、0.12mm幅で0.10mm高さの断面
形状でリード長さ2.0mmで使用した。第一段階の回
転速度を260RPMとし8秒で立ち上げ、第二段階の
回転速度を1500RPMとし22秒間保持した条件設
定した。使われるフラックス組成に弱活性ロジン(RM
A)タイプの半田を第一段階の回転時から高周波で加熱
し始めた。スピンコーター5の回転による遠心力と温度
低下による粘性増加とが相まってリード先端部には、
0.12CCから0.20CCまでの半田量が99.8
%の確率で付いた。図1のようにリード先端部に選択的
に半田3が集中し形状を再現良く作った。
(Embodiment 3) A 0.3 mm pitch 304-pin QFP is immersed in a molten solder bath for 0.5 seconds, and a soldering film is rotated on the lead portion by a thickness of 5 to 45 microns as shown in FIG. While forming the solder only on the tip. In other words, the above QFP is a spin coater (1H-360 made by MIKASA)
Vacuum suction (70 cmHg) and set. The lead tip shape 2 was used with a cross-sectional shape of 0.12 mm width and 0.10 mm height and a lead length of 2.0 mm. The conditions were set such that the rotation speed in the first stage was 260 RPM, the startup was started in 8 seconds, and the rotation speed in the second stage was 1500 RPM, which was maintained for 22 seconds. Weakly active rosin (RM
A) type solder was started to be heated at high frequency from the first stage of rotation. The centrifugal force due to the rotation of the spin coater 5 and the increase in viscosity due to the temperature decrease are combined, and
Solder amount from 0.12CC to 0.20CC is 99.8
Attached with a probability of%. As shown in FIG. 1, the solder 3 was selectively concentrated at the tip of the lead, and the shape was reproduced well.

【0037】あらかじめ、0.3ミリピッチの実装配線
が施されたガラスエポキシ回路基板に、ハンダ印刷機
(NP−04AN2・日立テクノ製)を使い、パターン
が刻まれたNi製アデイティブ法のステンシルを挟みつ
つRAタイプの半田クリームを印刷した。
Using a solder printing machine (NP-04AN2, made by Hitachi Techno), a stencil made of Ni additive method is engraved on a glass epoxy circuit board having mounting wiring of 0.3 mm pitch in advance. While printing RA type solder cream.

【0038】前記回路基板のQFPランド部にフラック
スを塗布し、チップマウンターで、本発明の半導体素子
1を搭載した。上から高温加熱した窒素ガスで本発明の
リード先端部2を加熱し温度上昇させ、先端部の半田を
溶かしランドとの接続フィレット19を作成した。ブロ
ー停止させ冷却後では結合工程は終了した。
Flux was applied to the QFP land portion of the circuit board, and the semiconductor element 1 of the present invention was mounted by a chip mounter. The lead tip portion 2 of the present invention was heated from above with a nitrogen gas heated at a high temperature to raise the temperature, and the solder at the tip portion was melted to form a connection fillet 19 with a land. After stopping the blow and cooling, the bonding process was completed.

【0039】結果、本発明の半導体素子のリード端子の
フィレット形状は、図5に示すように確実に電気的な接
合と機械的強度の実現ができた。
As a result, the fillet shape of the lead terminal of the semiconductor element of the present invention could surely realize electrical connection and mechanical strength as shown in FIG.

【0040】図8の従来法で示したような半田クリーム
の過剰塗布・熱履歴によるブリッジ不良の発生は認めら
れなかった。
No occurrence of bridging failure due to excessive application of solder cream and heat history as shown in the conventional method of FIG.

【0041】かりに半導体素子の取扱い上のリード不揃
いやリード端子のそり上がりがあったとしても、セルフ
アライメント効果でリードを抑え込んでしまうので、未
半田や浮き不良の発生はなく安定均一なフイレット形状
の製造が可能となった。
Even if the semiconductor device is misaligned in the handling of the semiconductor element or the lead terminals are warped, the leads are suppressed by the self-alignment effect, so that there is no unsoldered or floating defect, and a stable and uniform fillet shape is obtained. It has become possible to manufacture.

【0042】個々のリード先端部の半田量が均一のた
め、過剰な半田量の横方向への飛び出しによるブリッジ
不良(図9)の発生や半田量のリード毎の遍在による未
半田不良(図10)の発生は皆無になった。
Since the amount of solder at the tip of each lead is uniform, a bridging defect (FIG. 9) occurs due to an excessive amount of solder popping out in the lateral direction, and an unsoldered defect due to uneven distribution of the amount of solder among the leads (FIG. 9). The occurrence of 10) has disappeared.

【0043】逆に0.65mmピッチとの混在による半
田量偏りへの改良へとつながった。その理由として、半
田量は基本的にリード先端の表面積に依存するため、リ
ード間隔つまりピッチ間隔が0.65mmになっても、
たとえ0.2mmになったとしても、上記の半田付け作
用は有効であるし、同様な作用が働くと考える。
On the contrary, it led to the improvement in the deviation of the amount of solder due to the mixture with the pitch of 0.65 mm. The reason is that the amount of solder basically depends on the surface area of the tips of the leads, so even if the lead spacing, that is, the pitch spacing is 0.65 mm,
Even if it becomes 0.2 mm, it is considered that the above-mentioned soldering action is effective and the same action works.

【0044】半田のプレコート方法としてリフローソル
ダーリング・半田クリーム印刷方法・溶融半田の滴下が
あり、加熱方法として、リフロー炉・赤外線炉・熱風循
環・レーザー加熱・光ビーム加熱・加熱ツール・エァヒ
ーター・ホットプレート・気化潜熱などがある。これら
の加熱方法は単独でも良くかつ、複数の併用や繰り返し
でも可能である。スピンコーターへのQFPの取付・取
り外しや基板へのマウントは、水平多関節型やスカラー
型などのロボットの使用を前提に高速化・量産化をはか
っている。
There are reflow soldering, solder cream printing, and molten solder dripping as solder precoating methods, and heating methods include reflow furnace, infrared furnace, hot air circulation, laser heating, light beam heating, heating tool, air heater, hot. There are plates and latent heat of vaporization. These heating methods may be used alone, or may be used in combination or repeatedly. Mounting / removing the QFP to / from the spin coater and mounting it on the board are intended for high speed / mass production, assuming the use of horizontal articulated robots or scalar robots.

【0045】比抵抗(Ω・cm)・接合強度(g/リート゛)・
フ゛リッシ゛不良発生率(%)・半田不良発生率(%)の各品
質特性を調べた結果を表1にまとめた。
Specific resistance (Ω ・ cm) ・ Joint strength (g / lead) ・
Table 1 shows the results of examining the quality characteristics of the bridging defect occurrence rate (%) and the solder defect occurrence rate (%).

【0046】[0046]

【表3】 [Table 3]

【0047】(従来例)次に図8と図11を使って従来
例を示す。0.5ミリピッチの実装配線が施されたガラ
スエポキシ回路基板に、ハンダ印刷機(NP−04AN
2・日立テクノ製)を使い、パターンが刻まれたSUS
製ステンシルを挟みつつ半田クリーム(PS10R−4
50A−F28・ハリマ化成製)を印刷した。チップマ
ウンター(CM85C−ME・九州松下製)で、半導体
素子{VSO・QFP・SOP・PQA・パワートラン
ジスタ}、冠状部品{電解コンデンサー・可変抵抗
器}、チップ部品{コンデンサー・抵抗・フィルター}
等の部品を搭載した。温度プロファイルを描きながら温
度制御可能なリフロー炉(九州松下製RF−10A)で
硬化した。初期摂氏180度で最高温度を摂氏235度
に設定し合計45秒間で硬化した。
(Conventional Example) Next, a conventional example will be described with reference to FIGS. Solder printer (NP-04AN) on glass epoxy circuit board with 0.5mm pitch mounting wiring.
2. SUS made by Hitachi Techno)
Solder cream (PS10R-4
50A-F28 manufactured by Harima Kasei Co., Ltd. was printed. Chip mounter (CM85C-ME, made by Kyushu Matsushita), semiconductor element {VSO / QFP / SOP / PQA / power transistor}, coronal component {electrolytic capacitor / variable resistor}, chip component {capacitor / resistor / filter}
It is equipped with parts such as. It was cured in a reflow furnace (RF-10A manufactured by Kyushu Matsushita) whose temperature can be controlled while drawing a temperature profile. The initial temperature of 180 degrees Celsius was set as the maximum temperature of 235 degrees Celsius, and curing was performed for 45 seconds in total.

【0048】結果、従来の半田クリームのリード端子の
フィレット形状は、図11に示すように数10ミクロン
の半田粒子20がペースト21内部に均一に分散する。
リフロー炉に実装回路基板を投入すると半田クリームが
溶融し、その後加熱接合された。図5は一般的な半田接
合後の断面図を示すが、溶融半田のリード端子14への
上昇が見られる。
As a result, in the fillet shape of the lead terminal of the conventional solder cream, the solder particles 20 of several tens of microns are uniformly dispersed in the paste 21 as shown in FIG.
When the mounted circuit board was put into the reflow furnace, the solder cream was melted and then heat-bonded. FIG. 5 shows a general cross-sectional view after solder bonding, but the rise of the molten solder to the lead terminals 14 can be seen.

【0049】作製される半導体素子のリード端子14の
フィレット形状は、図9に示すように塗布される半田ク
リーム量の増減や加わる熱量のバラツキにより、半導体
素子のリード端子14にブリッジ不良11が発生し易か
った。そのため微妙な湿度管理、粘度管理、スキージの
塗布スピード・圧力管理、ステンシルの裏面洗浄・耐久
性等が要求され、かつブリッジ不良・浮き不良などの後
修正が必要で、製造歩留りが悪いと言う欠点がある。
As for the fillet shape of the lead terminal 14 of the semiconductor element to be manufactured, a bridging defect 11 is generated in the lead terminal 14 of the semiconductor element due to the variation in the amount of applied solder cream and the variation in the amount of heat applied as shown in FIG. It was easy to do. Therefore, delicate humidity control, viscosity control, squeegee application speed / pressure control, stencil back surface cleaning / durability, etc. are required, and post-correction such as bridge failure / floating failure is required, resulting in poor production yield. There is.

【0050】比抵抗(Ω・cm)・接合強度(g/リート゛)・
フ゛リッシ゛不良発生率(%)・半田不良発生率(%)の各品
質特性を調べた結果を表1にまとめた。
Specific resistance (Ω ・ cm) ・ Joint strength (g / lead) ・
Table 1 shows the results of examining the quality characteristics of the bridging defect occurrence rate (%) and the solder defect occurrence rate (%).

【0051】[0051]

【表4】 [Table 4]

【0052】[0052]

【発明の効果】以上述べたように本発明の効果として
は、次の事が列挙出来る。
As described above, the following can be enumerated as the effects of the present invention.

【0053】 微細峡ピッチのQFPリード部に必要
十分の半田量を組成変更する事無しに付与することがで
き、部品の位置決め精度が、チップマウンターの機械的
精度以上に格段の精度向上が実現できる。
The necessary and sufficient amount of solder can be applied to the QFP lead portion of the fine gorge pitch without changing the composition, and the positioning accuracy of the parts can be significantly improved over the mechanical accuracy of the chip mounter. ..

【0054】 高価なメッキ装置を使わず、微妙な製
造条件出しにわずらわされずに、かつQFPの大きさ毎
に専用治具を準備する事なしに、スピンコーターの半田
粘度特性に応じた回転条件で簡便に、安価に高品質の半
田づけが実現でき、従来の印刷一括リフロー方式より少
ない半田消費量で品質・コストの効果が実現できた。
According to the solder viscosity characteristic of the spin coater, without using an expensive plating device, without being involved in delicate production condition setting, and without preparing a dedicated jig for each size of QFP. High-quality soldering can be realized easily and inexpensively under rotating conditions, and the quality and cost effects can be realized with less solder consumption than the conventional batch reflow printing method.

【0055】 半田ペーストを使用しないため、フロ
ンレス・地球環境保全活動になるとともに、作業環境・
安全衛生面でも優れている。
Since no solder paste is used, it becomes a CFC-less / global environment conservation activity,
Excellent in safety and health.

【0056】 とかく不均一N2雰囲気管理に敏感な
リフロー炉より、紫外線露光・硬化工程が小型に簡便化
でき、生産性の向上、品質の安定化、歩留りの向上が示
せた。
With the reflow furnace sensitive to the nonuniform N2 atmosphere control, the UV exposure / curing process can be simplified and downsized, and the productivity, the quality can be stabilized, and the yield can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の実施例1の半導体素子の半田形状を
示す断面構成図である。
FIG. 1 is a cross-sectional configuration diagram showing a solder shape of a semiconductor element according to a first embodiment of the present invention.

【図2】 本発明の実施例1のリード先端の半田付け処
理を示す断面構成図である。
FIG. 2 is a cross-sectional configuration diagram showing a soldering process of a lead tip according to the first embodiment of the present invention.

【図3】 本発明の実施例2の半導体素子の半田形状を
示す断面構成図である。
FIG. 3 is a sectional configuration diagram showing a solder shape of a semiconductor element of Example 2 of the present invention.

【図4】 本発明の実施例2のリード先端のレーザー加
熱工程を示す斜視図である。
FIG. 4 is a perspective view showing a laser heating process of a lead tip according to a second embodiment of the present invention.

【図5】 本発明のフィレット形状を示す断面構成図で
ある。
FIG. 5 is a cross-sectional configuration diagram showing a fillet shape of the present invention.

【図6】 本発明の実施例3のリード先端の高周波加熱
工程を示す斜視図である。
FIG. 6 is a perspective view showing a high-frequency heating process of a lead tip according to a third embodiment of the present invention.

【図7】 本発明の実施例1のリード先端の加熱ツール
の接合処理を示す断面構成図である。
FIG. 7 is a cross-sectional configuration diagram showing a joining process of the heating tool at the tip of the lead according to the first embodiment of the present invention.

【図8】 従来例の半田クリーム塗布後の印刷形状と位
置決めする半導体素子を示す斜視図である。
FIG. 8 is a perspective view showing a semiconductor element to be positioned and a printed shape after applying a solder cream in a conventional example.

【図9】 従来例のブリッジ不良の斜視図である。FIG. 9 is a perspective view of a bridging defect of a conventional example.

【図10】 従来例の未半田不良のフィレット形状を示
す断面構成図である。
FIG. 10 is a cross-sectional configuration diagram showing a fillet shape of a non-soldered defect of a conventional example.

【図11】 従来例の半田クリーム塗布後の印刷形状を
示す断面構成図である。
FIG. 11 is a cross-sectional configuration diagram showing a print shape after applying a solder cream in a conventional example.

【符号の説明】[Explanation of symbols]

1 本発明の半導体素子 2 リード端子 3 本発明のリード端子部の半田 4 溶融状態の半田 5 スピンコーター 6 飛散した半田 7 本発明のフロー後のリード端子部の半田 8 レーザー加熱素子 9 従来例の半導体素子 10 従来例3の印刷後の半田ペースト 11 ブリッジ不良の半田形状 12 ランド 13 未半田不良 14 従来例のリード 15 良好なフィレット形状 16 高周波加熱素子 17 加熱ツール形状 18 従来例のリード 19 接続フィレット 20 半田粒子 21 フラックス 1 Semiconductor Element of the Present Invention 2 Lead Terminal 3 Solder of Lead Terminal of the Present Invention 4 Solder Solder 5 Spin Coater 6 Scattered Solder 7 Solder of Lead Terminal after Flow of the Present Invention 8 Laser Heating Element 9 Conventional Example Semiconductor element 10 Solder paste after printing of Conventional Example 3 11 Solder shape with bridging failure 12 Land 13 Unsoldered failure 14 Lead of conventional example 15 Good fillet shape 16 High frequency heating element 17 Heating tool shape 18 Lead of conventional example 19 Connection fillet 20 solder particles 21 flux

Claims (11)

【特許請求の範囲】[Claims] 【請求項1】 実装基板と接続する半導体素子のリード
部の先端のみに半田を付与し、加熱ツールで圧着し基板
に固定する半導体素子実装構造において、 スピンコーターの回転軸上で回転中の半導体素子に溶融
半田を滴下し、前記リード先端のみに半田膜を成形した
後、フラックスを予め塗布した実装基板上の接続端子
(以下、ランドという)に加熱ツールで前記半田付け処理
したリード先端部を加圧固定し、半田を溶融し基板に半
導体素子を実装したことを特徴とする半導体素子実装構
造とその半田付け方法。
1. A semiconductor element mounting structure in which solder is applied only to the tips of the leads of a semiconductor element to be connected to a mounting board, and is crimped with a heating tool to be fixed to the board. A semiconductor rotating on a rotation axis of a spin coater. Molten solder is dropped onto the element, a solder film is formed only on the tip of the lead, and then a connection terminal on the mounting board on which flux has been applied in advance.
A semiconductor element mounting structure and a soldering method thereof, characterized in that the soldered lead tips are fixed under pressure (hereinafter referred to as lands) with a heating tool to melt the solder and mount the semiconductor element on a substrate.
【請求項2】 スピンコーターの回転軸上で回転中の半
導体素子に溶融半田を滴下し、前記リード先端のみに半
田膜を成形する方法の替わりに、 溶融状態の半田層(以下、フローという)に半導体素子
を漬け、リード部に半田付け膜を成形したことを特徴と
する請求項1記載の半導体素子実装構造とその半田付け
方法。
2. A solder layer in a molten state (hereinafter referred to as a flow) instead of a method of dropping molten solder onto a semiconductor element which is rotating on a rotation axis of a spin coater and forming a solder film only on the tip of the lead. 2. The semiconductor element mounting structure and the soldering method thereof according to claim 1, wherein the semiconductor element is dipped in and the soldering film is formed on the lead portion.
【請求項3】 スピンコーターの回転軸上で回転中の半
導体素子に溶融半田を滴下し、前記リード先端のみに半
田膜を成形する方法の替わりに、 半田フェーズ雰囲気中で半導体素子をスピンコーターで
回転させ、リード部に半田付け膜を成形したことを特徴
とする請求項1記載の半導体素子実装構造とその半田付
け方法。
3. A semiconductor element is spin-coated in a solder phase atmosphere in place of a method in which molten solder is dropped onto a semiconductor element rotating on a rotation axis of the spin coater and a solder film is formed only on the lead tips. The semiconductor element mounting structure and the soldering method thereof according to claim 1, wherein the lead part is rotated to form a soldering film.
【請求項4】 スピンコーターの回転軸上で回転中の半
導体素子に溶融半田を滴下し、前記リード先端のみに半
田膜を成形する方法の替わりに、 半導体素子のリード部に半田メッキと半田クリームをつ
け、スピンコーターで回転させながら加熱溶融し、リー
ド部に半田付け膜を成形したことを特徴とする請求項1
記載の半導体素子実装構造とその半田付け方法。
4. Instead of a method of dropping molten solder onto a semiconductor element that is rotating on the rotation axis of a spin coater and forming a solder film only on the tip of the lead, solder plating and solder cream are applied to the lead portion of the semiconductor element. 2. A soldering film is formed on the lead portion by heating and melting while rotating with a spin coater.
Described semiconductor device mounting structure and its soldering method.
【請求項5】 加熱ツールで前記半田付け処理したリー
ド先端部を加圧固定し、半田を溶融し基板に半導体素子
を固定する方法の替わりに、 リード先端に光ビームで加熱照射し、半田を溶融し自重
または治具加圧で沈み込ませ基板に半導体素子を実装し
たことを特徴とする請求項1記載の半導体素子実装構造
とその半田付け方法。
5. Instead of the method of press-fixing the soldered lead tips with a heating tool and melting the solder to fix the semiconductor element to the substrate, the lead tips are heated and irradiated with a light beam to remove the solder. 2. The semiconductor element mounting structure according to claim 1, wherein the semiconductor element is mounted on the substrate by melting and sinking it by its own weight or jig pressure.
【請求項6】 加熱ツールで前記半田付け処理したリー
ド先端部を加圧固定し、半田を溶融し基板に半導体素子
を固定する方法の替わりに、 レーザー光で前記リード部の半田を選択的に加熱し溶融
し自重または治具加圧で沈み込ませ基板に半導体素子を
実装したことを特徴とする請求項1記載の半導体素子実
装構造とその半田付け方法。
6. Instead of a method of press-fixing the soldered lead end portion with a heating tool and melting the solder to fix a semiconductor element to a substrate, the solder of the lead portion is selectively irradiated with laser light. 2. The semiconductor element mounting structure and the soldering method thereof according to claim 1, wherein the semiconductor element is mounted on the substrate by heating, melting, and sinking under the weight or jig pressure.
【請求項7】 加熱ツールで前記半田付け処理したリー
ド先端部を加圧固定し、半田を溶融し基板に半導体素子
を固定する方法の替わりに、 赤外線の放射熱で前記リード部の半田を選択的に加熱し
溶融し自重または治具加圧で沈み込ませ基板に半導体素
子を実装したことを特徴とする請求項1記載の半導体素
子実装構造とその半田付け方法。
7. The solder of the lead portion is selected by radiant heat of infrared rays instead of the method of press-fixing the soldered lead end portion with a heating tool and melting the solder to fix the semiconductor element to the substrate. 2. A semiconductor element mounting structure and a soldering method thereof according to claim 1, wherein the semiconductor element is mounted on the substrate by being heated and melted and sunk by self-weight or jig pressure.
【請求項8】 加熱ツールで前記半田付け処理したリー
ド先端部を加圧固定し、半田を溶融し基板に半導体素子
を固定する方法の替わりに、 熱風や高温窒素で前記リード部の半田を選択的に加熱し
溶融し自重または治具加圧で沈み込ませ基板に半導体素
子を実装したことを特徴とする請求項1記載の半導体素
子実装構造とその半田付け方法。
8. The solder of the lead portion is selected by hot air or high temperature nitrogen instead of the method of fixing the soldered lead end portion under pressure with a heating tool and melting the solder to fix the semiconductor element to the substrate. 2. A semiconductor element mounting structure and a soldering method thereof according to claim 1, wherein the semiconductor element is mounted on the substrate by being heated and melted and sunk by self-weight or jig pressure.
【請求項9】 使われる半田組成にスズ・ビスマス・鉛
やスズ・鉛・銀などの低融点半田の特性を加味できる金
属成分を0.1%から50%添加したことを特徴とする
請求項1記載の半導体素子実装構造とその半田付け方
法。
9. The solder composition used is characterized by containing 0.1% to 50% of a metal component such as tin, bismuth, lead, tin, lead, silver, etc., which can take into account the characteristics of low melting point solder. 1. A semiconductor element mounting structure according to 1, and a soldering method thereof.
【請求項10】 使われるフラックス組成に純ロジン
(R)・弱活性ロジン(RMA)・活性ロジン(RA)
やフェノール系などの合成樹脂やフッ素含有の合成活性
剤や有機酸・有機塩・合成樹脂などの低残さ用の特性を
加味できる成分を0.1%から100%添加したことを
特徴とする請求項1記載の半導体素子実装構造とその半
田付け方法。
10. The flux composition used is pure rosin (R) / weakly active rosin (RMA) / active rosin (RA).
Claims characterized by adding 0.1% to 100% of a component capable of adding characteristics for low residue such as synthetic resin such as phenol and phenol, synthetic activator containing fluorine, organic acid, organic salt, synthetic resin, etc. Item 1. A semiconductor element mounting structure according to item 1 and a soldering method thereof.
【請求項11】 使われるフラックス組成に水溶性の無
機酸・無機塩・有機酸・塩基・有機塩・有機ハロゲンを
添加したことを特徴とする請求項1記載の半導体素子実
装構造とその半田付け方法。
11. The semiconductor element mounting structure and its soldering according to claim 1, wherein a water-soluble inorganic acid / inorganic salt / organic acid / base / organic salt / organic halogen is added to the flux composition used. Method.
JP4153831A 1992-06-12 1992-06-12 Molding structure for semiconductor element and soldering method therefor Pending JPH05347373A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4153831A JPH05347373A (en) 1992-06-12 1992-06-12 Molding structure for semiconductor element and soldering method therefor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4153831A JPH05347373A (en) 1992-06-12 1992-06-12 Molding structure for semiconductor element and soldering method therefor

Publications (1)

Publication Number Publication Date
JPH05347373A true JPH05347373A (en) 1993-12-27

Family

ID=15571046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4153831A Pending JPH05347373A (en) 1992-06-12 1992-06-12 Molding structure for semiconductor element and soldering method therefor

Country Status (1)

Country Link
JP (1) JPH05347373A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6433417B1 (en) * 1998-03-06 2002-08-13 Rohm Co., Ltd. Electronic component having improved soldering performance and adhesion properties of the lead wires
JP2016092040A (en) * 2014-10-29 2016-05-23 タツタ電線株式会社 Printed circuit board, manufacturing method of printed circuit board, and joining method for conductive member
JP2016225407A (en) * 2015-05-28 2016-12-28 三菱電機株式会社 Solder coating formation device, solder coating formation method and semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6433417B1 (en) * 1998-03-06 2002-08-13 Rohm Co., Ltd. Electronic component having improved soldering performance and adhesion properties of the lead wires
JP2016092040A (en) * 2014-10-29 2016-05-23 タツタ電線株式会社 Printed circuit board, manufacturing method of printed circuit board, and joining method for conductive member
JP2016225407A (en) * 2015-05-28 2016-12-28 三菱電機株式会社 Solder coating formation device, solder coating formation method and semiconductor device

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