JPH0534736U - Integrated circuit for China - Google Patents

Integrated circuit for China

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Publication number
JPH0534736U
JPH0534736U JP9054791U JP9054791U JPH0534736U JP H0534736 U JPH0534736 U JP H0534736U JP 9054791 U JP9054791 U JP 9054791U JP 9054791 U JP9054791 U JP 9054791U JP H0534736 U JPH0534736 U JP H0534736U
Authority
JP
Japan
Prior art keywords
signal
uhf
vhf
circuit
oscillation signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9054791U
Other languages
Japanese (ja)
Inventor
進 牛田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alps Alpine Co Ltd
Original Assignee
Alps Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alps Electric Co Ltd filed Critical Alps Electric Co Ltd
Priority to JP9054791U priority Critical patent/JPH0534736U/en
Priority to GB9219308A priority patent/GB2260455B/en
Publication of JPH0534736U publication Critical patent/JPH0534736U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】 【構成】 VHF発振信号(又は、UHF発振信号)の
伝送経路上に設けられた分岐点と周波数変換回路10と
の間に、発振信号増幅回路22を挿入する。 【効果】 PLL増幅回路14へのVHF発振信号(又
は、UHF発振信号)の入力レベルが高周波数帯域にお
いて著しく低下することがなくなるとともに、大レベル
のVHF RF信号(又は、UHF RF信号)が入力
した場合でもPLLの誤動作がなくなる。
(57) [Summary] [Configuration] An oscillation signal amplifier circuit 22 is inserted between a branch point provided on a transmission path of a VHF oscillation signal (or a UHF oscillation signal) and the frequency conversion circuit 10. [Effect] While the input level of the VHF oscillation signal (or UHF oscillation signal) to the PLL amplifier circuit 14 does not drop significantly in the high frequency band, a high level VHF RF signal (or UHF RF signal) is input. Even if it does, the malfunction of the PLL is eliminated.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案は、VHF帯又はUHF帯の高周波信号が入力され、この高周波信号を 中間周波数信号へ変換して出力するチューナ用集積回路に関する。 The present invention relates to a tuner integrated circuit which receives a VHF band or UHF band high frequency signal, converts the high frequency signal into an intermediate frequency signal, and outputs the intermediate frequency signal.

【0002】[0002]

【従来の技術】[Prior Art]

図3は、本出願人の平成3年9月13日付実用新案登録出願に係るチューナ回 路を示したブロック図であり、点線枠内は、チューナ用集積回路(以下、集積回 路を「IC」と略称する。)を表わし、点線枠外は、IC周辺回路を表わす。 以下に、図3のチューナ回路についての構成・作用を説明する。 1は、VHF/UHF切換信号の入力端子であり、例えば、VHF高周波信号 (以下、高周波信号を「RF信号」と略称する。)受信時は、低レベルの切換信 号が入力され、UHF RF信号受信時は、高レベルの切換信号が入力される。 2は、VHF RF信号入力端子であり、3は、UHF RF信号入力端子であ る。4は、VHF/UHF切換回路であり、端1よりVHF/UHF切換信号が 入力され、VHF RF信号受信時は、VHF RF増幅回路8、VHF発振回 路6、VHF増幅回路7を動作状態とし、UHF RF増幅回路9、UHF発振 回路13、UHF増幅回路11を非動作状態とする。また、UHF RF信号受 信時は、VHF RF増幅回路8、VHF発振回路6、VHF増幅回路7を非動 作状態とし、UHF RF増幅回路9、UHF発振回路13、UHF増幅回路1 1を動作状態とする。 FIG. 3 is a block diagram showing a tuner circuit according to the applicant's utility model registration application dated September 13, 1991, and a dotted line frame indicates an integrated circuit for a tuner (hereinafter, the integrated circuit will be referred to as “IC”). Is abbreviated as “.”, And the area outside the dotted line frame indicates the IC peripheral circuit. The configuration and operation of the tuner circuit of FIG. 3 will be described below. Reference numeral 1 denotes an input terminal for a VHF / UHF switching signal. For example, when receiving a VHF high frequency signal (hereinafter, the high frequency signal is abbreviated as "RF signal"), a low level switching signal is input and UHF RF signal is input. A high-level switching signal is input during signal reception. Reference numeral 2 is a VHF RF signal input terminal, and reference numeral 3 is a UHF RF signal input terminal. Reference numeral 4 denotes a VHF / UHF switching circuit, which receives a VHF / UHF switching signal from the terminal 1 and activates the VHF RF amplification circuit 8, the VHF oscillation circuit 6, and the VHF amplification circuit 7 when receiving the VHF RF signal. , UHF RF amplifier circuit 9, UHF oscillation circuit 13, and UHF amplifier circuit 11 are deactivated. When receiving the UHF RF signal, the VHF RF amplification circuit 8, the VHF oscillation circuit 6, and the VHF amplification circuit 7 are deactivated, and the UHF RF amplification circuit 9, the UHF oscillation circuit 13, and the UHF amplification circuit 11 are operated. State.

【0003】 5は、VHF共振回路18とVHF発振回路6との接続端子である。6は、V HF RF信号を中間周波数信号(以下、中間周波数を「IF」と略称する。) へ変換する為のVHF発振信号を生成するVHF発振回路である。7は、VHF 発振回路で生成されたVHF発振信号を増幅するVHF増幅回路である。8は、 端子2より入力されたVHF RF信号を増幅するVHF増幅回路である。9は 、端子3より入力されたUHF RF信号を増幅するUHF増幅回路である。Reference numeral 5 is a connection terminal between the VHF resonance circuit 18 and the VHF oscillation circuit 6. Reference numeral 6 is a VHF oscillation circuit for generating a VHF oscillation signal for converting the VHF RF signal into an intermediate frequency signal (hereinafter, the intermediate frequency is abbreviated as "IF"). A VHF amplifier circuit 7 amplifies the VHF oscillation signal generated by the VHF oscillation circuit. A VHF amplifier circuit 8 amplifies the VHF RF signal input from the terminal 2. Reference numeral 9 is a UHF amplifier circuit that amplifies the UHF RF signal input from the terminal 3.

【0004】 10は、VHF増幅回路7(又は、UHF増幅回路11)より出力されるVH F発振信号(又は、UHF発振信号)と、VHF RF増幅回路8(又は、UH F RF増幅回路9)より出力されるVHF RF信号(又は、UHF RF信 号)とが入力され、VHF発振信号(又は、UHF発振信号)によって、VHF RF信号(又は、UHF RF信号)をIF信号へ変換して出力する周波数変 換回路である。11は、UHF発振回路13で生成されたUHF発振信号を増幅 するUHF増幅回路である。12は、UHF共振回路19とUHF発振回路13 との接続端子である。13は、UHF RF信号をIF信号へ変換する為のUH F発振信号を生成するUHF発振回路である。14は、VHF発振信号(又は、 UHF発振信号)の一部が入力され、これらを増幅し、PLLサンプリング信号 として出力するPLL増幅回路であり、15は、PLLサンプリング信号出力端 子である。Reference numeral 10 denotes a VHF oscillation signal (or a UHF oscillation signal) output from the VHF amplification circuit 7 (or a UHF amplification circuit 11) and a VHF RF amplification circuit 8 (or a UHF RF amplification circuit 9). The VHF RF signal (or UHF RF signal) output from is input, and the VHF RF signal (or UHF RF signal) is converted to an IF signal and output by the VHF oscillation signal (or UHF oscillation signal) Frequency conversion circuit. A UHF amplifier circuit 11 amplifies the UHF oscillation signal generated by the UHF oscillation circuit 13. Reference numeral 12 is a connection terminal between the UHF resonance circuit 19 and the UHF oscillation circuit 13. A UHF oscillation circuit 13 generates a UHF oscillation signal for converting the UHF RF signal into an IF signal. Reference numeral 14 is a PLL amplifier circuit that receives a part of the VHF oscillation signal (or UHF oscillation signal), amplifies these, and outputs them as a PLL sampling signal. Reference numeral 15 is a PLL sampling signal output terminal.

【0005】 16は、周波数変換回路10より出力されるIF信号を増幅するIF増幅回路 であり、17は、IF信号出力端子である。18は、VHF発振信号周波数を設 定する為のVHF共振回路であり、19は、UHF発振信号周波数を設定する為 のUHF共振回路である。20は、平衡・不平衡変換回路21からのPLLサン プリング信号が入力され、これらの信号に基づいて、発振周波数制御信号を生成 し、VHF共振回路18又は、UHF共振回路19へ、発振周波数制御信号を出 力するPLL回路である。21は、端子15より出力される平衡PLLサンプリ ング信号を不平衡PLLサンプリング信号へ変換する平衡・不平衡変換回路であ る。Reference numeral 16 is an IF amplifier circuit that amplifies the IF signal output from the frequency conversion circuit 10, and 17 is an IF signal output terminal. Reference numeral 18 is a VHF resonance circuit for setting the VHF oscillation signal frequency, and 19 is a UHF resonance circuit for setting the UHF oscillation signal frequency. The PLL sampling signals from the balanced / unbalanced conversion circuit 21 are input to the circuit 20, which generates an oscillation frequency control signal based on these signals and outputs the oscillation frequency control signal to the VHF resonance circuit 18 or the UHF resonance circuit 19. It is a PLL circuit that outputs a signal. Reference numeral 21 denotes a balanced / unbalanced conversion circuit for converting the balanced PLL sampling signal output from the terminal 15 into an unbalanced PLL sampling signal.

【0006】[0006]

【考案が解決しようとする課題】[Problems to be solved by the device]

上述したチューナ用集積回路においては、周波数変換回路におけるVHF発振 信号(又は、UHF発振信号)入力端子での入力インピーダンスは、周波数変換 回路内部の分布容量等の影響により、高周波数帯域において、大きく低下する為 、PLL増幅回路へのVHF発振信号(又は、UHF発振信号)の入力レベルも 高周波数帯域において大きく低下するという欠点があった。 また、大レベルのVHF RF信号(又は、UHF RF信号)が入力した場 合、それらの信号が、VHF RF増幅回路(又は、UHF RF増幅回路)を 経由して、周波数変換回路のVHF発振信号(又は、UHF発振信号)の入力端 子より出力され、PLL増幅回路へ入力される為、PLL誤動作を引き起こすと いう可能性もあった。 従って、本考案の目的は、PLL増幅回路へのVHF発振信号(又は、UHF 発振信号)の入力レベルが高周波数帯域においても大きく低下することがなく、 大レベルのVHF RF信号(又は、UHF RF信号)が入力した場合でもP LLの誤動作がなくなるというチューナ用集積回路を提供することにある。 In the tuner integrated circuit described above, the input impedance at the VHF oscillation signal (or UHF oscillation signal) input terminal in the frequency conversion circuit is greatly reduced in the high frequency band due to the influence of the distributed capacitance inside the frequency conversion circuit. Therefore, there is a drawback in that the input level of the VHF oscillation signal (or UHF oscillation signal) to the PLL amplifier circuit also drops significantly in the high frequency band. In addition, when a high level VHF RF signal (or UHF RF signal) is input, those signals pass through the VHF RF amplifier circuit (or UHF RF amplifier circuit) and then the VHF oscillation signal of the frequency conversion circuit. (Or, the UHF oscillation signal) is output from the input terminal and input to the PLL amplifier circuit, which may cause a PLL malfunction. Therefore, an object of the present invention is that the input level of a VHF oscillation signal (or UHF oscillation signal) to a PLL amplifier circuit does not drop significantly even in a high frequency band, and a large level VHF RF signal (or UHF RF signal). It is an object of the present invention to provide an integrated circuit for a tuner that eliminates the malfunction of PLL even when a signal) is input.

【0007】[0007]

【課題を解決する為の手段】[Means for solving the problem]

上記課題を解決する為に本考案は、VHF発振回路で生成されるVHF発振信 号が入力され、該VHF発振信号を増幅して出力するVHF増幅回路と、UHF 発振回路で生成されるUHF発振信号が入力され、該UHF発振信号を増幅して 出力するUHF増幅回路と、VHF帯又はUHF帯の高周波信号と、前記VHF 増幅回路又は、前記UHF増幅回路より出力される前記VHF発振信号又は前記 UHF発振信号とが入力され、前記VHF帯又はUHF帯の高周波信号を中間周 波数信号へ変換して出力する周波数変換回路と、前記VHF増幅回路又は前記U HF増幅回路と前記周波数変換回路とを結合する前記VHF発振信号又は前記U HF発振信号の伝送経路上に設けた分岐点と、該分岐点より取り出される前記V HF発振信号又は前記UHF発振信号が入力され、前記VHF発振信号又は前記 UHF発振信号を増幅して、PLLサンプリング信号として出力するPLL増幅 回路とを有するチューナ用集積回路において前記分岐点と、前記周波数変換回路 との間に、前記VHF発振信号又は前記UHF発振信号が入力され、前記VHF 発振信号又は前記UHF発振信号を増幅して、前記周波数変換回路へ出力する発 振信号増幅回路を挿入したことを特徴とする。 In order to solve the above problems, the present invention is directed to a VHF oscillation signal generated by a VHF oscillation circuit, which amplifies and outputs the VHF oscillation signal, and a UHF oscillation generated by the UHF oscillation circuit. A UHF amplifier circuit that receives a signal, amplifies and outputs the UHF oscillation signal, a high-frequency signal in the VHF band or the UHF band, the VHF amplifier circuit, or the VHF oscillation signal output from the UHF amplifier circuit or the A UHF oscillation signal is input, and a frequency conversion circuit that converts the VHF band or UHF band high frequency signal into an intermediate frequency signal and outputs it, and the VHF amplification circuit or the UHF amplification circuit and the frequency conversion circuit. A branch point provided on the transmission path of the VHF oscillation signal or the UHF oscillation signal to be coupled, and the VHF oscillation signal or the branch point extracted from the branch point. In the tuner integrated circuit having a PLL amplifier circuit to which the UHF oscillation signal is input and which amplifies the VHF oscillation signal or the UHF oscillation signal and outputs it as a PLL sampling signal, the branch point and the frequency conversion circuit The VHF oscillation signal or the UHF oscillation signal is input in between, and an oscillation signal amplification circuit for amplifying the VHF oscillation signal or the UHF oscillation signal and outputting the amplified signal to the frequency conversion circuit is inserted. .

【0008】[0008]

【作用】 上記技術的手段は、次のように作用する。 VHF増幅回路(又は、UHF増幅回路)より出力されるVHF発振信号(又 は、UHF発振信号)は、発振信号増幅回路を経て、周波数変換回路へ入力され るとともに、VHF増幅回路(又は、UHF増幅回路)と発振信号増幅回路とを 結合するVHF発振信号(又は、UHF発振信号)の伝送経路上に設けられた分 岐点よりPLL増幅回路へも入力される。[Operation] The above technical means operates as follows. The VHF oscillation signal (or UHF oscillation signal) output from the VHF amplification circuit (or UHF amplification circuit) is input to the frequency conversion circuit through the oscillation signal amplification circuit, and at the same time the VHF amplification circuit (or UHF) is input. (Amplification circuit) and the oscillation signal amplification circuit, the VHF oscillation signal (or UHF oscillation signal) is also input to the PLL amplification circuit from a branch point provided on the transmission path.

【0009】[0009]

【実施例】【Example】

以下、本考案の実施例を図面に基づいて説明する。 図1は、ブロック図で示された一実施例であり、点線枠内はICを、点線枠外 は、IC周辺回路を表わす。図2は、図1中の発振信号増幅回路22の構成例を 示す詳細回路図である。 まず、図1を参照して、構成・作用を説明する。図3と同一のブロックについ ては、同一の番号を符して説明を省略する。 22は、VHF発振信号(又は、UHF発振信号)が入力され、これらの信号 を増幅して周波数変換回路10へ出力する発振信号増幅回路である。 この実施例が図3に示す従来例と異なる点は、VHF発振信号(又は、UHF 発振信号)の伝送経路上に設けられた分岐点と周波数変換回路10の間に発振信 号増幅回路22を挿入したことである。 Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is an embodiment shown in a block diagram, in which an IC is shown inside a dotted line frame and an IC peripheral circuit is shown outside the dotted line frame. FIG. 2 is a detailed circuit diagram showing a configuration example of the oscillation signal amplifier circuit 22 in FIG. First, the configuration and operation will be described with reference to FIG. The same blocks as those in FIG. 3 are denoted by the same reference numerals and the description thereof will be omitted. Reference numeral 22 is an oscillation signal amplifier circuit to which the VHF oscillation signal (or UHF oscillation signal) is input and which amplifies these signals and outputs them to the frequency conversion circuit 10. This embodiment is different from the conventional example shown in FIG. 3 in that an oscillating signal amplifier circuit 22 is provided between a branch point provided on a VHF oscillation signal (or UHF oscillation signal) transmission path and the frequency conversion circuit 10. It is inserted.

【0010】 以上により、発振信号増幅回路22の入力インピーダンスが低周波数帯域から 高周波数帯域まで非常に高い為、PLL増幅回路14へのVHF発振信号(又は 、UHF発振信号)の入力レベルが高周波数帯域において著しく低下するという 問題がなくなった。 また、大レベルのVHF RF信号(又は、UHF RF信号)が入力した場 合、それらの信号が、VHF RF増幅回路8(又は、UHF RF増幅回路9 )を経由して、周波数変換回路10のVHF発振信号(又は、UHF発振信号) の入力端子より出力されても、発振信号増幅回路22の逆方向アイリレーション が大きい為、PLL増幅回路14へ入力されることがなくなり、PLL誤動作を 引き起こすことがなくなった。As described above, since the input impedance of the oscillation signal amplifier circuit 22 is extremely high from the low frequency band to the high frequency band, the input level of the VHF oscillation signal (or UHF oscillation signal) to the PLL amplifier circuit 14 is high. The problem of a significant drop in bandwidth is gone. In addition, when a large level VHF RF signal (or UHF RF signal) is input, those signals pass through the VHF RF amplifier circuit 8 (or UHF RF amplifier circuit 9) and are fed to the frequency conversion circuit 10. Even if the VHF oscillation signal (or the UHF oscillation signal) is output from the input terminal, the oscillation signal amplification circuit 22 has a large reverse direction iris, so that it is not input to the PLL amplification circuit 14 and causes a PLL malfunction. Is gone.

【0011】 次に、図2について説明する。 トランジスタ32,33は、信号増幅を行ない、定電圧電源38は、トランジ スタ32,33にコレクタ電流を供給する。抵抗34〜37は、トランジスタ3 2,33へベース・バイアス電圧を供給する為の抵抗である。トランジスタ39 ,40は定電流回路用トランジスタであり、定電圧電源43および抵抗41,4 2で設定される定電流を流す。 入力端子31より入力されたVHF発振信号(又は、UHF発振信号)は、ト ランジスタ32,33で増幅され、出力端子44より出力される。Next, FIG. 2 will be described. The transistors 32 and 33 perform signal amplification, and the constant voltage power supply 38 supplies collector currents to the transistors 32 and 33. The resistors 34 to 37 are resistors for supplying a base bias voltage to the transistors 32 and 33. Transistors 39 and 40 are transistors for a constant current circuit, and flow a constant current set by a constant voltage power source 43 and resistors 41 and 42. The VHF oscillation signal (or UHF oscillation signal) input from the input terminal 31 is amplified by the transistors 32 and 33 and output from the output terminal 44.

【0012】[0012]

【考案の効果】[Effect of the device]

以上説明して来た様に、本考案によれば、VHF発振信号(又は、UHF発振 信号)の伝送経路上に設けられた分岐点と周波数変換回路との間に発振信号増幅 回路を挿入したことにより、PLL増幅回路へのVHF発振信号(又は、UHF 発振信号)の入力レベルが高周波数帯域において著しく低下することがなくなる とともに、大レベルのVHF RF信号(又は、UHF RF信号)が入力した 場合でもPLLの誤作動がなくなるという顕著なる効果が得られる。 As described above, according to the present invention, the oscillation signal amplification circuit is inserted between the branch point provided on the transmission path of the VHF oscillation signal (or the UHF oscillation signal) and the frequency conversion circuit. As a result, the input level of the VHF oscillation signal (or UHF oscillation signal) to the PLL amplifier circuit does not drop significantly in the high frequency band, and a large level VHF RF signal (or UHF RF signal) is input. Even in this case, the remarkable effect that the malfunction of the PLL is eliminated can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本考案の一実施例によるチューナ用IC及びそ
の周辺回路のブロック図である。
FIG. 1 is a block diagram of a tuner IC and its peripheral circuit according to an embodiment of the present invention.

【図2】図1中における発振信号増幅回路の詳細な電気
回路図である。
FIG. 2 is a detailed electric circuit diagram of an oscillation signal amplifier circuit in FIG.

【図3】従来のチューナ用IC及びその周辺回路のブロ
ック図である。
FIG. 3 is a block diagram of a conventional tuner IC and its peripheral circuit.

【符号の説明】[Explanation of symbols]

7 VHF増幅回路 10 周波数変換回路 11 UHF増幅回路 14 PLL増幅回路 22 発振信号増幅回路 7 VHF amplification circuit 10 Frequency conversion circuit 11 UHF amplification circuit 14 PLL amplification circuit 22 Oscillation signal amplification circuit

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】 VHF発振回路で生成されるVHF発振
信号が入力され、該VHF発振信号を増幅して出力する
VHF増幅回路と、UHF発振回路で生成されるUHF
発振信号が入力され、該UHF発振信号を増幅して出力
するUHF増幅回路と、VHF帯又はUHF帯の高周波
信号と、前記VHF増幅回路又は、前記UHF増幅回路
より出力される前記VHF発振信号又は前記UHF発振
信号とが入力され、前記VHF帯又はUHF帯の高周波
信号を中間周波数信号へ変換して出力する周波数変換回
路と、前記VHF増幅回路又は前記UHF増幅回路と前
記周波数変換回路とを結合する前記VHF発振信号又は
前記UHF発振信号の伝送経路上に設けた分岐点と、該
分岐点より取り出される前記VHF発振信号又は前記U
HF発振信号が入力され、前記VHF発振信号又は前記
UHF発振信号を増幅して、PLLサンプリング信号と
して出力するPLL増幅回路とを、有するチューナ用集
積回路において、 前記分岐点と、前記周波数変換回路との間に、前記VH
F発振信号又は前記UHF発振信号が入力され、前記V
HF発振信号又は前記UHF発振信号を増幅して、前記
周波数変換回路へ出力する発振信号増幅回路を挿入した
ことを特徴とするチューナ用集積回路。
1. A VHF amplifier circuit which receives a VHF oscillation signal generated by a VHF oscillation circuit, amplifies and outputs the VHF oscillation signal, and a UHF generated by the UHF oscillation circuit.
A UHF amplifier circuit that receives an oscillation signal and amplifies and outputs the UHF oscillation signal, a high-frequency signal in the VHF band or the UHF band, the VHF amplifier circuit, or the VHF oscillation signal output from the UHF amplifier circuit or A frequency conversion circuit that receives the UHF oscillation signal and converts the high-frequency signal of the VHF band or the UHF band into an intermediate frequency signal and outputs the intermediate frequency signal, and the VHF amplification circuit or the UHF amplification circuit and the frequency conversion circuit A branch point provided on the transmission path of the VHF oscillation signal or the UHF oscillation signal, and the VHF oscillation signal or the U extracted from the branch point.
A tuner integrated circuit having a PLL amplifier circuit that receives an HF oscillation signal, amplifies the VHF oscillation signal or the UHF oscillation signal, and outputs the amplified signal as a PLL sampling signal, wherein the branch point and the frequency conversion circuit are included. During the VH
F oscillation signal or the UHF oscillation signal is input,
An integrated circuit for a tuner, wherein an oscillating signal amplifying circuit for amplifying an HF oscillating signal or the UHF oscillating signal and outputting the amplified signal to the frequency converting circuit is inserted.
JP9054791U 1991-09-13 1991-10-08 Integrated circuit for China Pending JPH0534736U (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP9054791U JPH0534736U (en) 1991-10-08 1991-10-08 Integrated circuit for China
GB9219308A GB2260455B (en) 1991-09-13 1992-09-11 Tuner for radio-frequency signals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9054791U JPH0534736U (en) 1991-10-08 1991-10-08 Integrated circuit for China

Publications (1)

Publication Number Publication Date
JPH0534736U true JPH0534736U (en) 1993-05-07

Family

ID=14001445

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9054791U Pending JPH0534736U (en) 1991-09-13 1991-10-08 Integrated circuit for China

Country Status (1)

Country Link
JP (1) JPH0534736U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03195137A (en) * 1989-12-22 1991-08-26 Alps Electric Co Ltd Tuning circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03195137A (en) * 1989-12-22 1991-08-26 Alps Electric Co Ltd Tuning circuit

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