JPH05343488A - Semiconductor device - Google Patents

Abstract

PURPOSE:To easily inspect a wiring pattern which is formed on a base substrate for a multichip module as one kind of semiconductor device. CONSTITUTION:Short-circuiting circuits 100a, 100b which are formed in the following manner are formed between a pad 8a and a pad 8c as well as between a pad 8b and the pad 8c for wiring patterns 9a, 10, 9b formed on a base substrate: the circuits are connection aggregates of wiring patterns which are connected electrically to the pads; they are cut after an inspection has been finished; and the wiring patterns 9a, 10, 9b are returned to interconnections which are electrically independent of each other. As a result, the number of parts to be probed is reduced largely, and a probe card can be former actually.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a wiring board (hereinafter referred to as a base board) on which an IC is mounted in a semiconductor device called a multi chip module (MCM). The present invention relates to the one that can achieve the simplification of the inspection.

[0002]

2. Description of the Related Art A multi-chip module directly mounts a plurality of bare chips, that is, unpackaged IC chips on a lead frame (in the case of a plastic package) or a base substrate (in the case of a ceramic package) in the same package. Since it is mounted, the package of the chip itself is not required, so the inductance and capacitance are reduced. At the same time, the packaging density is also improved, so that the wiring between chips is shortened and the signal propagation delay time is also shortened. Therefore, it is said that the use of the multi-chip module enables the CPU module to operate at 100 MHz, which is not possible with the board mounting method.

It should be noted that ceramic packages are generally used in fields where high reliability is required or heat generation countermeasures are required, such as CPU modules of workstations, and plastic packages are used in fields where low cost is intended. Is generally used.

FIG. 6 is a diagram showing a general structure of a multi-chip module using a ceramic package.

As shown in this figure, the multi-chip module comprises a plurality of IC chips 3, a base substrate 2 which is a wiring substrate on which the IC chips 3 are mounted, and a package 1 which houses the base substrate in its cavity (recess) 1a. It is configured. For the connection between the IC chip 3 and the base substrate 2, a wire bonding method such as an Al wire 4 or a mounting method such as a flip chip is used.

FIG. 7 shows an example of the pattern of the base substrate 2. The pattern of the base substrate includes bonding pads 6 for connection between the base substrate 2 and the package 1, bonding pads 8 for connection between the IC 3 and the base substrate 2,
The wiring pattern 9 connects these pads.

The wiring of the base substrate 2 is, as shown in an example in FIG. 7, on the substrate of the base substrate 2 a bonding pad 6 between the base substrate 2 and the package 1 (hereinafter referred to as A pad) 6 and the base substrate 2. Wiring 9 is formed between the IC-bonding pad (hereinafter, referred to as B pad) 8 for IC3. Further, as shown as an example in FIG. 7 as 10, there are wirings between the A pads, between the B pads, and between the plurality of pads.

The mounting position of the IC 3 on this base substrate is shown by a broken line 7 in FIG. When mounting is performed by the wire bonding method, the bonding pad 6 is connected to the inner lead of the package 1, and the bonding pad 8 is connected to the bonding pad of the IC 3.

Next, an example of the cross-sectional structure of the base substrate 2 is shown in FIG. As the base substrate, an insulating film 12 made of SiO ₂ , Si ₃ N ₄ , polyimide or the like is formed on a substrate body 11 made of silicon, ceramic or the like, and a wiring film and a pattern are formed on the insulating film 12 to form Al, Cu. , Cr, etc., the first wiring layer 13 is formed. Furthermore, polyimide and S
The interlayer insulating film 14 of iO ₂ or the like is formed together with the contact hole, and thereafter, a plurality of wiring layers and interlayer insulating films are alternately formed, and finally the protective film 18 is formed together with the opening of the bonding pad. ..

Then, in order to inspect the completed base substrate 5, as shown in FIG. 9, it is sufficient to detect disconnection of wiring, short circuit between wirings, capacitance accompanying wiring, wiring resistance and the like. , Base substrate-package bonding pad (A pad) 6 and base substrate-I
The needles 43 and 44 of the probe card may be brought into contact with both of the bonding pads (B pad) 8 for connecting the C chips, and the electrical inspection may be performed.

[0011]

[Problems to be Solved by the Invention]
The base board of the module is configured as described above, and when inspecting the wiring inside the base board,
It was necessary to bring the needle of the probe card into contact with both the bonding pad (A pad) for connecting between packages and the bonding pad (B pad) for connecting between the base substrate and the IC chip to perform the electrical inspection.

By the way, for example, a 32-bit RISC (Red
uced Instruction Set Computer) CPU 1 chip, F
In the case of a multi-chip module in which a PU (Floating Point Processing Unit) is mounted on one chip and a cache memory is mounted on four chips, its base substrate has an outer peripheral pad (A pad) of, for example, 250 pads and a chip mounting connection pad (B pad). However, the CPU has, for example, 180 pads, FPU
For example, 80 pads, and each cache memory has, for example, 40 pads
Pads, that is, 160 chips with 4 chips, total 4
20 pads are required. Therefore, as many as 670 pads are required for the entire base substrate.

For this reason, the probe card, which is probing all the pads at once, necessarily has a large number of pins. Further, not only the probe card has a large number of pins but also the A pad on the outer peripheral portion of the substrate. Not only that, but the B pad also exists inside the substrate, making it extremely difficult to make a probe card that depends on manual work.

Further, even if such a probe card could be actually manufactured, it would be very expensive, resulting in an increase in cost of the multichip module. It was

In addition, at the time of inspection, there is a problem that the probability of occurrence of the problem of contact failure between the probe card and the bonding pad due to foreign matter adhering to the bonding pad is high due to the large number of pins.

Also, as for the tester to be inspected, it takes a lot of time to inspect all pads, which also causes a cost increase.

Further, when a plurality of probe cards for probing only some of the pads are created instead of probing all the pins at once, a plurality of probe cards are required, resulting in an increase in cost. Not only that, it is necessary to attach the probe card to the inspection machine a plurality of times in the inspection of one multi-chip module, or multiple inspection machines are required, resulting in increased costs and complicated operations. It was

The present invention has been made to solve the above-mentioned problems of the conventional ones, and the number of pins of the probe card can be reduced during the electrical inspection of the base substrate. The objective is to obtain the base substrate of a multi-chip module that can minimize the probability of contact failure between pads, significantly reduce the probability of erroneously determining non-defective products as defective, and provide probe cards at low cost. And

[0019]

A base substrate of a multi-chip module according to the present invention has a plurality of wiring patterns formed on the base substrate as a set of connected wiring patterns electrically connected to each other. In addition, a short circuit that is cut off after the inspection of the base substrate is provided.

[0020]

According to the present invention, as described above, the plurality of wiring patterns formed on the base substrate are set as a set of connection of the wiring patterns electrically connected to each other, and are cut after the inspection of the base substrate. As a result, a short circuit that returns the connection of each wiring pattern to the original wiring pattern that is electrically independent is provided, so that it becomes possible to test this with the connection of the wiring patterns as one unit, and the number of pins of the probe card Greatly reduced.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a base substrate of a multichip module according to one embodiment of the present invention, and particularly shows its wiring pattern and the short circuit added in this embodiment.

FIG. 2 shows a fuse pattern provided in the short circuit of FIG. 1, FIG. 3 shows an opening formed in a protective film for protecting the wiring layer in which the fuse pattern is formed, and FIG. FIG. 5 shows a portion of the wiring pattern 1 to be originally probed, and FIG. 5 shows a portion of the base substrate according to the present embodiment to be probed.

1 to 5, 6a and 6b
Are provided on the outer periphery of the base substrate, and are A pads, 8a, 8b, 8c, for connecting between the base substrate and the package.
8d is provided in the semiconductor chip mounting area of the base substrate,
B pad for connecting between the base substrate and the IC chip,
9a and 9b are A pads 6a and 6b and B pads 8a and 8b.
Wiring pattern for electrically connecting the two, 10 is a B pad 8
a wiring pattern for electrically connecting c and 8d to each other, 100
Reference characters a and 100b are wiring patterns 9a, 10 and 10 which are electrically connected to each other. The wiring patterns 9a and 100b are cut after the inspection is completed.
It is a short circuit for returning a, the wiring pattern 10, and the wiring pattern 9b to wirings electrically separated from each other.

As shown in FIG. 1, the pattern of the base substrate of the multichip module in this embodiment includes, for example, a wiring pattern between A pad and B pad and a wiring pattern between B pads. Then, a short circuit is provided between the wiring patterns to short-circuit the wiring patterns.

The fuse pattern provided in this short circuit may be provided in any part thereof.

As the fuse pattern, a portion having a narrow pattern width as shown in FIG. 2 is provided in the wiring pattern so that it can be easily cut by a method such as a laser after the inspection of the base substrate.

It is effective that the fuse patterns are laid out at positions close to each other so that the cutting operation can be easily performed after the inspection.

Further, it is necessary to provide an opening for cutting the passivation film in the upper layer of the fuse pattern, but from the viewpoint of reliability, this opening is provided only in the cut portion as shown in FIG. To do so.

When the base substrate is composed of a plurality of wiring layers and a plurality of insulating layers, a fuse is formed on the uppermost wiring layer, and a fuse opening pattern is provided on the protective layer thereabove.

Further, when forming a fuse in a wiring layer other than the uppermost wiring layer, it is necessary to provide an opening in the insulating layer and the protective layer above the wiring layer in which the fuse is formed.

Further, it is effective to provide the fuse circuit of the present embodiment for a chip having a large number of B pads or a small pad pitch size, and this situation is the same even in the same chip. In some cases, it may be desirable to apply the method only to a portion having a small pad pitch dimension.

Next, the operation and effect will be described. In this embodiment, since the apparatus is configured as described above, in the case of the circuit of FIG. 4, it is originally necessary to perform probing of the six probes 21 to 26, but as shown in FIG. 5, the short circuit 100a, When 100b is provided, the probe 2
The circuit can be inspected only by performing two probes of 7, 28.

That is, if the pattern has a disconnection defect, it can be detected regardless of where the pattern 9a, 10, 9b is.

When the pattern has a short defect, it is possible to detect the short defect between the connection of the patterns 9a, 10 and 9b and the connection of another pattern.

In this case, in order to prevent short-circuit defects between the patterns 1 to 3, it is necessary to connect the patterns as far apart as possible by a short circuit.

After the inspection of the base substrate, the short circuit 1
The initial desired circuit can be obtained by cutting the fuse portions provided in 00a and 100b.

As described above, according to the above-described embodiment, the plurality of wiring patterns formed on the base substrate are set as a set of connection of the wiring patterns electrically connected to each other, and are cut after the inspection of the base substrate. By doing so, a short circuit for returning each wiring pattern to an electrically independent original wiring pattern is provided, so in the prior art, it was necessary to inspect by applying probes to all pads on the base substrate. However, in this embodiment, it is possible to greatly reduce the number of pads to be probed.

As a result, for example, the A pad 250
With a multi-chip module with about 420 pins and B pads, it was not possible to create a probe card for probing them all at once, but by actually reducing the number of pins for probing It is possible to create the tester, the tester can be simplified, the test program can be simplified, the tester's test time can be greatly shortened, the increase of the test cost can be avoided, and the complicated work is not required. It will be easy.

Further, by reducing the number of pins to be probed, it is possible to reduce the probability of erroneous inspection due to probe contact failure that occurs during probing.

Further, by selecting the wiring patterns connected by the short circuit so that there are no places parallel to (adjacent to) each other, it is possible to check the short circuit between the connection of the wiring patterns.

[0042]

As described above, according to the base substrate of the multi-chip module according to the present invention, a plurality of wiring patterns formed on the base substrate are connected to each other to connect the wiring patterns electrically connected to each other. Since a short circuit that is disconnected after the inspection is provided as a set, it becomes possible to consider multiple wiring patterns as a connection of wiring patterns electrically connected to each other, and to test this, Since the number of pins of the card can be reduced, the probability of contact failure between the probe card and the bonding pad can be minimized, and the probe card can be provided at low cost.

[Brief description of drawings]

FIG. 1 is a diagram showing a wiring pattern and a short circuit of a base substrate of a multichip module according to an embodiment of the present invention.

FIG. 2 is a diagram showing a fuse pattern provided in the short circuit of FIG.

FIG. 3 is a view showing an opening formed in a protective film for protecting the wiring layer on which the fuse pattern of FIG. 2 is formed.

FIG. 4 is a diagram showing a portion that should originally be probed in the wiring pattern shown in FIG. 1;

5 is a view showing a portion to be probed in the base substrate according to the present embodiment of FIG.

FIG. 6 is a diagram showing a general configuration of a multi-chip module using a ceramic package.

7 is a diagram showing an example of a pattern of the base substrate of FIG.

8 is a diagram showing an example of a cross-sectional structure of the base substrate of FIG.

FIG. 9 is a diagram showing a conventional wiring inspection method for a base substrate.

[Explanation of symbols]

1 Package 2 Base board 3 IC chip 4 Al wire 6, 6a, 6b A pad 8, 8a, 8b, 8c, 8d B pad 9, 9a, 9b Wiring pattern 10 Wiring pattern 21, 22, 23, 24, 25, 26 , 27, 28 probe 100a, 100b short circuit

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[Procedure amendment]

[Submission date] May 21, 1993

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be amended] Title of invention

[Correction method] Change

[Correction content]

Title: Semiconductor device

[Procedure amendment 3]

[Document name to be amended] Statement

[Name of item to be amended] Claims

[Correction method] Change

[Correction content]

[Claims]

[Procedure correction 4]

[Document name to be amended] Statement

[Correction target item name] 0001

[Correction method] Change

[Correction content]

[0001]

FIELD OF THE INVENTION This invention relates to a multi-chip module: In have you in the semiconductor device called a (Multi chip Module MCM), wiring substrate for mounting the IC (hereinafter referred to as the base substrate) and is the place of the semiconductor device The present invention relates to an improvement of the above method, and more particularly, to an improvement of the inspection.

[Procedure amendment 5]

[Document name to be amended] Statement

[Name of item to be corrected] 0019

[Correction method] Change

[Correction content]

[0019]

A semiconductor device according to the present invention.
Places multiple wiring patterns formed on the base substrate,
This is a set of interconnected wiring patterns that are electrically connected to each other, and a short circuit that is cut after the inspection of the base substrate is provided.

[Procedure Amendment 6]

[Document name to be amended] Statement

[Name of item to be corrected] 0022

[Correction method] Change

[Correction content]

FIG. 1 shows a semiconductor device according to an embodiment of the present invention.
1 shows a base substrate of a multi-chip module, which is a device, and in particular shows its wiring pattern and the short circuit added in this embodiment.

[Procedure Amendment 7]

[Document name to be amended] Statement

[Correction target item name] 0042

[Correction method] Change

[Correction content]

[0042]

As described above, the semiconductor device according to the present invention is used.
According to the arrangement , the plurality of wiring patterns formed on the base substrate is a set of connected wiring patterns electrically connected to each other, and a short circuit that is cut after the inspection is provided. Multiple wiring patterns
This makes it possible to test this by considering it as a connection of wiring patterns electrically connected to each other, and it is possible to reduce the number of pins of the probe card, thereby minimizing the probability of contact failure between the probe card and the bonding pad. It is possible to provide the probe card at low cost.

[Procedure Amendment 8]

[Document name to be amended] Statement

[Name of item to be corrected] Brief explanation of the drawing

[Correction method] Change

[Correction content]

[Brief description of drawings]

FIG. 1 shows a semiconductor device according to an embodiment of the present invention.
The figure which shows the wiring pattern and short circuit of the base substrate of the multi-chip module of the roller .

FIG. 2 is a diagram showing a fuse pattern provided in the short circuit of FIG.

FIG. 3 is a view showing an opening formed in a protective film for protecting the wiring layer on which the fuse pattern of FIG. 2 is formed.

FIG. 4 is a diagram showing a portion that should originally be probed in the wiring pattern of FIG. 1;

5 shows a semiconductor device according to this embodiment of FIG.
FIG. 6 is a diagram showing a portion to be probed on the base substrate of FIG.

FIG. 6 is a diagram showing a general configuration of a multi-chip module using a ceramic package.

7 is a diagram showing an example of a pattern of the base substrate of FIG.

8 is a diagram showing an example of a cross-sectional structure of the base substrate of FIG.

FIG. 9 is a diagram showing a conventional wiring inspection method for a base substrate.

[Explanation of reference numerals] 1 package 2 base substrate 3 IC chip 4 Al wire 6, 6a, 6b A pad 8, 8a, 8b, 8c, 8d B pad 9, 9a, 9b Wiring pattern 10 Wiring pattern 21, 22, 23, 24, 25, 26, 27, 28 probe 100a, 100b short circuit

Claims (1)

[Claims] 1. A base substrate on which an IC chip is mounted in a multi-chip module in which a plurality of semiconductor integrated circuit chips (hereinafter referred to as IC chips) that are not encapsulated in a package are mounted in the same package. A multi-chip module characterized in that a plurality of wiring patterns formed on a base substrate are a set of connection of wiring patterns electrically connected to each other, and a short circuit that is cut after the inspection is provided. Base substrate.