JPH05343448A - Soldering jig for semiconductor device - Google Patents

Soldering jig for semiconductor device

Info

Publication number
JPH05343448A
JPH05343448A JP14778792A JP14778792A JPH05343448A JP H05343448 A JPH05343448 A JP H05343448A JP 14778792 A JP14778792 A JP 14778792A JP 14778792 A JP14778792 A JP 14778792A JP H05343448 A JPH05343448 A JP H05343448A
Authority
JP
Japan
Prior art keywords
chip
solder
soldering
jig
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14778792A
Other languages
Japanese (ja)
Inventor
Koji Miyoshi
浩司 三好
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP14778792A priority Critical patent/JPH05343448A/en
Publication of JPH05343448A publication Critical patent/JPH05343448A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83001Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus

Abstract

PURPOSE:To provide a soldering jig for suitably soldering by ingeniously preventing flow-out of molten solder to a periphery of a semiconductor chip by a capillary action when the chip is solder-mounted on a board. CONSTITUTION:A chip holding soldering jig 4 to be used in the case of solder- mounting a semiconductor chip 1 on a board 2 comprises a chip insertion hole 4a corresponding to a profile size of the chip 1 and opened at the carbon jig 4 to be used to solder-mount the chip 1 by placing the jig 4 on the board, inserting a solder tape 3, the chip 1 in the hole and passing it through a soldering furnace, and a pocket 4b to become a relief of the molten solder and to be formed at a bottom side periphery of the hole 4a. Thus, in the case of soldering, the molten solder does not flow to a fine gap between the bottom of the jig 4 and the board 2 (capillary action), but a suitable solder fillet is formed in the pocket by a surface tension to solder the chip 1 to the board 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、バイポーラトランジス
タモジュールなどの半導体装置を対象に、半導体チップ
を基板に半田マウントする工程で用いるチップ保持用の
半田付け治具に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device such as a bipolar transistor module, and a soldering jig for holding a chip used in a process of solder-mounting a semiconductor chip on a substrate.

【0002】[0002]

【従来の技術】半導体チップを基板に半田マウントする
方法として、基板上の所定位置に形成した半田付けラン
ドに半田プリフォーム(半田テープ)と一緒にチップを
搭載し、コンベヤ搬送により基板を水素雰囲気の半田付
け炉内に通炉して半田付けする方法が広く採用されてい
る。また、この場合に基板上に搭載したチップが半田付
け炉へ通炉する搬送過程で所定の半田付け位置からずれ
るのを防ぐために、チップ保持用の半田付け治具を用い
ている。
2. Description of the Related Art As a method of solder-mounting a semiconductor chip on a board, the chip is mounted together with a solder preform (solder tape) on a soldering land formed at a predetermined position on the board, and the board is transported in a hydrogen atmosphere by a conveyor. The method of soldering by passing through the soldering furnace is widely adopted. Further, in this case, a soldering jig for holding the chip is used in order to prevent the chip mounted on the substrate from deviating from a predetermined soldering position during the transportation process of passing through the soldering furnace.

【0003】次に、従来における半田付け治具を図3に
示す。図において、1は半導体チップ、2は基板、3は
半田テープ、4が半田付け治具である。この半田付け治
具4は耐熱性が高く、かつ半田との濡れ性が低いカーボ
ン板などで作られており、カーボン板にはチップ1の外
形サイズに対応した断面形状のチップ挿入穴4aが開口
している。
Next, a conventional soldering jig is shown in FIG. In the figure, 1 is a semiconductor chip, 2 is a substrate, 3 is a solder tape, and 4 is a soldering jig. The soldering jig 4 is made of a carbon plate or the like having high heat resistance and low wettability with solder, and the carbon plate is provided with a chip insertion hole 4a having a cross-sectional shape corresponding to the outer size of the chip 1. is doing.

【0004】そして、半導体チップ1を基板2に半田マ
ウントする際には、図示のようにチップ挿入穴4aをチ
ップ搭載位置に合わせて半田付け治具4を基板2の上に
載置した状態で、チップ挿入穴4aの中に半田テープ
3,チップ1を順に挿入セットし、続いて基板1を搬送
ベルトにより半田付け炉(図示せず)に通炉して半田付
けを行う。
When the semiconductor chip 1 is solder-mounted on the substrate 2, the soldering jig 4 is placed on the substrate 2 with the chip insertion hole 4a aligned with the chip mounting position as shown in the figure. Then, the solder tape 3 and the chip 1 are sequentially inserted and set in the chip insertion hole 4a, and then the substrate 1 is passed through a soldering furnace (not shown) by a conveyor belt to perform soldering.

【0005】[0005]

【発明が解決しようとする課題】ところで、前記した従
来の半田付け治具を用いた場合には、図4で示すよう基
板2と治具4とが反り,凹凸面などにより完全に密接せ
ず、基板2と治具4の底面との間には微小な隙間gが残
る。このために、図3のように治具4にチップ1,半田
テープ3をセットした状態で半田付け炉に搬入して半田
付けを行うと、チップ挿入穴4aの中で溶融した半田が
毛細管現象により前記の隙間gに流れ出るようになる。
このために、チップの周縁には適正な半田フィレットが
形成されず、図4で表すように半田付け後では固化した
半田層5がチップ1から基板2の周辺上に広がるよう事
態がしばしば発生する。しかも、このような溶融半田の
流れ出しが生じると、半田層5にボイドが発生したり、
基板上で回路パターンが半田ブリッジするなどの欠陥を
引き起こす原因となる。
By the way, when the above-mentioned conventional soldering jig is used, the substrate 2 and the jig 4 do not come into complete contact with each other due to warpage and uneven surfaces as shown in FIG. A minute gap g remains between the substrate 2 and the bottom surface of the jig 4. Therefore, when the chip 1 and the solder tape 3 are set in the jig 4 as shown in FIG. 3 and carried into a soldering furnace for soldering, the melted solder in the chip insertion hole 4a is capillary phenomenon. As a result, it will flow out into the gap g.
Therefore, an appropriate solder fillet is not formed on the periphery of the chip, and as shown in FIG. 4, the solder layer 5 solidified after soldering often spreads from the chip 1 to the periphery of the substrate 2. .. Moreover, when such molten solder flows out, voids are generated in the solder layer 5,
This may cause defects such as solder bridging of the circuit pattern on the board.

【0006】そこで、従来では半田付け炉の炉内温度を
調節したり、半田付け治具4の熱容量(体積)を変更す
るなどして溶融半田の流れ出しを防止する措置が採られ
ている。しかしながら、同じ半田付け炉にチップサイズ
の異なる多種多様な半導体装置を通炉して半田付けを行
う場合には、炉内温度を変更すると機種によっては最適
な温度条件で半田付け行えないことがある。また、治具
の熱容量を適正化することは半田量のバラツキもあって
中々困難である。
Therefore, conventionally, measures have been taken to prevent the molten solder from flowing out by adjusting the temperature inside the soldering furnace or changing the heat capacity (volume) of the soldering jig 4. However, when performing soldering by passing through various semiconductor devices with different chip sizes in the same soldering furnace, if the temperature inside the furnace is changed, it may not be possible to solder under optimal temperature conditions depending on the model. .. Further, it is difficult to optimize the heat capacity of the jig due to variations in the amount of solder.

【0007】本発明は上記の点にかんがみなされたもの
であり、その目的は前記課題を解決し、半田付けの際に
溶融半田が毛細管現象によってチップの周辺に流れ出る
のを巧みに防止できるようにした半田付け治具を提供す
ることにある。
The present invention has been made in view of the above points, and an object of the present invention is to solve the above-mentioned problems and to skillfully prevent molten solder from flowing out to the periphery of a chip due to a capillary phenomenon during soldering. To provide a soldering jig.

【0008】[0008]

【課題を解決するための手段】上記目的は、本発明によ
り、半田付け治具に穿孔したチップ挿入穴の底面側周域
に溶融半田の逃げ部となるポケットを形成することによ
り達成される。ここで、前記ポケットの容積は、半田付
けの際にチップ周縁に形成される半田フィレットのはみ
出し量に対応して定めるものとし、また、治具の材質せ
カーボンとするのがよい。
According to the present invention, the above object is achieved by forming a pocket serving as an escape portion for molten solder in a peripheral area of a bottom surface of a chip insertion hole formed in a soldering jig. Here, the volume of the pocket is determined in accordance with the amount of protrusion of the solder fillet formed on the periphery of the chip during soldering, and the jig material is preferably carbon.

【0009】[0009]

【作用】上記のように、治具に穿孔したチップ挿入穴の
底面側周域に溶融半田の逃げ部となるポケットを形成す
ることにより、半田付けの過程でチップの周縁からはみ
出した溶融半田は、表面張力により基板と治具の底面と
の間の細隙に達する以前に挿入穴の周域に形成したポケ
ット内で凝集する。したがって、溶融半田を前記細隙に
引き込むような毛細管現象が働かず、これによりチップ
の周縁に適正な半田フィレットを形成して基板に半田付
けすることができる。
As described above, by forming a pocket serving as an escape portion for the molten solder in the peripheral area on the bottom surface side of the chip insertion hole formed in the jig, the molten solder protruding from the peripheral edge of the chip during the soldering process is prevented. , Agglomerates in the pocket formed in the peripheral region of the insertion hole before reaching the narrow gap between the substrate and the bottom surface of the jig due to surface tension. Therefore, the capillary phenomenon that draws the molten solder into the narrow gap does not work, and thus an appropriate solder fillet can be formed on the periphery of the chip and soldered to the substrate.

【0010】[0010]

【実施例】以下本発明の実施例を図1,図2に基づいて
説明する。なお、図中で図3,図4に対応する同一部材
には同じ符号が付してある。図示実施例においては、半
田付け治具4が高い耐熱性,半田に対する低い濡れ性を
有するカーボン材で作られており、かつチップ1の外形
サイズに合わせて治具4に穿孔したチップ挿入穴4aの
底面側周縁には挿入穴4aよりも一回り径大なポケット
4bが形成してある。このポケット4bは、チップ1の
周縁からはみ出した溶融半田の逃げ部として機能するも
のであり、基板1との間に毛細管となる細隙を形成しな
い十分な溝深さと、溶融半田の表面張力によりチップ周
縁からはみ出して凝集するフィレットを収容する十分な
容積に定めてある。
Embodiments of the present invention will be described below with reference to FIGS. In the figure, the same members corresponding to those in FIGS. 3 and 4 are designated by the same reference numerals. In the illustrated embodiment, the soldering jig 4 is made of a carbon material having high heat resistance and low wettability with respect to solder, and a chip insertion hole 4a formed in the jig 4 in accordance with the outer size of the chip 1. A pocket 4b having a diameter larger than that of the insertion hole 4a is formed on the peripheral edge on the bottom surface side of the. The pocket 4b functions as an escape portion for the molten solder that protrudes from the peripheral edge of the chip 1, and has a sufficient groove depth that does not form a capillary gap with the substrate 1 and the surface tension of the molten solder. The volume is set to be large enough to accommodate the fillet that protrudes from the peripheral edge of the chip and aggregates.

【0011】かかる構成の半田付け治具4を採用してチ
ップ1を基板2に半田付け(半田マウント)することに
より、半田付け炉への通炉過程で溶融した半田は、チッ
プ1の周縁からポケット4aの中にはみ出したところ
で、治具4の底面と基板1の上面との間の細隙gに達す
る以前に表面張力の作用で球面状のフィレットを形成す
るように凝集する。したがって、溶融半田には毛細管現
象による細隙gへの流れ込みが働かず、図2で示すよう
にチップ1の周縁に適正な半田フィレットを形成して基
板2に半田付けできる。
By soldering the chip 1 to the substrate 2 (solder mount) by using the soldering jig 4 having such a structure, the solder melted in the process of passing through the soldering furnace is removed from the peripheral edge of the chip 1. When it protrudes into the pocket 4a, it aggregates to form a spherical fillet by the action of surface tension before reaching the narrow gap g between the bottom surface of the jig 4 and the upper surface of the substrate 1. Therefore, the molten solder does not flow into the narrow gap g due to the capillary phenomenon, and an appropriate solder fillet can be formed on the peripheral edge of the chip 1 and soldered to the substrate 2 as shown in FIG.

【0012】[0012]

【発明の効果】以上述べたように、本発明の半田付け治
具は、チップ挿入穴の底面側周域に溶融半田の逃げ部と
なるポケットを形成したので、この治具を用いて半導体
チップを基板上に半田マウントすることにより、治具の
底面と基板との間の細隙に働く毛細管現象が基で溶融半
田がチップの周辺へ不要に流出するのを防止し、チップ
の周縁に適正な半田フィレットを形成するようにしてチ
ップと基板とボイドなどの欠陥なしに最適な半田付けを
行うことができる。
As described above, in the soldering jig of the present invention, since the pocket serving as the escape portion of the molten solder is formed in the peripheral area of the bottom surface side of the chip insertion hole, the semiconductor chip is used. By mounting the solder on the substrate, the molten solder is prevented from unnecessarily flowing out to the periphery of the chip due to the capillary phenomenon that works in the gap between the bottom surface of the jig and the substrate, and it is suitable for the periphery of the chip. By forming a simple solder fillet, optimum soldering can be performed without defects such as a chip, a substrate and a void.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例による半田付け治具の使用状態
を表す断面図
FIG. 1 is a sectional view showing a usage state of a soldering jig according to an embodiment of the present invention.

【図2】図1における半田付け状態を表す要部の拡大図FIG. 2 is an enlarged view of a main part showing a soldering state in FIG.

【図3】従来における半田付け治具の使用状態を表す断
面図
FIG. 3 is a cross-sectional view showing a usage state of a conventional soldering jig.

【図4】図3における半田付け状態を表す要部の拡大図FIG. 4 is an enlarged view of a main part showing a soldering state in FIG.

【符号の説明】[Explanation of symbols]

1 半導体チップ 2 基板 3 半田テープ 4 半田付け治具 4a チップ挿入穴 4b ポケット 5 半田層 1 semiconductor chip 2 substrate 3 solder tape 4 soldering jig 4a chip insertion hole 4b pocket 5 solder layer

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】半導体チップを基板に半田マウントする際
に用いるチップ保持用の半田付け治具であり、板状の治
具がチップの外形サイズに対応するチップ挿入穴を有し
ており、該治具を基板上に載置して前記穴の中に半田プ
リフォーム,チップを挿入し、この状態で半田付け炉を
通炉して半田マウントを行うものにおいて、前記挿入穴
の底面側周域に溶融半田の逃げ部となるポケットを形成
したことを特徴とする半導体装置用の半田付け治具。
1. A soldering jig for holding a chip, which is used when a semiconductor chip is solder-mounted on a substrate, wherein the plate-shaped jig has a chip insertion hole corresponding to the outer size of the chip, Place the jig on the board, insert the solder preform and the chip into the hole, and in this state, run the soldering furnace to carry out the solder mount. A soldering jig for a semiconductor device, characterized in that a pocket serving as an escape portion for the molten solder is formed in the.
【請求項2】請求項1記載の半田付け治具において、ポ
ケットの容積を、半田付けの際にチップ周縁に形成され
る半田フィレットのはみ出し量に対応して定めたことを
特徴とする半導体装置用の半田付け治具。
2. The semiconductor device according to claim 1, wherein the volume of the pocket is determined in accordance with the protrusion amount of the solder fillet formed on the periphery of the chip during soldering. Jig for soldering.
【請求項3】請求項1記載の半田付け治具において、治
具の材質がカーボンであることを特徴とする半導体装置
用の半田付け治具。
3. The soldering jig according to claim 1, wherein the material of the jig is carbon.
JP14778792A 1992-06-09 1992-06-09 Soldering jig for semiconductor device Pending JPH05343448A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14778792A JPH05343448A (en) 1992-06-09 1992-06-09 Soldering jig for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14778792A JPH05343448A (en) 1992-06-09 1992-06-09 Soldering jig for semiconductor device

Publications (1)

Publication Number Publication Date
JPH05343448A true JPH05343448A (en) 1993-12-24

Family

ID=15438192

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14778792A Pending JPH05343448A (en) 1992-06-09 1992-06-09 Soldering jig for semiconductor device

Country Status (1)

Country Link
JP (1) JPH05343448A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012164880A (en) * 2011-02-08 2012-08-30 Denso Corp Semiconductor device and method of manufacturing the same
JP2013065662A (en) * 2011-09-16 2013-04-11 Fuji Electric Co Ltd Positioning jig of semiconductor chip and manufacturing method of semiconductor device
CN104332415A (en) * 2014-11-07 2015-02-04 无锡中微高科电子有限公司 Method for mounting and positioning semiconductor chip and positioning jig
JP2015185689A (en) * 2014-03-24 2015-10-22 日産自動車株式会社 Packaging method of semiconductor and manufacturing device for semiconductor component
JP2018085489A (en) * 2016-11-25 2018-05-31 住友電工デバイス・イノベーション株式会社 Electronic device assembly

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012164880A (en) * 2011-02-08 2012-08-30 Denso Corp Semiconductor device and method of manufacturing the same
JP2013065662A (en) * 2011-09-16 2013-04-11 Fuji Electric Co Ltd Positioning jig of semiconductor chip and manufacturing method of semiconductor device
JP2015185689A (en) * 2014-03-24 2015-10-22 日産自動車株式会社 Packaging method of semiconductor and manufacturing device for semiconductor component
CN104332415A (en) * 2014-11-07 2015-02-04 无锡中微高科电子有限公司 Method for mounting and positioning semiconductor chip and positioning jig
JP2018085489A (en) * 2016-11-25 2018-05-31 住友電工デバイス・イノベーション株式会社 Electronic device assembly

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