JPH05341015A - Non-volatile memory - Google Patents

Abstract

PURPOSE:To conduct a burn-in test without using any costly testing device, wherein external signals are used lesser, by installing a counter interiorly, and achieving the written and read condition of a non-volatile memory part only with a mode switching signal. CONSTITUTION:From an external terminal 2 of a non-volatile memory 1, a mode switching signal 6 is fed to a switched use circuit 4, which emits a burn-in test start signal 7 for a counter 5. The start signal 7 actuates this counter 5 to give an address signal 9 and data signal 10 to a memory part 3. A write or a read control signal 8 actuates writing or reading, and the counter 5 executes operation during the signal 7 being emitted. Accordingly the write or read of the memory 1 can be conducted only with the mode switching signal 6 as an external signal at the time of burn-in test.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrically writable and readable nonvolatile memory having a burn-in test circuit incorporated therein.

[0002]

2. Description of the Related Art Conventionally, in order to perform a burn-in test of a non-volatile memory (hereinafter referred to as an EEPROM) capable of being electrically written and read, a device is operated by supplying a signal from the outside of the EEPROM and exposed to a high temperature atmosphere. The method of leaving it for a predetermined time was used.

[0003]

However, the above-mentioned conventional structure requires a test device for generating various signals to be supplied to the EEPROM and a complicated wiring for supplying the signals, so that the burn-in test device is required. It had a problem of becoming expensive.

The present invention solves the above-mentioned conventional problems, and when the burn-in test is performed, the EEPR is externally applied.
An EEP capable of performing a burn-in test without requiring expensive test equipment for supplying various signals to the OM.
The purpose is to provide a ROM.

[0005]

In order to achieve this object, an EEPROM of the present invention outputs a burn-in test start signal and a write or read control signal to a storage section when it receives a burn-in test mode command. And a counter that operates only at the burn-in test in response to a burn-in test start signal and outputs an address signal and a data signal to the storage unit.

[0006]

With this configuration, data output from the counter can be written to or read from a predetermined address of the EEPROM selected by the address signal output from the counter in the burn-in test mode, and the burn-in of the EEPROM can be performed. Easy to run tests.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An EEPROM according to an embodiment of the present invention will be described below.
Will be described with reference to the drawings. FIG. 1 is a block diagram showing the internal structure of an EEPROM according to an embodiment of the present invention. In FIG. 1, 1 is an EEPROM chip, 2 is an external terminal, 3 is a storage unit, 4 is a switching control circuit, and 5
Is a counter, 6 is a mode switching signal, 7 is a burn-in test start signal, 8 is a control signal for writing or reading the EEPROM, 9 is an address signal, and 10 is a data signal.

The EEPROM of this embodiment is characterized in that the switching control circuit 4 and the counter 5 are built therein. The switching control circuit 4 receives a mode switching signal 6 input from the external terminal 2 for controlling whether or not to perform a burn-in test, and outputs a burn-in test start signal 7 to the counter 5. At the same time, the switching control circuit 4 outputs a write or read control signal 8 to the storage section 3.

The operation of the EEPROM configured as described above will be described below. First, EEPROM1
A mode switching signal 6 is input to the switching control circuit 4 from the external terminal 2 of. The switching control circuit 4 outputs a burn-in test start signal 7 to the counter 5. Burn-in test start signal 7
Input to the counter 5 to operate the counter 5. The counter 5 outputs the address signal 9 and the data signal 10 to the storage unit. After that, the write operation or the read operation is performed by the write or read control signal 8. The counter 5 continues to operate while the burn-in test start signal 7 is being output.

Therefore, according to this embodiment, only the mode switching signal 6 is used as the external signal during the burn-in test.
ROM can be written or read.

[0011]

As described above, the present invention realizes the writing state or the reading state of the storage portion of the EEPROM chip only by the mode switching signal during the burn-in test by incorporating the counter, and the signal applied from the outside. It is possible to realize an excellent non-volatile memory in which the burn-in test can be performed without using an expensive test device with a very small number.

[Brief description of drawings]

FIG. 1 is a block diagram showing an internal configuration of an EEPROM according to an embodiment of the present invention.

[Explanation of symbols]

 3 memory unit 4 switching control circuit 5 counter 6 mode switching signal (test mode command) 8 writing or reading control signal 9 address signal 10 data signal

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical display location G11C 29/00 303 G 6741-5L // H01L 21/66 H 7352-4M

Claims (1)

[Claims] 1. A switching control circuit for outputting a burn-in test start signal and a write or read control signal to a storage section when receiving a burn-in test mode command.
The burn-in test start signal includes a counter that operates only during the burn-in test and outputs an address signal and a data signal to the storage unit. The address signal and the data signal output from the counter and the writing or reading from the switching control circuit are provided. A non-volatile memory characterized in that a storage section is put into a writing state, an erasing state or a reading state by a control signal.