JPH0533915B2 - - Google Patents
Info
- Publication number
- JPH0533915B2 JPH0533915B2 JP62016512A JP1651287A JPH0533915B2 JP H0533915 B2 JPH0533915 B2 JP H0533915B2 JP 62016512 A JP62016512 A JP 62016512A JP 1651287 A JP1651287 A JP 1651287A JP H0533915 B2 JPH0533915 B2 JP H0533915B2
- Authority
- JP
- Japan
- Prior art keywords
- marking
- semiconductor substrate
- dust
- film
- photoresist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 229920002120 photoresistant polymer Polymers 0.000 claims description 8
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 8
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 239000000428 dust Substances 0.000 description 11
- 230000001681 protective effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000010330 laser marking Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41M—PRINTING, DUPLICATING, MARKING, OR COPYING PROCESSES; COLOUR PRINTING
- B41M5/00—Duplicating or marking methods; Sheet materials for use therein
- B41M5/24—Ablative recording, e.g. by burning marks; Spark recording
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体基板へのマーキング方法に関
し、特にマーキングによつて発生したゴミを効果
的に除去できるマーキング方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for marking a semiconductor substrate, and more particularly to a marking method that can effectively remove dust generated by marking.
第３図は、従来のマーキング方法による加工状
態を示すための基板の断面図である。従来の基板
へのマーキング方法は、半導体基板１の半導体回
路素子（図示せず）形成面と同一面上の一部にレ
ーザー加工によつてマーキング部３を形成してい
た。
FIG. 3 is a cross-sectional view of a substrate showing a state of processing by a conventional marking method. In a conventional method for marking a substrate, a marking portion 3 is formed by laser processing on a portion of the semiconductor substrate 1 on the same surface as the surface on which a semiconductor circuit element (not shown) is formed.
上述した従来のマーキング方法は、第３図に見
られるゴミ４の発生を少なくするためにはレーザ
パワーを下げることになるが、パワーを下げると
マーキングされた文字は判読が困難である。マー
キング文字の判読が可能でゴミの発生がほとんど
ないレーザーパワーの領域は非常に範囲が狭く、
マーキング部の表面状態、レーザパワーの変動等
によつてマーキング状態が変化する。又、レーザ
パワーを大きくするとマーキング文字の判読は良
好になるが、ゴミの発生が多くなるとともにゴミ
の飛散距離も増大し、半導体回路素子、パターン
形成部まで達し、歩留低下の原因になるという欠
点がある。
In the conventional marking method described above, the laser power is lowered in order to reduce the generation of dust 4 shown in FIG. 3, but when the power is lowered, the marked characters are difficult to read. The laser power range is very narrow, where the marking characters can be read and there is almost no dust.
The marking condition changes depending on the surface condition of the marking part, fluctuations in laser power, etc. In addition, increasing the laser power improves the legibility of the marking characters, but it also increases the amount of dust generated and the distance the dust is scattered, reaching the semiconductor circuit elements and pattern formation areas, causing a decrease in yield. There are drawbacks.
本発明は、半導体基板上にフオトレジスト膜又
はシリコン酸化膜間はシリコン窒化膜を選択的に
形成し、これらの膜上からレーザによりマーキン
グを行つた後、これらの膜を除去するものであ
る。
In the present invention, a silicon nitride film is selectively formed between a photoresist film or a silicon oxide film on a semiconductor substrate, and after marking is performed on these films with a laser, these films are removed.
次に本発明について図面を参照して説明する。
第１図ａ〜ｃは、本発明の一実施例を示す工程順
の断面図である。第１図ａにおいて、半導体基板
１は、Si、GaAs等の半導体材料からできてお
り、基板１の主面上のフオトレジスト２は、半導
体集積回路の製造に使用するものと同じであり、
約1μｍ程度形成する。第１図ｂは、レーザマー
キングでマーキング部が形成されるが、マーキン
グ時に発生する熱によつて、半導体基板１とフオ
トレジスト２の一部が周囲に飛散しゴミ４が形成
される。第１図ｃは、フオトレジスト２を有機剥
離剤等によつて除去した状態で、この時ゴミ４も
同時に取り除かれる。
Next, the present invention will be explained with reference to the drawings.
FIGS. 1a to 1c are cross-sectional views showing an embodiment of the present invention in the order of steps. In FIG. 1a, a semiconductor substrate 1 is made of a semiconductor material such as Si or GaAs, and a photoresist 2 on the main surface of the substrate 1 is the same as that used in the manufacture of semiconductor integrated circuits.
Form approximately 1 μm. In FIG. 1B, the marking portion is formed by laser marking, but due to the heat generated during marking, parts of the semiconductor substrate 1 and the photoresist 2 are scattered around, and dust 4 is formed. FIG. 1c shows a state in which the photoresist 2 has been removed using an organic remover or the like, and at this time, the dust 4 is also removed at the same time.
尚、上記実施例において、保護膜としてフオト
レジストで説明したが、ポリイミド等の有機物材
料でもよく、又半導体基板上に酸化物、窒化物、
ポリシリコン、金属等が形成されたものを対象と
してもよい。 In the above embodiments, photoresist was used as the protective film, but organic materials such as polyimide may also be used, and oxides, nitrides, etc.
The target may be a material formed of polysilicon, metal, or the like.
第２図ａ〜ｃは、本発明の実施例２を示す工程
順の断面図である。第２図ａにおいて、半導体基
板１上に、シリコン酸化膜５をCVD法によつて
成長する。第２図ｂはレーザーマーキングによつ
てマーキング部３が形成されるが、シリコン酸化
膜５はフオトレジストに比べ耐熱性が高く、マー
キング部３の周囲のシリコン酸化膜はほとんど加
工されないので、実施例１よりゴミ４の付着部分
が少なくなる。第２図ｃはシリコン酸化膜５を
HF系のエツチング液で除去した状態で、この時
ゴミ４も同時に取り除かれる。尚、上記実施例に
おいて保護膜をシリコン酸化物としたが、シリコ
ン窒化物でもよく、又、熱酸化膜やスパツタ法を
用いてもよい。 FIGS. 2a to 2c are cross-sectional views showing the second embodiment of the present invention in the order of steps. In FIG. 2a, a silicon oxide film 5 is grown on a semiconductor substrate 1 by CVD. In FIG. 2b, the marking part 3 is formed by laser marking, but the silicon oxide film 5 has higher heat resistance than photoresist, and the silicon oxide film around the marking part 3 is hardly processed. Compared to No. 1, the number of parts to which dust 4 is attached is smaller. Figure 2c shows the silicon oxide film 5.
At this time, the dust 4 is also removed at the same time while being removed using an HF-based etching solution. Although the protective film is made of silicon oxide in the above embodiment, it may be made of silicon nitride, or a thermal oxide film or a sputtering method may be used.
以上説明したように本発明は、半導体基板上に
マーキングを行う場合、マーキング面の全面又は
一部分に保護膜を形成してマーキングし、その保
護膜を除去することにより、マーキングで発生し
たゴミをほぼ完全に除去できる効果がある。
As explained above, when marking is performed on a semiconductor substrate, the present invention forms a protective film on the entire surface or a part of the marking surface, and removes the protective film to remove most of the dust generated by the marking. It has the effect of completely removing it.
第１図ａ〜ｃは本発明の半導体基板へのマーキ
ング方法の実施例１を説明するための工程順の断
面図、第２図ａ〜ｃは実施例２を説明するための
工程順の断面図、第３図は従来の半導体基板への
マーキング方法を説明するための基板の断面図で
ある。
１……半導体基板、２……フオトレジスト、３
……マーキング部、４……ゴミ、５……シリコン
酸化膜。
1A to 1C are cross-sectional views of the process order for explaining Embodiment 1 of the marking method for a semiconductor substrate of the present invention, and FIGS. 2A to 2C are sectional views of the process order for explaining Embodiment 2. 3 are cross-sectional views of a semiconductor substrate for explaining a conventional marking method on a semiconductor substrate. 1...Semiconductor substrate, 2...Photoresist, 3
...marking part, 4...dust, 5...silicon oxide film.
Claims (1)
ン酸化膜又はシリコン窒化膜を選択的に形成し、
該膜上からレーザーによりマーキングを行つた
後、前記膜を除去することを特徴とする半導体基
板へのマーキング方法。1 selectively forming a photoresist film, a silicon oxide film, or a silicon nitride film on a semiconductor substrate,
A method for marking a semiconductor substrate, the method comprising marking the film using a laser and then removing the film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62016512A JPS63183885A (en) | 1987-01-26 | 1987-01-26 | Method of marking on semiconductor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62016512A JPS63183885A (en) | 1987-01-26 | 1987-01-26 | Method of marking on semiconductor substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63183885A JPS63183885A (en) | 1988-07-29 |
| JPH0533915B2 true JPH0533915B2 (en) | 1993-05-20 |
Family
ID=11918324
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62016512A Granted JPS63183885A (en) | 1987-01-26 | 1987-01-26 | Method of marking on semiconductor substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63183885A (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5151389A (en) * | 1990-09-10 | 1992-09-29 | Rockwell International Corporation | Method for dicing semiconductor substrates using an excimer laser beam |
| JPH1158043A (en) * | 1997-07-31 | 1999-03-02 | Lsi Logic Corp | Laser marking method and its device |
| US6413839B1 (en) | 1998-10-23 | 2002-07-02 | Emcore Corporation | Semiconductor device separation using a patterned laser projection |
| TWI248244B (en) | 2003-02-19 | 2006-01-21 | J P Sercel Associates Inc | System and method for cutting using a variable astigmatic focal beam spot |
| JP4565994B2 (en) * | 2004-12-28 | 2010-10-20 | 信越半導体株式会社 | Manufacturing method of semiconductor wafer with laser mark, and semiconductor wafer |
| JP2008084918A (en) * | 2006-09-26 | 2008-04-10 | Casio Comput Co Ltd | Method of forming mark of semiconductor device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6195990A (en) * | 1984-10-18 | 1986-05-14 | Fujitsu Ltd | Marking method |
-
1987
- 1987-01-26 JP JP62016512A patent/JPS63183885A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6195990A (en) * | 1984-10-18 | 1986-05-14 | Fujitsu Ltd | Marking method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63183885A (en) | 1988-07-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5091331A (en) | Ultra-thin circuit fabrication by controlled wafer debonding | |
| JPH0533915B2 (en) | ||
| JP2993339B2 (en) | Method for manufacturing semiconductor device | |
| JPH06163528A (en) | Fabrication of semiconductor device | |
| JPH03124047A (en) | Integrated circuit device | |
| JP2639153B2 (en) | Method for manufacturing semiconductor device | |
| JP2982202B2 (en) | Method for manufacturing semiconductor device | |
| JPS5571055A (en) | Semiconductor device and its manufacturing method | |
| JP3042075B2 (en) | Method for manufacturing semiconductor device | |
| JPS60182746A (en) | Manufacture of semiconductor device | |
| JPS6149473A (en) | Manufacture of polycide gate mos ic | |
| JPH0497523A (en) | Manufacture of semiconductor device | |
| EP0230953A3 (en) | Process for manufacturing a semiconductor device having a protective layer | |
| KR0166799B1 (en) | Method for forming resistor of a semiconductor device | |
| JPH11211570A (en) | Thermopile sensor and its manufacture | |
| JPS5885549A (en) | Manufacture of semiconductor device | |
| JPH01207934A (en) | Manufacture of semiconductor device | |
| JPS59163823A (en) | Manufacture of semiconductor device | |
| JPS63117428A (en) | Manufacture of semiconductor device | |
| JPH0443663A (en) | Semiconductor device and its manufacture | |
| JPS5982749A (en) | Selective oxidation of semiconductor | |
| JPS6016464A (en) | Manufacture of semiconductor device | |
| JPS6193601A (en) | Thin film resistor and manufacture thereof | |
| KR19980056171A (en) | Manufacturing method of guard ring of semiconductor device | |
| JPS58165379A (en) | Manufacture of semiconductor device |