JPH05336469A - Multiscan monitor - Google Patents

Abstract

PURPOSE:To perform automatic changeover corresponding to an input signal with high reliability and to eliminate complicated operation by obtaining a switching signal by passing the compared result of counted data and preset data through transformation matrix. CONSTITUTION:A horizontal synchronizing signal 1 is inputted to a first counter 5 as a reset signal and a counted result is transmitted to first and second comparators 7 and 8 until counting is reset by the signal 1 with an output pulse from a first oscillation circuit 3 as a clock. Similarly, a vertical synchronizing signal 2 is inputted to the second counter 6 and the counted result is sent to the third comparator 9 until the counting is reset by the signal 2 with the output pulse from the second oscillation circuit 4 as the clock. In the meantime, a comparing data setting circuit 10 presets prescribed values at the comparators 7-9 at the time of starting power supply. Then, the comparators 7-9 compare the values with the counted results from the counters 5 and 6 and transmit logic signals. On the other hand, a transformation matrix circuit 11 is a so called ROM and outputs the switching signal 12 by a transformation rule based on the logic signals from the comparators 7-9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control circuit of a multi-scan monitor capable of displaying various images having different scanning frequencies by one unit.

[0002]

2. Description of the Related Art With the sophistication and diversification of video equipment in recent years, a so-called multi-scan monitor capable of receiving a plurality of types of video signals such as television broadcasting and image output of a personal computer by a common receiver is a National Te.
Technical Report Vol. 34, NO.
5, October, 1988, p. 15-20.

In this multi-scan monitor, it is necessary to switch the deflection frequency, the power supply voltage, the image distortion correction constant, etc. in accordance with the input signal. There was the following problem because the signal for switching was given.

A. Every time the input signal is changed, the switching signal also needs to be changed, which makes the operation complicated.

B. If the switching timing is delayed, the deflection output transistor may be destroyed.

As a means for solving these problems, an FV converting circuit for converting the frequency of an input synchronizing signal into a voltage corresponding to the frequency is disclosed in Japanese Patent Laid-Open No. 2-219368 (H04N3 / 27). A method has been proposed in which the voltage is converted and switching is performed according to the voltage value.

However, even in this method, the following problems can be considered.

C. It is difficult to realize a highly accurate FV conversion circuit capable of discriminating even a slight difference in the frequency of an input signal.

D. The F-V conversion circuit configuration that is easy to implement includes many factors that cause malfunctions due to temperature drift of the CR integration circuit and the like, and thus lacks reliability.

[0010]

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and provides a means for performing highly reliable automatic switching in response to an input signal to eliminate the complexity of operation. With the goal.

[0011]

According to the present invention, the frequency of an input synchronizing signal is converted into a digital value by a digital counter, the digital value is compared with preset data, and the conversion matrix is obtained from the comparison result. To get the switching signal.

[0012]

According to the present invention, since the switching signal can be obtained only by passing the result of comparison between the count data obtained from the input synchronizing signal and the preset data through the conversion matrix, automatic switching is possible.

Further, if the clock frequency of the digital counter is sufficiently higher than the frequency of the input synchronizing signal, high discrimination accuracy can be obtained, but this is easy even considering the scanning frequency of general video signals. With a clock frequency of this level, a circuit with good temperature characteristics can be obtained by making the oscillation circuit a crystal oscillator, so that a highly reliable control circuit can be realized.

[0014]

EXAMPLES Examples will be described below with reference to FIG.

For example, consider the case where the input signals to be displayed on the multi-scan monitor are four types of input signals as shown in Table 1 below.

[0016]

[Table 1]

When the oscillation frequency of the reference clock for counting the frequency of the input signal is 4 MHz for the horizontal synchronizing signal and the vertical frequency is 5 KHz, the count values are as shown in Table 2 below.

[0018]

[Table 2]

Therefore, the operation will be described with reference to FIG.

First, in FIG. 1, the first oscillating circuit 3 for the horizontal synchronizing signal oscillates at 4 MHz as described above.
The horizontal synchronizing signal 1 is input to the first counter 5 as a reset signal, and the count result until the horizontal synchronizing signal 1 is reset using the output pulse from the first oscillation circuit 3 as a clock is first. And to the second comparators 7, 8.

Similarly, the second oscillating circuit 4 for the vertical synchronizing signal oscillates at 5 KHz as described above, and the vertical synchronizing signal 2 is inputted to the second counter 6 as a reset signal. The output result from the 2 oscillator circuit 4 is used as a clock and the count result until it is reset by the vertical synchronizing signal 2 is sent to the third comparator 9.

On the other hand, the comparison data setting circuit 10 stores the comparison data in the first comparator 7 in accordance with the specification required by the user.
122, the comparison data = 200 for the second comparator 8 and the comparison data = 60 for the third comparator 9 are preset at the same time when the power is turned on.

Each comparator 7, 8, 9 compares the preset data with the count result from the first counter 5 or the second counter 6, and when the count result is larger than the preset data. If a logic signal corresponding to "1" is transmitted to the above, and a signal corresponding to "0" is transmitted if it is small, the output signal of each comparator when the above input signals are input is as follows. Table 3 below.

[0024]

[Table 3]

On the other hand, the conversion matrix circuit 11 is a so-called ROM, and the output of the first comparator 7 is output to the first bit (LSB) of the address and the output of the second comparator 8 is output to the second bit. It is assumed that the output of the third comparator 9 is assigned to the bit (MSB), and the data is the address =
If "111", then "1", address = "101"
If "2" is stored when the address is "001", "3" is stored when the address is "001", and "4" is stored when the address is "110", the switching signal 12 is output after all. 12 is "1" when the input is 1,
When the value is 2, an output such as "2" is output, and accordingly, the deflection frequency, the power supply voltage, the image distortion correction constant, and the like may be switched.

Further, as another embodiment, the comparison data setting circuit 10 has horizontal frequencies 15 and 7K shown in Table 2.
Data corresponding to the count values of Hz and 31, 5 KHz and data corresponding to the count value of the vertical frequency of 60 Hz are stored, and data = 254 is stored in the first comparator 7,
Data = 126 is output to the comparator 8 and data = 83 is output to the third comparator 9. When they match, “1” is output. When they do not match, “0” is output by the conversion matrix circuit 11 as shown in Table 4. Output the appropriate signal.

[0027]

[Table 4]

In the above description, the case where there are four kinds of input signals has been described as an example, but it goes without saying that the number of comparators or the like may be increased or decreased according to the increase or decrease of the kinds of input signals.
Further, in the present embodiment, the horizontal and vertical comparison results are assigned to the same address, but it is also possible to assign them to different addresses to make the horizontal switching signal and the vertical switching signal independent.

Since a circuit having good temperature characteristics can be easily realized by setting the target clock frequency to crystal oscillation, the present control circuit can be a circuit that is not affected by temperature drift, so that the reliability can be improved. it can.

[0030]

As described above, according to the present invention, firstly, the discrimination is made based on the count data of the digital counter, so that it is possible to discriminate even if the frequencies of the synchronizing signals are close to each other by using a highly accurate counter. is there. (A highly accurate counter can be easily realized even considering the scanning frequency of general video signals.)
Secondly, the accuracy can be higher because the discrimination can be made from the combination of both the horizontal synchronizing signal and the vertical synchronizing signal.

Thirdly, by providing the preset data and the conversion matrix as a memory or a logic array that can be rewritten by the user, there is an effect that the control circuit can flexibly meet the needs of the user.

[Brief description of drawings]

FIG. 1 shows a block diagram of an embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 horizontal synchronizing signal 2 vertical synchronizing signal 3 1st oscillation circuit 4 2nd oscillation circuit 5 1st counter 6 2nd counter 7 1st comparator 8 2nd comparator 9 3rd comparator 10 Comparison data setting circuit 11 Conversion matrix circuit 12 switching signal

Claims (2)

[Claims] 1. A multi-scan monitor capable of displaying video signals having different scanning frequencies, a first oscillating circuit and a second oscillating circuit for oscillating a pulse signal having a reference frequency, and the first oscillating circuit. First counter means for counting the horizontal synchronizing signal period of the video signal using the output pulse signal of the circuit as a clock, and second counter means for counting the vertical synchronizing signal period of the video signal using the output pulse signal of the second oscillation circuit as the clock. Counter means, preset data setting means for pre-registering data corresponding to the horizontal frequency and vertical frequency of the synchronizing signal of the video signal expected to be input, and the preset data. Preset data output from the setting means and respective counts output from the first counter means and the second counter means -To output a switching signal in accordance with a conversion rule determined by the combination of a comparator for outputting a signal indicating the magnitude relationship with preset data and a signal indicating the magnitude relationship output from the above comparator, And a conversion matrix for the multi-scan monitor. 2. A multi-scan monitor capable of displaying video signals having different scanning frequencies, a first oscillating circuit and a second oscillating circuit for oscillating a pulse signal having a reference frequency, and the first oscillating circuit. First counter means for counting the horizontal synchronizing signal period of the video signal using the output pulse signal of the circuit as a clock, and second counter means for counting the vertical synchronizing signal period of the video signal using the output pulse signal of the second oscillation circuit as the clock. Counter means, preset data setting means for pre-registering data corresponding to the horizontal frequency and vertical frequency of the synchronizing signal of the video signal expected to be input, and the preset data. Preset data output from the setting means and respective counts output from the first counter means and the second counter means -A conversion for outputting a switching signal in accordance with a conversion rule determined by a combination of a comparator for inputting the input data and a signal for indicating a match with the preset data, and a combination of signals for indicating a match output from the comparator. A multi-scan monitor comprising a matrix.